phy_interface.h 4.0 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2011 Freescale Semiconductor, Inc.
  4. * Copyright 2020 NXP
  5. * Andy Fleming <afleming@gmail.com>
  6. *
  7. * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
  8. */
  9. #ifndef _PHY_INTERFACE_H
  10. #define _PHY_INTERFACE_H
  11. #include <string.h>
  12. typedef enum {
  13. PHY_INTERFACE_MODE_NA, /* don't touch */
  14. PHY_INTERFACE_MODE_INTERNAL,
  15. PHY_INTERFACE_MODE_MII,
  16. PHY_INTERFACE_MODE_GMII,
  17. PHY_INTERFACE_MODE_SGMII,
  18. PHY_INTERFACE_MODE_TBI,
  19. PHY_INTERFACE_MODE_REVMII,
  20. PHY_INTERFACE_MODE_RMII,
  21. PHY_INTERFACE_MODE_REVRMII,
  22. PHY_INTERFACE_MODE_RGMII,
  23. PHY_INTERFACE_MODE_RGMII_ID,
  24. PHY_INTERFACE_MODE_RGMII_RXID,
  25. PHY_INTERFACE_MODE_RGMII_TXID,
  26. PHY_INTERFACE_MODE_RTBI,
  27. PHY_INTERFACE_MODE_SMII,
  28. PHY_INTERFACE_MODE_XGMII,
  29. PHY_INTERFACE_MODE_XLGMII,
  30. PHY_INTERFACE_MODE_MOCA,
  31. PHY_INTERFACE_MODE_QSGMII,
  32. PHY_INTERFACE_MODE_TRGMII,
  33. PHY_INTERFACE_MODE_100BASEX,
  34. PHY_INTERFACE_MODE_1000BASEX,
  35. PHY_INTERFACE_MODE_2500BASEX,
  36. PHY_INTERFACE_MODE_5GBASER,
  37. PHY_INTERFACE_MODE_RXAUI,
  38. PHY_INTERFACE_MODE_XAUI,
  39. /* 10GBASE-R, XFI, SFI - single lane 10G Serdes */
  40. PHY_INTERFACE_MODE_10GBASER,
  41. PHY_INTERFACE_MODE_25GBASER,
  42. PHY_INTERFACE_MODE_USXGMII,
  43. /* 10GBASE-KR - with Clause 73 AN */
  44. PHY_INTERFACE_MODE_10GKR,
  45. PHY_INTERFACE_MODE_QUSGMII,
  46. PHY_INTERFACE_MODE_1000BASEKX,
  47. #if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
  48. /* LX2160A SERDES modes */
  49. PHY_INTERFACE_MODE_25G_AUI,
  50. PHY_INTERFACE_MODE_XLAUI,
  51. PHY_INTERFACE_MODE_CAUI2,
  52. PHY_INTERFACE_MODE_CAUI4,
  53. #endif
  54. #if defined(CONFIG_PHY_NCSI)
  55. PHY_INTERFACE_MODE_NCSI,
  56. #endif
  57. PHY_INTERFACE_MODE_MAX,
  58. } phy_interface_t;
  59. static const char * const phy_interface_strings[] = {
  60. [PHY_INTERFACE_MODE_NA] = "",
  61. [PHY_INTERFACE_MODE_INTERNAL] = "internal",
  62. [PHY_INTERFACE_MODE_MII] = "mii",
  63. [PHY_INTERFACE_MODE_GMII] = "gmii",
  64. [PHY_INTERFACE_MODE_SGMII] = "sgmii",
  65. [PHY_INTERFACE_MODE_TBI] = "tbi",
  66. [PHY_INTERFACE_MODE_REVMII] = "rev-mii",
  67. [PHY_INTERFACE_MODE_RMII] = "rmii",
  68. [PHY_INTERFACE_MODE_REVRMII] = "rev-rmii",
  69. [PHY_INTERFACE_MODE_RGMII] = "rgmii",
  70. [PHY_INTERFACE_MODE_RGMII_ID] = "rgmii-id",
  71. [PHY_INTERFACE_MODE_RGMII_RXID] = "rgmii-rxid",
  72. [PHY_INTERFACE_MODE_RGMII_TXID] = "rgmii-txid",
  73. [PHY_INTERFACE_MODE_RTBI] = "rtbi",
  74. [PHY_INTERFACE_MODE_SMII] = "smii",
  75. [PHY_INTERFACE_MODE_XGMII] = "xgmii",
  76. [PHY_INTERFACE_MODE_XLGMII] = "xlgmii",
  77. [PHY_INTERFACE_MODE_MOCA] = "moca",
  78. [PHY_INTERFACE_MODE_QSGMII] = "qsgmii",
  79. [PHY_INTERFACE_MODE_TRGMII] = "trgmii",
  80. [PHY_INTERFACE_MODE_1000BASEX] = "1000base-x",
  81. [PHY_INTERFACE_MODE_1000BASEKX] = "1000base-kx",
  82. [PHY_INTERFACE_MODE_2500BASEX] = "2500base-x",
  83. [PHY_INTERFACE_MODE_5GBASER] = "5gbase-r",
  84. [PHY_INTERFACE_MODE_RXAUI] = "rxaui",
  85. [PHY_INTERFACE_MODE_XAUI] = "xaui",
  86. [PHY_INTERFACE_MODE_10GBASER] = "10gbase-r",
  87. [PHY_INTERFACE_MODE_25GBASER] = "25gbase-r",
  88. [PHY_INTERFACE_MODE_USXGMII] = "usxgmii",
  89. [PHY_INTERFACE_MODE_10GKR] = "10gbase-kr",
  90. [PHY_INTERFACE_MODE_100BASEX] = "100base-x",
  91. [PHY_INTERFACE_MODE_QUSGMII] = "qusgmii",
  92. #if defined(CONFIG_ARCH_LX2160A) || defined(CONFIG_ARCH_LX2162A)
  93. /* LX2160A SERDES modes */
  94. [PHY_INTERFACE_MODE_25G_AUI] = "25g-aui",
  95. [PHY_INTERFACE_MODE_XLAUI] = "xlaui4",
  96. [PHY_INTERFACE_MODE_CAUI2] = "caui2",
  97. [PHY_INTERFACE_MODE_CAUI4] = "caui4",
  98. #endif
  99. #if defined(CONFIG_PHY_NCSI)
  100. [PHY_INTERFACE_MODE_NCSI] = "NC-SI",
  101. #endif
  102. };
  103. /* Backplane modes:
  104. * are considered a sub-type of phy_interface_t: XGMII
  105. * and are specified in "phy-connection-type" with one of the following strings
  106. */
  107. static const char * const backplane_mode_strings[] = {
  108. "10gbase-kr",
  109. "40gbase-kr4",
  110. };
  111. static inline const char *phy_string_for_interface(phy_interface_t i)
  112. {
  113. /* Default to unknown */
  114. if (i >= PHY_INTERFACE_MODE_MAX)
  115. i = PHY_INTERFACE_MODE_NA;
  116. return phy_interface_strings[i];
  117. }
  118. static inline bool is_backplane_mode(const char *phyconn)
  119. {
  120. int i;
  121. if (!phyconn)
  122. return false;
  123. for (i = 0; i < ARRAY_SIZE(backplane_mode_strings); i++) {
  124. if (!strcmp(phyconn, backplane_mode_strings[i]))
  125. return true;
  126. }
  127. return false;
  128. }
  129. #endif /* _PHY_INTERFACE_H */