ls1028ardb.h 5.1 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright 2019 NXP
  4. */
  5. #ifndef __LS1028A_RDB_H
  6. #define __LS1028A_RDB_H
  7. #include "ls1028a_common.h"
  8. #define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4)
  9. #define CONFIG_SYS_RTC_BUS_NUM 0
  10. /* Store environment at top of flash */
  11. #define CONFIG_DIMM_SLOTS_PER_CTLR 1
  12. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
  13. #define CONFIG_QIXIS_I2C_ACCESS
  14. /*
  15. * QIXIS Definitions
  16. */
  17. #define CONFIG_FSL_QIXIS
  18. #ifdef CONFIG_FSL_QIXIS
  19. #define QIXIS_BASE 0x7fb00000
  20. #define QIXIS_BASE_PHYS QIXIS_BASE
  21. #define CONFIG_SYS_I2C_FPGA_ADDR 0x66
  22. #define QIXIS_LBMAP_SWITCH 2
  23. #define QIXIS_LBMAP_MASK 0xe0
  24. #define QIXIS_LBMAP_SHIFT 0x5
  25. #define QIXIS_LBMAP_DFLTBANK 0x00
  26. #define QIXIS_LBMAP_ALTBANK 0x00
  27. #define QIXIS_LBMAP_SD 0x00
  28. #define QIXIS_LBMAP_EMMC 0x00
  29. #define QIXIS_LBMAP_XSPI 0x00
  30. #define QIXIS_RCW_SRC_SD 0xf8
  31. #define QIXIS_RCW_SRC_EMMC 0xf9
  32. #define QIXIS_RCW_SRC_XSPI 0xff
  33. #define QIXIS_RST_CTL_RESET 0x31
  34. #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x10
  35. #define QIXIS_RCFG_CTL_RECONFIG_START 0x11
  36. #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08
  37. #define QIXIS_RST_FORCE_MEM 0x01
  38. #define CONFIG_SYS_FPGA_CSPR_EXT (0x0)
  39. #define CONFIG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \
  40. CSPR_PORT_SIZE_8 | \
  41. CSPR_MSEL_GPCM | \
  42. CSPR_V)
  43. #define CONFIG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \
  44. CSOR_NOR_NOR_MODE_AVD_NOR | \
  45. CSOR_NOR_TRHZ_80)
  46. #endif
  47. /* SATA */
  48. #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1
  49. #define CONFIG_SYS_SCSI_MAX_LUN 1
  50. #define SCSI_VEND_ID 0x1b4b
  51. #define SCSI_DEV_ID 0x9170
  52. #define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
  53. #define CONFIG_SCSI_AHCI_PLAT
  54. #define CONFIG_SYS_SATA1 AHCI_BASE_ADDR1
  55. /* Initial environment variables */
  56. #ifndef SPL_NO_ENV
  57. #undef CONFIG_EXTRA_ENV_SETTINGS
  58. #define CONFIG_EXTRA_ENV_SETTINGS \
  59. "board=ls1028ardb\0" \
  60. "hwconfig=fsl_ddr:bank_intlv=auto\0" \
  61. "ramdisk_addr=0x800000\0" \
  62. "ramdisk_size=0x2000000\0" \
  63. "bootm_size=0x10000000\0" \
  64. "fdt_addr=0x00f00000\0" \
  65. "kernel_addr=0x01000000\0" \
  66. "scriptaddr=0x80000000\0" \
  67. "scripthdraddr=0x80080000\0" \
  68. "fdtheader_addr_r=0x80100000\0" \
  69. "kernelheader_addr_r=0x80200000\0" \
  70. "load_addr=0xa0000000\0" \
  71. "kernel_addr_r=0x81000000\0" \
  72. "fdt_addr_r=0x90000000\0" \
  73. "ramdisk_addr_r=0xa0000000\0" \
  74. "kernel_start=0x1000000\0" \
  75. "kernelheader_start=0x600000\0" \
  76. "kernel_load=0xa0000000\0" \
  77. "kernel_size=0x2800000\0" \
  78. "kernelheader_size=0x40000\0" \
  79. "kernel_addr_sd=0x8000\0" \
  80. "kernel_size_sd=0x14000\0" \
  81. "kernelhdr_addr_sd=0x3000\0" \
  82. "kernelhdr_size_sd=0x20\0" \
  83. "console=ttyS0,115200\0" \
  84. "mtdparts=" CONFIG_MTDPARTS_DEFAULT "\0" \
  85. BOOTENV \
  86. "boot_scripts=ls1028ardb_boot.scr\0" \
  87. "boot_script_hdr=hdr_ls1028ardb_bs.out\0" \
  88. "scan_dev_for_boot_part=" \
  89. "part list ${devtype} ${devnum} devplist; " \
  90. "env exists devplist || setenv devplist 1; " \
  91. "for distro_bootpart in ${devplist}; do " \
  92. "if fstype ${devtype} " \
  93. "${devnum}:${distro_bootpart} " \
  94. "bootfstype; then " \
  95. "run scan_dev_for_boot; " \
  96. "fi; " \
  97. "done\0" \
  98. "boot_a_script=" \
  99. "load ${devtype} ${devnum}:${distro_bootpart} " \
  100. "${scriptaddr} ${prefix}${script}; " \
  101. "env exists secureboot && load ${devtype} " \
  102. "${devnum}:${distro_bootpart} " \
  103. "${scripthdraddr} ${prefix}${boot_script_hdr} " \
  104. "&& esbc_validate ${scripthdraddr};" \
  105. "source ${scriptaddr}\0" \
  106. "xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \
  107. "sf probe 0:0 && sf read $load_addr " \
  108. "$kernel_start $kernel_size ; env exists secureboot &&" \
  109. "sf read $kernelheader_addr_r $kernelheader_start " \
  110. "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\
  111. " bootm $load_addr#$board\0" \
  112. "xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \
  113. "sf probe 0:0 && sf read $load_addr 0x940000 0x30000 " \
  114. "&& hdp load $load_addr 0x2000\0" \
  115. "sd_bootcmd=echo Trying load from SD ...;" \
  116. "mmc dev 0;mmcinfo; mmc read $load_addr " \
  117. "$kernel_addr_sd $kernel_size_sd && " \
  118. "env exists secureboot && mmc read $kernelheader_addr_r " \
  119. "$kernelhdr_addr_sd $kernelhdr_size_sd " \
  120. " && esbc_validate ${kernelheader_addr_r};" \
  121. "bootm $load_addr#$board\0" \
  122. "sd_hdploadcmd=echo Trying load HDP firmware from SD..;" \
  123. "mmc dev 0;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \
  124. "&& hdp load $load_addr 0x2000\0" \
  125. "emmc_bootcmd=echo Trying load from EMMC ..;" \
  126. "mmc dev 1;mmcinfo; mmc read $load_addr " \
  127. "$kernel_addr_sd $kernel_size_sd && " \
  128. "env exists secureboot && mmc read $kernelheader_addr_r " \
  129. "$kernelhdr_addr_sd $kernelhdr_size_sd " \
  130. " && esbc_validate ${kernelheader_addr_r};" \
  131. "bootm $load_addr#$board\0" \
  132. "emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;" \
  133. "mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \
  134. "&& hdp load $load_addr 0x2000\0"
  135. #endif
  136. #endif /* __LS1028A_RDB_H */