efuse.c 5.0 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2015-2016 Reinhard Pfau <reinhard.pfau@gdsys.cc>
  4. */
  5. #include <config.h>
  6. #include <common.h>
  7. #include <errno.h>
  8. #include <asm/io.h>
  9. #include <asm/arch/cpu.h>
  10. #include <asm/arch/efuse.h>
  11. #include <asm/arch/soc.h>
  12. #include <linux/bitops.h>
  13. #include <linux/delay.h>
  14. #include <linux/mbus.h>
  15. #if defined(CONFIG_MVEBU_EFUSE_FAKE)
  16. #define DRY_RUN
  17. #else
  18. #undef DRY_RUN
  19. #endif
  20. #define MBUS_EFUSE_BASE 0xF6000000
  21. #define MBUS_EFUSE_SIZE BIT(20)
  22. #define MVEBU_EFUSE_CONTROL (MVEBU_REGISTER(0xE4008))
  23. enum {
  24. MVEBU_EFUSE_CTRL_PROGRAM_ENABLE = (1 << 31),
  25. };
  26. struct mvebu_hd_efuse {
  27. u32 bits_31_0;
  28. u32 bits_63_32;
  29. u32 bit64;
  30. u32 reserved0;
  31. };
  32. #ifndef DRY_RUN
  33. static struct mvebu_hd_efuse *efuses =
  34. (struct mvebu_hd_efuse *)(MBUS_EFUSE_BASE + 0xF9000);
  35. #else
  36. static struct mvebu_hd_efuse efuses[EFUSE_LINE_MAX + 1];
  37. #endif
  38. static int efuse_initialised;
  39. static struct mvebu_hd_efuse *get_efuse_line(int nr)
  40. {
  41. if (nr < 0 || nr > 63 || !efuse_initialised)
  42. return NULL;
  43. return efuses + nr;
  44. }
  45. static void enable_efuse_program(void)
  46. {
  47. #ifndef DRY_RUN
  48. setbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE);
  49. #endif
  50. }
  51. static void disable_efuse_program(void)
  52. {
  53. #ifndef DRY_RUN
  54. clrbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE);
  55. #endif
  56. }
  57. static int do_prog_efuse(struct mvebu_hd_efuse *efuse,
  58. struct efuse_val *new_val, u32 mask0, u32 mask1)
  59. {
  60. struct efuse_val val;
  61. val.dwords.d[0] = readl(&efuse->bits_31_0);
  62. val.dwords.d[1] = readl(&efuse->bits_63_32);
  63. val.lock = readl(&efuse->bit64);
  64. if (val.lock & 1)
  65. return -EPERM;
  66. val.dwords.d[0] |= (new_val->dwords.d[0] & mask0);
  67. val.dwords.d[1] |= (new_val->dwords.d[1] & mask1);
  68. val.lock |= new_val->lock;
  69. writel(val.dwords.d[0], &efuse->bits_31_0);
  70. mdelay(1);
  71. writel(val.dwords.d[1], &efuse->bits_63_32);
  72. mdelay(1);
  73. writel(val.lock, &efuse->bit64);
  74. mdelay(5);
  75. return 0;
  76. }
  77. static int prog_efuse(int nr, struct efuse_val *new_val, u32 mask0, u32 mask1)
  78. {
  79. struct mvebu_hd_efuse *efuse;
  80. int res = 0;
  81. res = mvebu_efuse_init_hw();
  82. if (res)
  83. return res;
  84. efuse = get_efuse_line(nr);
  85. if (!efuse)
  86. return -ENODEV;
  87. if (!new_val)
  88. return -EINVAL;
  89. /* only write a fuse line with lock bit */
  90. if (!new_val->lock)
  91. return -EINVAL;
  92. /* according to specs ECC protection bits must be 0 on write */
  93. if (new_val->bytes.d[7] & 0xFE)
  94. return -EINVAL;
  95. if (!new_val->dwords.d[0] && !new_val->dwords.d[1] && (mask0 | mask1))
  96. return 0;
  97. enable_efuse_program();
  98. res = do_prog_efuse(efuse, new_val, mask0, mask1);
  99. disable_efuse_program();
  100. return res;
  101. }
  102. int mvebu_efuse_init_hw(void)
  103. {
  104. int ret;
  105. if (efuse_initialised)
  106. return 0;
  107. ret = mvebu_mbus_add_window_by_id(
  108. CPU_TARGET_SATA23_DFX, 0xA, MBUS_EFUSE_BASE, MBUS_EFUSE_SIZE);
  109. if (ret)
  110. return ret;
  111. efuse_initialised = 1;
  112. return 0;
  113. }
  114. int mvebu_read_efuse(int nr, struct efuse_val *val)
  115. {
  116. struct mvebu_hd_efuse *efuse;
  117. int res;
  118. res = mvebu_efuse_init_hw();
  119. if (res)
  120. return res;
  121. efuse = get_efuse_line(nr);
  122. if (!efuse)
  123. return -ENODEV;
  124. if (!val)
  125. return -EINVAL;
  126. val->dwords.d[0] = readl(&efuse->bits_31_0);
  127. val->dwords.d[1] = readl(&efuse->bits_63_32);
  128. val->lock = readl(&efuse->bit64);
  129. return 0;
  130. }
  131. int mvebu_write_efuse(int nr, struct efuse_val *val)
  132. {
  133. return prog_efuse(nr, val, ~0, ~0);
  134. }
  135. int mvebu_lock_efuse(int nr)
  136. {
  137. struct efuse_val val = {
  138. .lock = 1,
  139. };
  140. return prog_efuse(nr, &val, 0, 0);
  141. }
  142. /*
  143. * wrapper funcs providing the fuse API
  144. *
  145. * we use the following mapping:
  146. * "bank" -> eFuse line
  147. * "word" -> 0: bits 0-31
  148. * 1: bits 32-63
  149. * 2: bit 64 (lock)
  150. */
  151. static struct efuse_val prog_val;
  152. static int valid_prog_words;
  153. int fuse_read(u32 bank, u32 word, u32 *val)
  154. {
  155. struct efuse_val fuse_line;
  156. int res;
  157. if (bank < EFUSE_LINE_MIN || bank > EFUSE_LINE_MAX || word > 2)
  158. return -EINVAL;
  159. res = mvebu_read_efuse(bank, &fuse_line);
  160. if (res)
  161. return res;
  162. if (word < 2)
  163. *val = fuse_line.dwords.d[word];
  164. else
  165. *val = fuse_line.lock;
  166. return res;
  167. }
  168. int fuse_sense(u32 bank, u32 word, u32 *val)
  169. {
  170. /* not supported */
  171. return -ENOSYS;
  172. }
  173. int fuse_prog(u32 bank, u32 word, u32 val)
  174. {
  175. int res = 0;
  176. /*
  177. * NOTE: Fuse line should be written as whole.
  178. * So how can we do that with this API?
  179. * For now: remember values for word == 0 and word == 1 and write the
  180. * whole line when word == 2.
  181. * This implies that we always require all 3 fuse prog cmds (one for
  182. * for each word) to write a single fuse line.
  183. * Exception is a single write to word 2 which will lock the fuse line.
  184. *
  185. * Hope that will be OK.
  186. */
  187. if (bank < EFUSE_LINE_MIN || bank > EFUSE_LINE_MAX || word > 2)
  188. return -EINVAL;
  189. if (word < 2) {
  190. prog_val.dwords.d[word] = val;
  191. valid_prog_words |= (1 << word);
  192. } else if ((valid_prog_words & 3) == 0 && val) {
  193. res = mvebu_lock_efuse(bank);
  194. valid_prog_words = 0;
  195. } else if ((valid_prog_words & 3) != 3 || !val) {
  196. res = -EINVAL;
  197. } else {
  198. prog_val.lock = val != 0;
  199. res = mvebu_write_efuse(bank, &prog_val);
  200. valid_prog_words = 0;
  201. }
  202. return res;
  203. }
  204. int fuse_override(u32 bank, u32 word, u32 val)
  205. {
  206. /* not supported */
  207. return -ENOSYS;
  208. }