netarm_dma_module.h 5.8 KB

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  1. /* * include/asm-armnommu/arch-netarm/netarm_dma_module.h
  2. *
  3. * Copyright (C) 2000 NETsilicon, Inc.
  4. * Copyright (C) 2000 WireSpeed Communications Corporation
  5. *
  6. * This software is copyrighted by WireSpeed. LICENSEE agrees that
  7. * it will not delete this copyright notice, trademarks or protective
  8. * notices from any copy made by LICENSEE.
  9. *
  10. * This software is provided "AS-IS" and any express or implied
  11. * warranties or conditions, including but not limited to any
  12. * implied warranties of merchantability and fitness for a particular
  13. * purpose regarding this software. In no event shall WireSpeed
  14. * be liable for any indirect, consequential, or incidental damages,
  15. * loss of profits or revenue, loss of use or data, or interruption
  16. * of business, whether the alleged damages are labeled in contract,
  17. * tort, or indemnity.
  18. *
  19. * This program is free software; you can redistribute it and/or modify
  20. * it under the terms of the GNU General Public License as published by
  21. * the Free Software Foundation; either version 2 of the License, or
  22. * (at your option) any later version.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software
  26. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  27. *
  28. * author(s) : Joe deBlaquiere
  29. * David Smith
  30. */
  31. #ifndef __NETARM_DMA_MODULE_REGISTERS_H
  32. #define __NETARM_DMA_MODULE_REGISTERS_H
  33. /* GEN unit register offsets */
  34. #define NETARM_DMA_MODULE_BASE (0xFF900000)
  35. #define get_dma_reg_addr(c) ((volatile unsigned int *)(NETARM_DMA_MODULE_BASE + (c)))
  36. #define NETARM_DMA1A_BFR_DESCRPTOR_PTR (0x00)
  37. #define NETARM_DMA1A_CONTROL (0x10)
  38. #define NETARM_DMA1A_STATUS (0x14)
  39. #define NETARM_DMA1B_BFR_DESCRPTOR_PTR (0x20)
  40. #define NETARM_DMA1B_CONTROL (0x30)
  41. #define NETARM_DMA1B_STATUS (0x34)
  42. #define NETARM_DMA1C_BFR_DESCRPTOR_PTR (0x40)
  43. #define NETARM_DMA1C_CONTROL (0x50)
  44. #define NETARM_DMA1C_STATUS (0x54)
  45. #define NETARM_DMA1D_BFR_DESCRPTOR_PTR (0x60)
  46. #define NETARM_DMA1D_CONTROL (0x70)
  47. #define NETARM_DMA1D_STATUS (0x74)
  48. #define NETARM_DMA2_BFR_DESCRPTOR_PTR (0x80)
  49. #define NETARM_DMA2_CONTROL (0x90)
  50. #define NETARM_DMA2_STATUS (0x94)
  51. #define NETARM_DMA3_BFR_DESCRPTOR_PTR (0xA0)
  52. #define NETARM_DMA3_CONTROL (0xB0)
  53. #define NETARM_DMA3_STATUS (0xB4)
  54. #define NETARM_DMA4_BFR_DESCRPTOR_PTR (0xC0)
  55. #define NETARM_DMA4_CONTROL (0xD0)
  56. #define NETARM_DMA4_STATUS (0xD4)
  57. #define NETARM_DMA5_BFR_DESCRPTOR_PTR (0xE0)
  58. #define NETARM_DMA5_CONTROL (0xF0)
  59. #define NETARM_DMA5_STATUS (0xF4)
  60. #define NETARM_DMA6_BFR_DESCRPTOR_PTR (0x100)
  61. #define NETARM_DMA6_CONTROL (0x110)
  62. #define NETARM_DMA6_STATUS (0x114)
  63. #define NETARM_DMA7_BFR_DESCRPTOR_PTR (0x120)
  64. #define NETARM_DMA7_CONTROL (0x130)
  65. #define NETARM_DMA7_STATUS (0x134)
  66. #define NETARM_DMA8_BFR_DESCRPTOR_PTR (0x140)
  67. #define NETARM_DMA8_CONTROL (0x150)
  68. #define NETARM_DMA8_STATUS (0x154)
  69. #define NETARM_DMA9_BFR_DESCRPTOR_PTR (0x160)
  70. #define NETARM_DMA9_CONTROL (0x170)
  71. #define NETARM_DMA9_STATUS (0x174)
  72. #define NETARM_DMA10_BFR_DESCRPTOR_PTR (0x180)
  73. #define NETARM_DMA10_CONTROL (0x190)
  74. #define NETARM_DMA10_STATUS (0x194)
  75. /* select bitfield defintions */
  76. /* DMA Control Register ( 0xFF90_0XX0 ) */
  77. #define NETARM_DMA_CTL_ENABLE (0x80000000)
  78. #define NETARM_DMA_CTL_ABORT (0x40000000)
  79. #define NETARM_DMA_CTL_BUS_100_PERCENT (0x00000000)
  80. #define NETARM_DMA_CTL_BUS_75_PERCENT (0x10000000)
  81. #define NETARM_DMA_CTL_BUS_50_PERCENT (0x20000000)
  82. #define NETARM_DMA_CTL_BUS_25_PERCENT (0x30000000)
  83. #define NETARM_DMA_CTL_BUS_MASK (0x30000000)
  84. #define NETARM_DMA_CTL_MODE_FB_TO_MEM (0x00000000)
  85. #define NETARM_DMA_CTL_MODE_FB_FROM_MEM (0x04000000)
  86. #define NETARM_DMA_CTL_MODE_MEM_TO_MEM (0x08000000)
  87. #define NETARM_DMA_CTL_BURST_NONE (0x00000000)
  88. #define NETARM_DMA_CTL_BURST_8_BYTE (0x01000000)
  89. #define NETARM_DMA_CTL_BURST_16_BYTE (0x02000000)
  90. #define NETARM_DMA_CTL_BURST_MASK (0x03000000)
  91. #define NETARM_DMA_CTL_SRC_INCREMENT (0x00200000)
  92. #define NETARM_DMA_CTL_DST_INCREMENT (0x00100000)
  93. /* these apply only to ext xfers on DMA 3 or 4 */
  94. #define NETARM_DMA_CTL_CH_3_4_REQ_EXT (0x00800000)
  95. #define NETARM_DMA_CTL_CH_3_4_DATA_32 (0x00000000)
  96. #define NETARM_DMA_CTL_CH_3_4_DATA_16 (0x00010000)
  97. #define NETARM_DMA_CTL_CH_3_4_DATA_8 (0x00020000)
  98. #define NETARM_DMA_CTL_STATE(X) ((X) & 0xFC00)
  99. #define NETARM_DMA_CTL_INDEX(X) ((X) & 0x03FF)
  100. /* DMA Status Register ( 0xFF90_0XX4 ) */
  101. #define NETARM_DMA_STAT_NC_INTPEN (0x80000000)
  102. #define NETARM_DMA_STAT_EC_INTPEN (0x40000000)
  103. #define NETARM_DMA_STAT_NR_INTPEN (0x20000000)
  104. #define NETARM_DMA_STAT_CA_INTPEN (0x10000000)
  105. #define NETARM_DMA_STAT_INTPEN_MASK (0xF0000000)
  106. #define NETARM_DMA_STAT_NC_INT_EN (0x00800000)
  107. #define NETARM_DMA_STAT_EC_INT_EN (0x00400000)
  108. #define NETARM_DMA_STAT_NR_INT_EN (0x00200000)
  109. #define NETARM_DMA_STAT_CA_INT_EN (0x00100000)
  110. #define NETARM_DMA_STAT_INT_EN_MASK (0x00F00000)
  111. #define NETARM_DMA_STAT_WRAP (0x00080000)
  112. #define NETARM_DMA_STAT_IDONE (0x00040000)
  113. #define NETARM_DMA_STAT_LAST (0x00020000)
  114. #define NETARM_DMA_STAT_FULL (0x00010000)
  115. #define NETARM_DMA_STAT_BUFLEN(X) ((X) & 0x7FFF)
  116. /* DMA Buffer Descriptor Word 0 bitfields. */
  117. #define NETARM_DMA_BD0_WRAP (0x80000000)
  118. #define NETARM_DMA_BD0_IDONE (0x40000000)
  119. #define NETARM_DMA_BD0_LAST (0x20000000)
  120. #define NETARM_DMA_BD0_BUFPTR_MASK (0x1FFFFFFF)
  121. /* DMA Buffer Descriptor Word 1 bitfields. */
  122. #define NETARM_DMA_BD1_STATUS_MASK (0xFFFF0000)
  123. #define NETARM_DMA_BD1_FULL (0x00008000)
  124. #define NETARM_DMA_BD1_BUFLEN_MASK (0x00007FFF)
  125. #ifndef __ASSEMBLER__
  126. typedef struct __NETARM_DMA_Buff_Desc_FlyBy
  127. {
  128. unsigned int word0;
  129. unsigned int word1;
  130. } NETARM_DMA_Buff_Desc_FlyBy, *pNETARM_DMA_Buff_Desc_FlyBy ;
  131. typedef struct __NETARM_DMA_Buff_Desc_M_to_M
  132. {
  133. unsigned int word0;
  134. unsigned int word1;
  135. unsigned int word2;
  136. unsigned int word3;
  137. } NETARM_DMA_Buff_Desc_M_to_M, *pNETARM_DMA_Buff_Desc_M_to_M ;
  138. #endif
  139. #endif