cmd_ace.c 5.1 KB

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  1. /*
  2. * Copyright (c) 2004 Picture Elements, Inc.
  3. * Stephen Williams (XXXXXXXXXXXXXXXX)
  4. *
  5. * This source code is free software; you can redistribute it
  6. * and/or modify it in source code form under the terms of the GNU
  7. * General Public License as published by the Free Software
  8. * Foundation; either version 2 of the License, or (at your option)
  9. * any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
  19. */
  20. #ident "$Id:$"
  21. /*
  22. * The Xilinx SystemACE chip support is activated by defining
  23. * CONFIG_SYSTEMACE to turn on support, and CFG_SYSTEMACE_BASE
  24. * to set the base address of the device. This code currently
  25. * assumes that the chip is connected via a byte-wide bus.
  26. *
  27. * The CONFIG_SYSTEMACE also adds to fat support the device class
  28. * "ace" that allows the user to execute "fatls ace 0" and the
  29. * like. This works by making the systemace_get_dev function
  30. * available to cmd_fat.c:get_dev and filling in a block device
  31. * description that has all the bits needed for FAT support to
  32. * read sectors.
  33. */
  34. # include <common.h>
  35. # include <command.h>
  36. # include <systemace.h>
  37. # include <part.h>
  38. # include <asm/io.h>
  39. #ifdef CONFIG_SYSTEMACE
  40. /*
  41. * The ace_readw and writew functions read/write 16bit words, but the
  42. * offset value is the BYTE offset as most used in the Xilinx
  43. * datasheet for the SystemACE chip. The CFG_SYSTEMACE_BASE is defined
  44. * to be the base address for the chip, usually in the local
  45. * peripheral bus.
  46. */
  47. static unsigned ace_readw(unsigned offset)
  48. {
  49. return readw(CFG_SYSTEMACE_BASE+offset);
  50. }
  51. static unsigned ace_writew(unsigned val, unsigned offset)
  52. {
  53. writew(val, CFG_SYSTEMACE_BASE+offset);
  54. }
  55. /* */
  56. static unsigned long systemace_read(int dev,
  57. unsigned long start,
  58. unsigned long blkcnt,
  59. unsigned long *buffer);
  60. static block_dev_desc_t systemace_dev = {0};
  61. static int get_cf_lock(void)
  62. {
  63. int retry = 10;
  64. /* CONTROLREG = LOCKREG */
  65. ace_writew(0x0002, 0x18);
  66. /* Wait for MPULOCK in STATUSREG[15:0] */
  67. while (! (ace_readw(0x04) & 0x0002)) {
  68. if (retry < 0)
  69. return -1;
  70. udelay(100000);
  71. retry -= 1;
  72. }
  73. return 0;
  74. }
  75. static void release_cf_lock(void)
  76. {
  77. /* CONTROLREG = none */
  78. ace_writew(0x0000, 0x18);
  79. }
  80. block_dev_desc_t * systemace_get_dev(int dev)
  81. {
  82. /* The first time through this, the systemace_dev object is
  83. not yet initialized. In that case, fill it in. */
  84. if (systemace_dev.blksz == 0) {
  85. systemace_dev.if_type = IF_TYPE_UNKNOWN;
  86. systemace_dev.part_type = PART_TYPE_UNKNOWN;
  87. systemace_dev.type = DEV_TYPE_HARDDISK;
  88. systemace_dev.blksz = 512;
  89. systemace_dev.removable = 1;
  90. systemace_dev.block_read = systemace_read;
  91. }
  92. return &systemace_dev;
  93. }
  94. /*
  95. * This function is called (by dereferencing the block_read pointer in
  96. * the dev_desc) to read blocks of data. The return value is the
  97. * number of blocks read. A zero return indicates an error.
  98. */
  99. static unsigned long systemace_read(int dev,
  100. unsigned long start,
  101. unsigned long blkcnt,
  102. unsigned long *buffer)
  103. {
  104. unsigned val;
  105. int retry;
  106. unsigned char*dp = (unsigned char*)buffer;
  107. if (get_cf_lock() < 0) {
  108. unsigned status = ace_readw(0x04);
  109. /* If CFDETECT is false, card is missing. */
  110. if (! (status&0x0010)) {
  111. printf("** CompactFlash card not present. **\n");
  112. return 0;
  113. }
  114. printf("**** ACE locked away from me (STATUSREG=%04x)\n", status);
  115. return 0;
  116. }
  117. retry = 2000;
  118. for (;;) {
  119. unsigned val = ace_readw(0x04);
  120. /* If CFDETECT is false, card is missing. */
  121. if (! (val & 0x0010)) {
  122. printf("**** ACE CompactFlash not found.\n");
  123. release_cf_lock();
  124. return 0;
  125. }
  126. /* If RDYFORCMD, then we are ready to go. */
  127. if (val & 0x0100)
  128. break;
  129. if (retry < 0) {
  130. printf("**** SystemACE not ready.\n");
  131. release_cf_lock();
  132. return 0;
  133. }
  134. udelay(1000);
  135. retry -= 1;
  136. }
  137. /* Write LBA block address */
  138. ace_writew(start & 0xffff, 0x10);
  139. start >>= 16;
  140. ace_writew(start & 0xff, 0x12);
  141. /* Write sector count | ReadMemCardData. */
  142. ace_writew(blkcnt | 0x0300, 0x14);
  143. /* CONTROLREG = CFGRESET|LOCKREQ */
  144. ace_writew(0x0082, 0x18);
  145. retry = blkcnt * 16;
  146. while (retry > 0) {
  147. int idx;
  148. /* Wait for buffer to become ready. */
  149. while (! (ace_readw(0x04) & 0x0020)) {
  150. udelay(1000);
  151. }
  152. /* Read 16 words of 2bytes from the sector buffer. */
  153. for (idx = 0 ; idx < 16 ; idx += 1) {
  154. unsigned short val = ace_readw(0x40);
  155. *dp++ = val & 0xff;
  156. *dp++ = (val>>8) & 0xff;
  157. }
  158. retry -= 1;
  159. }
  160. release_cf_lock();
  161. return blkcnt;
  162. }
  163. #endif