fdtdec.c 42 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. */
  5. #ifndef USE_HOSTCC
  6. #include <common.h>
  7. #include <boot_fit.h>
  8. #include <dm.h>
  9. #include <hang.h>
  10. #include <init.h>
  11. #include <log.h>
  12. #include <malloc.h>
  13. #include <net.h>
  14. #include <dm/of_extra.h>
  15. #include <env.h>
  16. #include <errno.h>
  17. #include <fdtdec.h>
  18. #include <fdt_support.h>
  19. #include <gzip.h>
  20. #include <mapmem.h>
  21. #include <linux/libfdt.h>
  22. #include <serial.h>
  23. #include <asm/sections.h>
  24. #include <linux/ctype.h>
  25. #include <linux/lzo.h>
  26. #include <linux/ioport.h>
  27. DECLARE_GLOBAL_DATA_PTR;
  28. /*
  29. * Here are the type we know about. One day we might allow drivers to
  30. * register. For now we just put them here. The COMPAT macro allows us to
  31. * turn this into a sparse list later, and keeps the ID with the name.
  32. *
  33. * NOTE: This list is basically a TODO list for things that need to be
  34. * converted to driver model. So don't add new things here unless there is a
  35. * good reason why driver-model conversion is infeasible. Examples include
  36. * things which are used before driver model is available.
  37. */
  38. #define COMPAT(id, name) name
  39. static const char * const compat_names[COMPAT_COUNT] = {
  40. COMPAT(UNKNOWN, "<none>"),
  41. COMPAT(NVIDIA_TEGRA20_EMC, "nvidia,tegra20-emc"),
  42. COMPAT(NVIDIA_TEGRA20_EMC_TABLE, "nvidia,tegra20-emc-table"),
  43. COMPAT(NVIDIA_TEGRA20_NAND, "nvidia,tegra20-nand"),
  44. COMPAT(NVIDIA_TEGRA124_XUSB_PADCTL, "nvidia,tegra124-xusb-padctl"),
  45. COMPAT(NVIDIA_TEGRA210_XUSB_PADCTL, "nvidia,tegra210-xusb-padctl"),
  46. COMPAT(SMSC_LAN9215, "smsc,lan9215"),
  47. COMPAT(SAMSUNG_EXYNOS5_SROMC, "samsung,exynos-sromc"),
  48. COMPAT(SAMSUNG_EXYNOS_USB_PHY, "samsung,exynos-usb-phy"),
  49. COMPAT(SAMSUNG_EXYNOS5_USB3_PHY, "samsung,exynos5250-usb3-phy"),
  50. COMPAT(SAMSUNG_EXYNOS_TMU, "samsung,exynos-tmu"),
  51. COMPAT(SAMSUNG_EXYNOS_MIPI_DSI, "samsung,exynos-mipi-dsi"),
  52. COMPAT(SAMSUNG_EXYNOS_DWMMC, "samsung,exynos-dwmmc"),
  53. COMPAT(GENERIC_SPI_FLASH, "jedec,spi-nor"),
  54. COMPAT(SAMSUNG_EXYNOS_SYSMMU, "samsung,sysmmu-v3.3"),
  55. COMPAT(INTEL_MICROCODE, "intel,microcode"),
  56. COMPAT(INTEL_QRK_MRC, "intel,quark-mrc"),
  57. COMPAT(ALTERA_SOCFPGA_DWMAC, "altr,socfpga-stmmac"),
  58. COMPAT(ALTERA_SOCFPGA_DWMMC, "altr,socfpga-dw-mshc"),
  59. COMPAT(ALTERA_SOCFPGA_DWC2USB, "snps,dwc2"),
  60. COMPAT(INTEL_BAYTRAIL_FSP, "intel,baytrail-fsp"),
  61. COMPAT(INTEL_BAYTRAIL_FSP_MDP, "intel,baytrail-fsp-mdp"),
  62. COMPAT(INTEL_IVYBRIDGE_FSP, "intel,ivybridge-fsp"),
  63. COMPAT(COMPAT_SUNXI_NAND, "allwinner,sun4i-a10-nand"),
  64. COMPAT(ALTERA_SOCFPGA_CLK, "altr,clk-mgr"),
  65. COMPAT(ALTERA_SOCFPGA_PINCTRL_SINGLE, "pinctrl-single"),
  66. COMPAT(ALTERA_SOCFPGA_H2F_BRG, "altr,socfpga-hps2fpga-bridge"),
  67. COMPAT(ALTERA_SOCFPGA_LWH2F_BRG, "altr,socfpga-lwhps2fpga-bridge"),
  68. COMPAT(ALTERA_SOCFPGA_F2H_BRG, "altr,socfpga-fpga2hps-bridge"),
  69. COMPAT(ALTERA_SOCFPGA_F2SDR0, "altr,socfpga-fpga2sdram0-bridge"),
  70. COMPAT(ALTERA_SOCFPGA_F2SDR1, "altr,socfpga-fpga2sdram1-bridge"),
  71. COMPAT(ALTERA_SOCFPGA_F2SDR2, "altr,socfpga-fpga2sdram2-bridge"),
  72. COMPAT(ALTERA_SOCFPGA_FPGA0, "altr,socfpga-a10-fpga-mgr"),
  73. COMPAT(ALTERA_SOCFPGA_NOC, "altr,socfpga-a10-noc"),
  74. COMPAT(ALTERA_SOCFPGA_CLK_INIT, "altr,socfpga-a10-clk-init")
  75. };
  76. const char *fdtdec_get_compatible(enum fdt_compat_id id)
  77. {
  78. /* We allow reading of the 'unknown' ID for testing purposes */
  79. assert(id >= 0 && id < COMPAT_COUNT);
  80. return compat_names[id];
  81. }
  82. fdt_addr_t fdtdec_get_addr_size_fixed(const void *blob, int node,
  83. const char *prop_name, int index, int na,
  84. int ns, fdt_size_t *sizep,
  85. bool translate)
  86. {
  87. const fdt32_t *prop, *prop_end;
  88. const fdt32_t *prop_addr, *prop_size, *prop_after_size;
  89. int len;
  90. fdt_addr_t addr;
  91. debug("%s: %s: ", __func__, prop_name);
  92. prop = fdt_getprop(blob, node, prop_name, &len);
  93. if (!prop) {
  94. debug("(not found)\n");
  95. return FDT_ADDR_T_NONE;
  96. }
  97. prop_end = prop + (len / sizeof(*prop));
  98. prop_addr = prop + (index * (na + ns));
  99. prop_size = prop_addr + na;
  100. prop_after_size = prop_size + ns;
  101. if (prop_after_size > prop_end) {
  102. debug("(not enough data: expected >= %d cells, got %d cells)\n",
  103. (u32)(prop_after_size - prop), ((u32)(prop_end - prop)));
  104. return FDT_ADDR_T_NONE;
  105. }
  106. #if CONFIG_IS_ENABLED(OF_TRANSLATE)
  107. if (translate)
  108. addr = fdt_translate_address(blob, node, prop_addr);
  109. else
  110. #endif
  111. addr = fdtdec_get_number(prop_addr, na);
  112. if (sizep) {
  113. *sizep = fdtdec_get_number(prop_size, ns);
  114. debug("addr=%08llx, size=%llx\n", (unsigned long long)addr,
  115. (unsigned long long)*sizep);
  116. } else {
  117. debug("addr=%08llx\n", (unsigned long long)addr);
  118. }
  119. return addr;
  120. }
  121. fdt_addr_t fdtdec_get_addr_size_auto_parent(const void *blob, int parent,
  122. int node, const char *prop_name,
  123. int index, fdt_size_t *sizep,
  124. bool translate)
  125. {
  126. int na, ns;
  127. debug("%s: ", __func__);
  128. na = fdt_address_cells(blob, parent);
  129. if (na < 1) {
  130. debug("(bad #address-cells)\n");
  131. return FDT_ADDR_T_NONE;
  132. }
  133. ns = fdt_size_cells(blob, parent);
  134. if (ns < 0) {
  135. debug("(bad #size-cells)\n");
  136. return FDT_ADDR_T_NONE;
  137. }
  138. debug("na=%d, ns=%d, ", na, ns);
  139. return fdtdec_get_addr_size_fixed(blob, node, prop_name, index, na,
  140. ns, sizep, translate);
  141. }
  142. fdt_addr_t fdtdec_get_addr_size_auto_noparent(const void *blob, int node,
  143. const char *prop_name, int index,
  144. fdt_size_t *sizep,
  145. bool translate)
  146. {
  147. int parent;
  148. debug("%s: ", __func__);
  149. parent = fdt_parent_offset(blob, node);
  150. if (parent < 0) {
  151. debug("(no parent found)\n");
  152. return FDT_ADDR_T_NONE;
  153. }
  154. return fdtdec_get_addr_size_auto_parent(blob, parent, node, prop_name,
  155. index, sizep, translate);
  156. }
  157. fdt_addr_t fdtdec_get_addr_size(const void *blob, int node,
  158. const char *prop_name, fdt_size_t *sizep)
  159. {
  160. int ns = sizep ? (sizeof(fdt_size_t) / sizeof(fdt32_t)) : 0;
  161. return fdtdec_get_addr_size_fixed(blob, node, prop_name, 0,
  162. sizeof(fdt_addr_t) / sizeof(fdt32_t),
  163. ns, sizep, false);
  164. }
  165. fdt_addr_t fdtdec_get_addr(const void *blob, int node, const char *prop_name)
  166. {
  167. return fdtdec_get_addr_size(blob, node, prop_name, NULL);
  168. }
  169. #if CONFIG_IS_ENABLED(PCI) && defined(CONFIG_DM_PCI)
  170. int fdtdec_get_pci_vendev(const void *blob, int node, u16 *vendor, u16 *device)
  171. {
  172. const char *list, *end;
  173. int len;
  174. list = fdt_getprop(blob, node, "compatible", &len);
  175. if (!list)
  176. return -ENOENT;
  177. end = list + len;
  178. while (list < end) {
  179. len = strlen(list);
  180. if (len >= strlen("pciVVVV,DDDD")) {
  181. char *s = strstr(list, "pci");
  182. /*
  183. * check if the string is something like pciVVVV,DDDD.RR
  184. * or just pciVVVV,DDDD
  185. */
  186. if (s && s[7] == ',' &&
  187. (s[12] == '.' || s[12] == 0)) {
  188. s += 3;
  189. *vendor = simple_strtol(s, NULL, 16);
  190. s += 5;
  191. *device = simple_strtol(s, NULL, 16);
  192. return 0;
  193. }
  194. }
  195. list += (len + 1);
  196. }
  197. return -ENOENT;
  198. }
  199. int fdtdec_get_pci_bar32(const struct udevice *dev, struct fdt_pci_addr *addr,
  200. u32 *bar)
  201. {
  202. int barnum;
  203. /* extract the bar number from fdt_pci_addr */
  204. barnum = addr->phys_hi & 0xff;
  205. if (barnum < PCI_BASE_ADDRESS_0 || barnum > PCI_CARDBUS_CIS)
  206. return -EINVAL;
  207. barnum = (barnum - PCI_BASE_ADDRESS_0) / 4;
  208. *bar = dm_pci_read_bar32(dev, barnum);
  209. return 0;
  210. }
  211. int fdtdec_get_pci_bus_range(const void *blob, int node,
  212. struct fdt_resource *res)
  213. {
  214. const u32 *values;
  215. int len;
  216. values = fdt_getprop(blob, node, "bus-range", &len);
  217. if (!values || len < sizeof(*values) * 2)
  218. return -EINVAL;
  219. res->start = fdt32_to_cpu(*values++);
  220. res->end = fdt32_to_cpu(*values);
  221. return 0;
  222. }
  223. #endif
  224. uint64_t fdtdec_get_uint64(const void *blob, int node, const char *prop_name,
  225. uint64_t default_val)
  226. {
  227. const unaligned_fdt64_t *cell64;
  228. int length;
  229. cell64 = fdt_getprop(blob, node, prop_name, &length);
  230. if (!cell64 || length < sizeof(*cell64))
  231. return default_val;
  232. return fdt64_to_cpu(*cell64);
  233. }
  234. int fdtdec_get_is_enabled(const void *blob, int node)
  235. {
  236. const char *cell;
  237. /*
  238. * It should say "okay", so only allow that. Some fdts use "ok" but
  239. * this is a bug. Please fix your device tree source file. See here
  240. * for discussion:
  241. *
  242. * http://www.mail-archive.com/u-boot@lists.denx.de/msg71598.html
  243. */
  244. cell = fdt_getprop(blob, node, "status", NULL);
  245. if (cell)
  246. return strcmp(cell, "okay") == 0;
  247. return 1;
  248. }
  249. enum fdt_compat_id fdtdec_lookup(const void *blob, int node)
  250. {
  251. enum fdt_compat_id id;
  252. /* Search our drivers */
  253. for (id = COMPAT_UNKNOWN; id < COMPAT_COUNT; id++)
  254. if (fdt_node_check_compatible(blob, node,
  255. compat_names[id]) == 0)
  256. return id;
  257. return COMPAT_UNKNOWN;
  258. }
  259. int fdtdec_next_compatible(const void *blob, int node, enum fdt_compat_id id)
  260. {
  261. return fdt_node_offset_by_compatible(blob, node, compat_names[id]);
  262. }
  263. int fdtdec_next_compatible_subnode(const void *blob, int node,
  264. enum fdt_compat_id id, int *depthp)
  265. {
  266. do {
  267. node = fdt_next_node(blob, node, depthp);
  268. } while (*depthp > 1);
  269. /* If this is a direct subnode, and compatible, return it */
  270. if (*depthp == 1 && 0 == fdt_node_check_compatible(
  271. blob, node, compat_names[id]))
  272. return node;
  273. return -FDT_ERR_NOTFOUND;
  274. }
  275. int fdtdec_next_alias(const void *blob, const char *name, enum fdt_compat_id id,
  276. int *upto)
  277. {
  278. #define MAX_STR_LEN 20
  279. char str[MAX_STR_LEN + 20];
  280. int node, err;
  281. /* snprintf() is not available */
  282. assert(strlen(name) < MAX_STR_LEN);
  283. sprintf(str, "%.*s%d", MAX_STR_LEN, name, *upto);
  284. node = fdt_path_offset(blob, str);
  285. if (node < 0)
  286. return node;
  287. err = fdt_node_check_compatible(blob, node, compat_names[id]);
  288. if (err < 0)
  289. return err;
  290. if (err)
  291. return -FDT_ERR_NOTFOUND;
  292. (*upto)++;
  293. return node;
  294. }
  295. int fdtdec_find_aliases_for_id(const void *blob, const char *name,
  296. enum fdt_compat_id id, int *node_list,
  297. int maxcount)
  298. {
  299. memset(node_list, '\0', sizeof(*node_list) * maxcount);
  300. return fdtdec_add_aliases_for_id(blob, name, id, node_list, maxcount);
  301. }
  302. /* TODO: Can we tighten this code up a little? */
  303. int fdtdec_add_aliases_for_id(const void *blob, const char *name,
  304. enum fdt_compat_id id, int *node_list,
  305. int maxcount)
  306. {
  307. int name_len = strlen(name);
  308. int nodes[maxcount];
  309. int num_found = 0;
  310. int offset, node;
  311. int alias_node;
  312. int count;
  313. int i, j;
  314. /* find the alias node if present */
  315. alias_node = fdt_path_offset(blob, "/aliases");
  316. /*
  317. * start with nothing, and we can assume that the root node can't
  318. * match
  319. */
  320. memset(nodes, '\0', sizeof(nodes));
  321. /* First find all the compatible nodes */
  322. for (node = count = 0; node >= 0 && count < maxcount;) {
  323. node = fdtdec_next_compatible(blob, node, id);
  324. if (node >= 0)
  325. nodes[count++] = node;
  326. }
  327. if (node >= 0)
  328. debug("%s: warning: maxcount exceeded with alias '%s'\n",
  329. __func__, name);
  330. /* Now find all the aliases */
  331. for (offset = fdt_first_property_offset(blob, alias_node);
  332. offset > 0;
  333. offset = fdt_next_property_offset(blob, offset)) {
  334. const struct fdt_property *prop;
  335. const char *path;
  336. int number;
  337. int found;
  338. node = 0;
  339. prop = fdt_get_property_by_offset(blob, offset, NULL);
  340. path = fdt_string(blob, fdt32_to_cpu(prop->nameoff));
  341. if (prop->len && 0 == strncmp(path, name, name_len))
  342. node = fdt_path_offset(blob, prop->data);
  343. if (node <= 0)
  344. continue;
  345. /* Get the alias number */
  346. number = simple_strtoul(path + name_len, NULL, 10);
  347. if (number < 0 || number >= maxcount) {
  348. debug("%s: warning: alias '%s' is out of range\n",
  349. __func__, path);
  350. continue;
  351. }
  352. /* Make sure the node we found is actually in our list! */
  353. found = -1;
  354. for (j = 0; j < count; j++)
  355. if (nodes[j] == node) {
  356. found = j;
  357. break;
  358. }
  359. if (found == -1) {
  360. debug("%s: warning: alias '%s' points to a node "
  361. "'%s' that is missing or is not compatible "
  362. " with '%s'\n", __func__, path,
  363. fdt_get_name(blob, node, NULL),
  364. compat_names[id]);
  365. continue;
  366. }
  367. /*
  368. * Add this node to our list in the right place, and mark
  369. * it as done.
  370. */
  371. if (fdtdec_get_is_enabled(blob, node)) {
  372. if (node_list[number]) {
  373. debug("%s: warning: alias '%s' requires that "
  374. "a node be placed in the list in a "
  375. "position which is already filled by "
  376. "node '%s'\n", __func__, path,
  377. fdt_get_name(blob, node, NULL));
  378. continue;
  379. }
  380. node_list[number] = node;
  381. if (number >= num_found)
  382. num_found = number + 1;
  383. }
  384. nodes[found] = 0;
  385. }
  386. /* Add any nodes not mentioned by an alias */
  387. for (i = j = 0; i < maxcount; i++) {
  388. if (!node_list[i]) {
  389. for (; j < maxcount; j++)
  390. if (nodes[j] &&
  391. fdtdec_get_is_enabled(blob, nodes[j]))
  392. break;
  393. /* Have we run out of nodes to add? */
  394. if (j == maxcount)
  395. break;
  396. assert(!node_list[i]);
  397. node_list[i] = nodes[j++];
  398. if (i >= num_found)
  399. num_found = i + 1;
  400. }
  401. }
  402. return num_found;
  403. }
  404. int fdtdec_get_alias_seq(const void *blob, const char *base, int offset,
  405. int *seqp)
  406. {
  407. int base_len = strlen(base);
  408. const char *find_name;
  409. int find_namelen;
  410. int prop_offset;
  411. int aliases;
  412. find_name = fdt_get_name(blob, offset, &find_namelen);
  413. debug("Looking for '%s' at %d, name %s\n", base, offset, find_name);
  414. aliases = fdt_path_offset(blob, "/aliases");
  415. for (prop_offset = fdt_first_property_offset(blob, aliases);
  416. prop_offset > 0;
  417. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  418. const char *prop;
  419. const char *name;
  420. const char *slash;
  421. int len, val;
  422. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  423. debug(" - %s, %s\n", name, prop);
  424. if (len < find_namelen || *prop != '/' || prop[len - 1] ||
  425. strncmp(name, base, base_len))
  426. continue;
  427. slash = strrchr(prop, '/');
  428. if (strcmp(slash + 1, find_name))
  429. continue;
  430. /*
  431. * Adding an extra check to distinguish DT nodes with
  432. * same name
  433. */
  434. if (IS_ENABLED(CONFIG_PHANDLE_CHECK_SEQ)) {
  435. if (fdt_get_phandle(blob, offset) !=
  436. fdt_get_phandle(blob, fdt_path_offset(blob, prop)))
  437. continue;
  438. }
  439. val = trailing_strtol(name);
  440. if (val != -1) {
  441. *seqp = val;
  442. debug("Found seq %d\n", *seqp);
  443. return 0;
  444. }
  445. }
  446. debug("Not found\n");
  447. return -ENOENT;
  448. }
  449. int fdtdec_get_alias_highest_id(const void *blob, const char *base)
  450. {
  451. int base_len = strlen(base);
  452. int prop_offset;
  453. int aliases;
  454. int max = -1;
  455. debug("Looking for highest alias id for '%s'\n", base);
  456. aliases = fdt_path_offset(blob, "/aliases");
  457. for (prop_offset = fdt_first_property_offset(blob, aliases);
  458. prop_offset > 0;
  459. prop_offset = fdt_next_property_offset(blob, prop_offset)) {
  460. const char *prop;
  461. const char *name;
  462. int len, val;
  463. prop = fdt_getprop_by_offset(blob, prop_offset, &name, &len);
  464. debug(" - %s, %s\n", name, prop);
  465. if (*prop != '/' || prop[len - 1] ||
  466. strncmp(name, base, base_len))
  467. continue;
  468. val = trailing_strtol(name);
  469. if (val > max) {
  470. debug("Found seq %d\n", val);
  471. max = val;
  472. }
  473. }
  474. return max;
  475. }
  476. const char *fdtdec_get_chosen_prop(const void *blob, const char *name)
  477. {
  478. int chosen_node;
  479. if (!blob)
  480. return NULL;
  481. chosen_node = fdt_path_offset(blob, "/chosen");
  482. return fdt_getprop(blob, chosen_node, name, NULL);
  483. }
  484. int fdtdec_get_chosen_node(const void *blob, const char *name)
  485. {
  486. const char *prop;
  487. prop = fdtdec_get_chosen_prop(blob, name);
  488. if (!prop)
  489. return -FDT_ERR_NOTFOUND;
  490. return fdt_path_offset(blob, prop);
  491. }
  492. int fdtdec_check_fdt(void)
  493. {
  494. /*
  495. * We must have an FDT, but we cannot panic() yet since the console
  496. * is not ready. So for now, just assert(). Boards which need an early
  497. * FDT (prior to console ready) will need to make their own
  498. * arrangements and do their own checks.
  499. */
  500. assert(!fdtdec_prepare_fdt());
  501. return 0;
  502. }
  503. /*
  504. * This function is a little odd in that it accesses global data. At some
  505. * point if the architecture board.c files merge this will make more sense.
  506. * Even now, it is common code.
  507. */
  508. int fdtdec_prepare_fdt(void)
  509. {
  510. if (!gd->fdt_blob || ((uintptr_t)gd->fdt_blob & 3) ||
  511. fdt_check_header(gd->fdt_blob)) {
  512. #ifdef CONFIG_SPL_BUILD
  513. puts("Missing DTB\n");
  514. #else
  515. printf("No valid device tree binary found at %p\n",
  516. gd->fdt_blob);
  517. # ifdef DEBUG
  518. if (gd->fdt_blob) {
  519. printf("fdt_blob=%p\n", gd->fdt_blob);
  520. print_buffer((ulong)gd->fdt_blob, gd->fdt_blob, 4,
  521. 32, 0);
  522. }
  523. # endif
  524. #endif
  525. return -1;
  526. }
  527. return 0;
  528. }
  529. int fdtdec_lookup_phandle(const void *blob, int node, const char *prop_name)
  530. {
  531. const u32 *phandle;
  532. int lookup;
  533. debug("%s: %s\n", __func__, prop_name);
  534. phandle = fdt_getprop(blob, node, prop_name, NULL);
  535. if (!phandle)
  536. return -FDT_ERR_NOTFOUND;
  537. lookup = fdt_node_offset_by_phandle(blob, fdt32_to_cpu(*phandle));
  538. return lookup;
  539. }
  540. /**
  541. * Look up a property in a node and check that it has a minimum length.
  542. *
  543. * @param blob FDT blob
  544. * @param node node to examine
  545. * @param prop_name name of property to find
  546. * @param min_len minimum property length in bytes
  547. * @param err 0 if ok, or -FDT_ERR_NOTFOUND if the property is not
  548. found, or -FDT_ERR_BADLAYOUT if not enough data
  549. * @return pointer to cell, which is only valid if err == 0
  550. */
  551. static const void *get_prop_check_min_len(const void *blob, int node,
  552. const char *prop_name, int min_len,
  553. int *err)
  554. {
  555. const void *cell;
  556. int len;
  557. debug("%s: %s\n", __func__, prop_name);
  558. cell = fdt_getprop(blob, node, prop_name, &len);
  559. if (!cell)
  560. *err = -FDT_ERR_NOTFOUND;
  561. else if (len < min_len)
  562. *err = -FDT_ERR_BADLAYOUT;
  563. else
  564. *err = 0;
  565. return cell;
  566. }
  567. int fdtdec_get_int_array(const void *blob, int node, const char *prop_name,
  568. u32 *array, int count)
  569. {
  570. const u32 *cell;
  571. int err = 0;
  572. debug("%s: %s\n", __func__, prop_name);
  573. cell = get_prop_check_min_len(blob, node, prop_name,
  574. sizeof(u32) * count, &err);
  575. if (!err) {
  576. int i;
  577. for (i = 0; i < count; i++)
  578. array[i] = fdt32_to_cpu(cell[i]);
  579. }
  580. return err;
  581. }
  582. int fdtdec_get_int_array_count(const void *blob, int node,
  583. const char *prop_name, u32 *array, int count)
  584. {
  585. const u32 *cell;
  586. int len, elems;
  587. int i;
  588. debug("%s: %s\n", __func__, prop_name);
  589. cell = fdt_getprop(blob, node, prop_name, &len);
  590. if (!cell)
  591. return -FDT_ERR_NOTFOUND;
  592. elems = len / sizeof(u32);
  593. if (count > elems)
  594. count = elems;
  595. for (i = 0; i < count; i++)
  596. array[i] = fdt32_to_cpu(cell[i]);
  597. return count;
  598. }
  599. const u32 *fdtdec_locate_array(const void *blob, int node,
  600. const char *prop_name, int count)
  601. {
  602. const u32 *cell;
  603. int err;
  604. cell = get_prop_check_min_len(blob, node, prop_name,
  605. sizeof(u32) * count, &err);
  606. return err ? NULL : cell;
  607. }
  608. int fdtdec_get_bool(const void *blob, int node, const char *prop_name)
  609. {
  610. const s32 *cell;
  611. int len;
  612. debug("%s: %s\n", __func__, prop_name);
  613. cell = fdt_getprop(blob, node, prop_name, &len);
  614. return cell != NULL;
  615. }
  616. int fdtdec_parse_phandle_with_args(const void *blob, int src_node,
  617. const char *list_name,
  618. const char *cells_name,
  619. int cell_count, int index,
  620. struct fdtdec_phandle_args *out_args)
  621. {
  622. const __be32 *list, *list_end;
  623. int rc = 0, size, cur_index = 0;
  624. uint32_t count = 0;
  625. int node = -1;
  626. int phandle;
  627. /* Retrieve the phandle list property */
  628. list = fdt_getprop(blob, src_node, list_name, &size);
  629. if (!list)
  630. return -ENOENT;
  631. list_end = list + size / sizeof(*list);
  632. /* Loop over the phandles until all the requested entry is found */
  633. while (list < list_end) {
  634. rc = -EINVAL;
  635. count = 0;
  636. /*
  637. * If phandle is 0, then it is an empty entry with no
  638. * arguments. Skip forward to the next entry.
  639. */
  640. phandle = be32_to_cpup(list++);
  641. if (phandle) {
  642. /*
  643. * Find the provider node and parse the #*-cells
  644. * property to determine the argument length.
  645. *
  646. * This is not needed if the cell count is hard-coded
  647. * (i.e. cells_name not set, but cell_count is set),
  648. * except when we're going to return the found node
  649. * below.
  650. */
  651. if (cells_name || cur_index == index) {
  652. node = fdt_node_offset_by_phandle(blob,
  653. phandle);
  654. if (node < 0) {
  655. debug("%s: could not find phandle\n",
  656. fdt_get_name(blob, src_node,
  657. NULL));
  658. goto err;
  659. }
  660. }
  661. if (cells_name) {
  662. count = fdtdec_get_int(blob, node, cells_name,
  663. -1);
  664. if (count == -1) {
  665. debug("%s: could not get %s for %s\n",
  666. fdt_get_name(blob, src_node,
  667. NULL),
  668. cells_name,
  669. fdt_get_name(blob, node,
  670. NULL));
  671. goto err;
  672. }
  673. } else {
  674. count = cell_count;
  675. }
  676. /*
  677. * Make sure that the arguments actually fit in the
  678. * remaining property data length
  679. */
  680. if (list + count > list_end) {
  681. debug("%s: arguments longer than property\n",
  682. fdt_get_name(blob, src_node, NULL));
  683. goto err;
  684. }
  685. }
  686. /*
  687. * All of the error cases above bail out of the loop, so at
  688. * this point, the parsing is successful. If the requested
  689. * index matches, then fill the out_args structure and return,
  690. * or return -ENOENT for an empty entry.
  691. */
  692. rc = -ENOENT;
  693. if (cur_index == index) {
  694. if (!phandle)
  695. goto err;
  696. if (out_args) {
  697. int i;
  698. if (count > MAX_PHANDLE_ARGS) {
  699. debug("%s: too many arguments %d\n",
  700. fdt_get_name(blob, src_node,
  701. NULL), count);
  702. count = MAX_PHANDLE_ARGS;
  703. }
  704. out_args->node = node;
  705. out_args->args_count = count;
  706. for (i = 0; i < count; i++) {
  707. out_args->args[i] =
  708. be32_to_cpup(list++);
  709. }
  710. }
  711. /* Found it! return success */
  712. return 0;
  713. }
  714. node = -1;
  715. list += count;
  716. cur_index++;
  717. }
  718. /*
  719. * Result will be one of:
  720. * -ENOENT : index is for empty phandle
  721. * -EINVAL : parsing error on data
  722. * [1..n] : Number of phandle (count mode; when index = -1)
  723. */
  724. rc = index < 0 ? cur_index : -ENOENT;
  725. err:
  726. return rc;
  727. }
  728. int fdtdec_get_byte_array(const void *blob, int node, const char *prop_name,
  729. u8 *array, int count)
  730. {
  731. const u8 *cell;
  732. int err;
  733. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  734. if (!err)
  735. memcpy(array, cell, count);
  736. return err;
  737. }
  738. const u8 *fdtdec_locate_byte_array(const void *blob, int node,
  739. const char *prop_name, int count)
  740. {
  741. const u8 *cell;
  742. int err;
  743. cell = get_prop_check_min_len(blob, node, prop_name, count, &err);
  744. if (err)
  745. return NULL;
  746. return cell;
  747. }
  748. int fdtdec_get_config_int(const void *blob, const char *prop_name,
  749. int default_val)
  750. {
  751. int config_node;
  752. debug("%s: %s\n", __func__, prop_name);
  753. config_node = fdt_path_offset(blob, "/config");
  754. if (config_node < 0)
  755. return default_val;
  756. return fdtdec_get_int(blob, config_node, prop_name, default_val);
  757. }
  758. int fdtdec_get_config_bool(const void *blob, const char *prop_name)
  759. {
  760. int config_node;
  761. const void *prop;
  762. debug("%s: %s\n", __func__, prop_name);
  763. config_node = fdt_path_offset(blob, "/config");
  764. if (config_node < 0)
  765. return 0;
  766. prop = fdt_get_property(blob, config_node, prop_name, NULL);
  767. return prop != NULL;
  768. }
  769. char *fdtdec_get_config_string(const void *blob, const char *prop_name)
  770. {
  771. const char *nodep;
  772. int nodeoffset;
  773. int len;
  774. debug("%s: %s\n", __func__, prop_name);
  775. nodeoffset = fdt_path_offset(blob, "/config");
  776. if (nodeoffset < 0)
  777. return NULL;
  778. nodep = fdt_getprop(blob, nodeoffset, prop_name, &len);
  779. if (!nodep)
  780. return NULL;
  781. return (char *)nodep;
  782. }
  783. u64 fdtdec_get_number(const fdt32_t *ptr, unsigned int cells)
  784. {
  785. u64 number = 0;
  786. while (cells--)
  787. number = (number << 32) | fdt32_to_cpu(*ptr++);
  788. return number;
  789. }
  790. int fdt_get_resource(const void *fdt, int node, const char *property,
  791. unsigned int index, struct fdt_resource *res)
  792. {
  793. const fdt32_t *ptr, *end;
  794. int na, ns, len, parent;
  795. unsigned int i = 0;
  796. parent = fdt_parent_offset(fdt, node);
  797. if (parent < 0)
  798. return parent;
  799. na = fdt_address_cells(fdt, parent);
  800. ns = fdt_size_cells(fdt, parent);
  801. ptr = fdt_getprop(fdt, node, property, &len);
  802. if (!ptr)
  803. return len;
  804. end = ptr + len / sizeof(*ptr);
  805. while (ptr + na + ns <= end) {
  806. if (i == index) {
  807. res->start = fdtdec_get_number(ptr, na);
  808. res->end = res->start;
  809. res->end += fdtdec_get_number(&ptr[na], ns) - 1;
  810. return 0;
  811. }
  812. ptr += na + ns;
  813. i++;
  814. }
  815. return -FDT_ERR_NOTFOUND;
  816. }
  817. int fdt_get_named_resource(const void *fdt, int node, const char *property,
  818. const char *prop_names, const char *name,
  819. struct fdt_resource *res)
  820. {
  821. int index;
  822. index = fdt_stringlist_search(fdt, node, prop_names, name);
  823. if (index < 0)
  824. return index;
  825. return fdt_get_resource(fdt, node, property, index, res);
  826. }
  827. static int decode_timing_property(const void *blob, int node, const char *name,
  828. struct timing_entry *result)
  829. {
  830. int length, ret = 0;
  831. const u32 *prop;
  832. prop = fdt_getprop(blob, node, name, &length);
  833. if (!prop) {
  834. debug("%s: could not find property %s\n",
  835. fdt_get_name(blob, node, NULL), name);
  836. return length;
  837. }
  838. if (length == sizeof(u32)) {
  839. result->typ = fdtdec_get_int(blob, node, name, 0);
  840. result->min = result->typ;
  841. result->max = result->typ;
  842. } else {
  843. ret = fdtdec_get_int_array(blob, node, name, &result->min, 3);
  844. }
  845. return ret;
  846. }
  847. int fdtdec_decode_display_timing(const void *blob, int parent, int index,
  848. struct display_timing *dt)
  849. {
  850. int i, node, timings_node;
  851. u32 val = 0;
  852. int ret = 0;
  853. timings_node = fdt_subnode_offset(blob, parent, "display-timings");
  854. if (timings_node < 0)
  855. return timings_node;
  856. for (i = 0, node = fdt_first_subnode(blob, timings_node);
  857. node > 0 && i != index;
  858. node = fdt_next_subnode(blob, node))
  859. i++;
  860. if (node < 0)
  861. return node;
  862. memset(dt, 0, sizeof(*dt));
  863. ret |= decode_timing_property(blob, node, "hback-porch",
  864. &dt->hback_porch);
  865. ret |= decode_timing_property(blob, node, "hfront-porch",
  866. &dt->hfront_porch);
  867. ret |= decode_timing_property(blob, node, "hactive", &dt->hactive);
  868. ret |= decode_timing_property(blob, node, "hsync-len", &dt->hsync_len);
  869. ret |= decode_timing_property(blob, node, "vback-porch",
  870. &dt->vback_porch);
  871. ret |= decode_timing_property(blob, node, "vfront-porch",
  872. &dt->vfront_porch);
  873. ret |= decode_timing_property(blob, node, "vactive", &dt->vactive);
  874. ret |= decode_timing_property(blob, node, "vsync-len", &dt->vsync_len);
  875. ret |= decode_timing_property(blob, node, "clock-frequency",
  876. &dt->pixelclock);
  877. dt->flags = 0;
  878. val = fdtdec_get_int(blob, node, "vsync-active", -1);
  879. if (val != -1) {
  880. dt->flags |= val ? DISPLAY_FLAGS_VSYNC_HIGH :
  881. DISPLAY_FLAGS_VSYNC_LOW;
  882. }
  883. val = fdtdec_get_int(blob, node, "hsync-active", -1);
  884. if (val != -1) {
  885. dt->flags |= val ? DISPLAY_FLAGS_HSYNC_HIGH :
  886. DISPLAY_FLAGS_HSYNC_LOW;
  887. }
  888. val = fdtdec_get_int(blob, node, "de-active", -1);
  889. if (val != -1) {
  890. dt->flags |= val ? DISPLAY_FLAGS_DE_HIGH :
  891. DISPLAY_FLAGS_DE_LOW;
  892. }
  893. val = fdtdec_get_int(blob, node, "pixelclk-active", -1);
  894. if (val != -1) {
  895. dt->flags |= val ? DISPLAY_FLAGS_PIXDATA_POSEDGE :
  896. DISPLAY_FLAGS_PIXDATA_NEGEDGE;
  897. }
  898. if (fdtdec_get_bool(blob, node, "interlaced"))
  899. dt->flags |= DISPLAY_FLAGS_INTERLACED;
  900. if (fdtdec_get_bool(blob, node, "doublescan"))
  901. dt->flags |= DISPLAY_FLAGS_DOUBLESCAN;
  902. if (fdtdec_get_bool(blob, node, "doubleclk"))
  903. dt->flags |= DISPLAY_FLAGS_DOUBLECLK;
  904. return ret;
  905. }
  906. int fdtdec_setup_mem_size_base(void)
  907. {
  908. int ret;
  909. ofnode mem;
  910. struct resource res;
  911. mem = ofnode_path("/memory");
  912. if (!ofnode_valid(mem)) {
  913. debug("%s: Missing /memory node\n", __func__);
  914. return -EINVAL;
  915. }
  916. ret = ofnode_read_resource(mem, 0, &res);
  917. if (ret != 0) {
  918. debug("%s: Unable to decode first memory bank\n", __func__);
  919. return -EINVAL;
  920. }
  921. gd->ram_size = (phys_size_t)(res.end - res.start + 1);
  922. gd->ram_base = (unsigned long)res.start;
  923. debug("%s: Initial DRAM size %llx\n", __func__,
  924. (unsigned long long)gd->ram_size);
  925. return 0;
  926. }
  927. ofnode get_next_memory_node(ofnode mem)
  928. {
  929. do {
  930. mem = ofnode_by_prop_value(mem, "device_type", "memory", 7);
  931. } while (!ofnode_is_available(mem));
  932. return mem;
  933. }
  934. int fdtdec_setup_memory_banksize(void)
  935. {
  936. int bank, ret, reg = 0;
  937. struct resource res;
  938. ofnode mem = ofnode_null();
  939. mem = get_next_memory_node(mem);
  940. if (!ofnode_valid(mem)) {
  941. debug("%s: Missing /memory node\n", __func__);
  942. return -EINVAL;
  943. }
  944. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  945. ret = ofnode_read_resource(mem, reg++, &res);
  946. if (ret < 0) {
  947. reg = 0;
  948. mem = get_next_memory_node(mem);
  949. if (!ofnode_valid(mem))
  950. break;
  951. ret = ofnode_read_resource(mem, reg++, &res);
  952. if (ret < 0)
  953. break;
  954. }
  955. if (ret != 0)
  956. return -EINVAL;
  957. gd->bd->bi_dram[bank].start = (phys_addr_t)res.start;
  958. gd->bd->bi_dram[bank].size =
  959. (phys_size_t)(res.end - res.start + 1);
  960. debug("%s: DRAM Bank #%d: start = 0x%llx, size = 0x%llx\n",
  961. __func__, bank,
  962. (unsigned long long)gd->bd->bi_dram[bank].start,
  963. (unsigned long long)gd->bd->bi_dram[bank].size);
  964. }
  965. return 0;
  966. }
  967. int fdtdec_setup_mem_size_base_lowest(void)
  968. {
  969. int bank, ret, reg = 0;
  970. struct resource res;
  971. unsigned long base;
  972. phys_size_t size;
  973. ofnode mem = ofnode_null();
  974. gd->ram_base = (unsigned long)~0;
  975. mem = get_next_memory_node(mem);
  976. if (!ofnode_valid(mem)) {
  977. debug("%s: Missing /memory node\n", __func__);
  978. return -EINVAL;
  979. }
  980. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  981. ret = ofnode_read_resource(mem, reg++, &res);
  982. if (ret < 0) {
  983. reg = 0;
  984. mem = get_next_memory_node(mem);
  985. if (!ofnode_valid(mem))
  986. break;
  987. ret = ofnode_read_resource(mem, reg++, &res);
  988. if (ret < 0)
  989. break;
  990. }
  991. if (ret != 0)
  992. return -EINVAL;
  993. base = (unsigned long)res.start;
  994. size = (phys_size_t)(res.end - res.start + 1);
  995. if (gd->ram_base > base && size) {
  996. gd->ram_base = base;
  997. gd->ram_size = size;
  998. debug("%s: Initial DRAM base %lx size %lx\n",
  999. __func__, base, (unsigned long)size);
  1000. }
  1001. }
  1002. return 0;
  1003. }
  1004. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1005. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_GZIP) ||\
  1006. CONFIG_IS_ENABLED(MULTI_DTB_FIT_LZO)
  1007. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1008. {
  1009. size_t sz_out = CONFIG_VAL(MULTI_DTB_FIT_UNCOMPRESS_SZ);
  1010. bool gzip = 0, lzo = 0;
  1011. ulong sz_in = sz_src;
  1012. void *dst;
  1013. int rc;
  1014. if (CONFIG_IS_ENABLED(GZIP))
  1015. if (gzip_parse_header(src, sz_in) >= 0)
  1016. gzip = 1;
  1017. if (CONFIG_IS_ENABLED(LZO))
  1018. if (!gzip && lzop_is_valid_header(src))
  1019. lzo = 1;
  1020. if (!gzip && !lzo)
  1021. return -EBADMSG;
  1022. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC)) {
  1023. dst = malloc(sz_out);
  1024. if (!dst) {
  1025. puts("uncompress_blob: Unable to allocate memory\n");
  1026. return -ENOMEM;
  1027. }
  1028. } else {
  1029. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT_USER_DEFINED_AREA)
  1030. dst = (void *)CONFIG_VAL(MULTI_DTB_FIT_USER_DEF_ADDR);
  1031. # else
  1032. return -ENOTSUPP;
  1033. # endif
  1034. }
  1035. if (CONFIG_IS_ENABLED(GZIP) && gzip)
  1036. rc = gunzip(dst, sz_out, (u8 *)src, &sz_in);
  1037. else if (CONFIG_IS_ENABLED(LZO) && lzo)
  1038. rc = lzop_decompress(src, sz_in, dst, &sz_out);
  1039. else
  1040. hang();
  1041. if (rc < 0) {
  1042. /* not a valid compressed blob */
  1043. puts("uncompress_blob: Unable to uncompress\n");
  1044. if (CONFIG_IS_ENABLED(MULTI_DTB_FIT_DYN_ALLOC))
  1045. free(dst);
  1046. return -EBADMSG;
  1047. }
  1048. *dstp = dst;
  1049. return 0;
  1050. }
  1051. # else
  1052. static int uncompress_blob(const void *src, ulong sz_src, void **dstp)
  1053. {
  1054. *dstp = (void *)src;
  1055. return 0;
  1056. }
  1057. # endif
  1058. #endif
  1059. #if defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1060. /*
  1061. * For CONFIG_OF_SEPARATE, the board may optionally implement this to
  1062. * provide and/or fixup the fdt.
  1063. */
  1064. __weak void *board_fdt_blob_setup(void)
  1065. {
  1066. void *fdt_blob = NULL;
  1067. #ifdef CONFIG_SPL_BUILD
  1068. /* FDT is at end of BSS unless it is in a different memory region */
  1069. if (CONFIG_IS_ENABLED(SEPARATE_BSS))
  1070. fdt_blob = (ulong *)&_image_binary_end;
  1071. else
  1072. fdt_blob = (ulong *)&__bss_end;
  1073. #else
  1074. /* FDT is at end of image */
  1075. fdt_blob = (ulong *)&_end;
  1076. #endif
  1077. return fdt_blob;
  1078. }
  1079. #endif
  1080. int fdtdec_set_ethernet_mac_address(void *fdt, const u8 *mac, size_t size)
  1081. {
  1082. const char *path;
  1083. int offset, err;
  1084. if (!is_valid_ethaddr(mac))
  1085. return -EINVAL;
  1086. path = fdt_get_alias(fdt, "ethernet");
  1087. if (!path)
  1088. return 0;
  1089. debug("ethernet alias found: %s\n", path);
  1090. offset = fdt_path_offset(fdt, path);
  1091. if (offset < 0) {
  1092. debug("ethernet alias points to absent node %s\n", path);
  1093. return -ENOENT;
  1094. }
  1095. err = fdt_setprop_inplace(fdt, offset, "local-mac-address", mac, size);
  1096. if (err < 0)
  1097. return err;
  1098. debug("MAC address: %pM\n", mac);
  1099. return 0;
  1100. }
  1101. static int fdtdec_init_reserved_memory(void *blob)
  1102. {
  1103. int na, ns, node, err;
  1104. fdt32_t value;
  1105. /* inherit #address-cells and #size-cells from the root node */
  1106. na = fdt_address_cells(blob, 0);
  1107. ns = fdt_size_cells(blob, 0);
  1108. node = fdt_add_subnode(blob, 0, "reserved-memory");
  1109. if (node < 0)
  1110. return node;
  1111. err = fdt_setprop(blob, node, "ranges", NULL, 0);
  1112. if (err < 0)
  1113. return err;
  1114. value = cpu_to_fdt32(ns);
  1115. err = fdt_setprop(blob, node, "#size-cells", &value, sizeof(value));
  1116. if (err < 0)
  1117. return err;
  1118. value = cpu_to_fdt32(na);
  1119. err = fdt_setprop(blob, node, "#address-cells", &value, sizeof(value));
  1120. if (err < 0)
  1121. return err;
  1122. return node;
  1123. }
  1124. int fdtdec_add_reserved_memory(void *blob, const char *basename,
  1125. const struct fdt_memory *carveout,
  1126. uint32_t *phandlep, bool no_map)
  1127. {
  1128. fdt32_t cells[4] = {}, *ptr = cells;
  1129. uint32_t upper, lower, phandle;
  1130. int parent, node, na, ns, err;
  1131. fdt_size_t size;
  1132. char name[64];
  1133. /* create an empty /reserved-memory node if one doesn't exist */
  1134. parent = fdt_path_offset(blob, "/reserved-memory");
  1135. if (parent < 0) {
  1136. parent = fdtdec_init_reserved_memory(blob);
  1137. if (parent < 0)
  1138. return parent;
  1139. }
  1140. /* only 1 or 2 #address-cells and #size-cells are supported */
  1141. na = fdt_address_cells(blob, parent);
  1142. if (na < 1 || na > 2)
  1143. return -FDT_ERR_BADNCELLS;
  1144. ns = fdt_size_cells(blob, parent);
  1145. if (ns < 1 || ns > 2)
  1146. return -FDT_ERR_BADNCELLS;
  1147. /* find a matching node and return the phandle to that */
  1148. fdt_for_each_subnode(node, blob, parent) {
  1149. const char *name = fdt_get_name(blob, node, NULL);
  1150. fdt_addr_t addr;
  1151. fdt_size_t size;
  1152. addr = fdtdec_get_addr_size_fixed(blob, node, "reg", 0, na, ns,
  1153. &size, false);
  1154. if (addr == FDT_ADDR_T_NONE) {
  1155. debug("failed to read address/size for %s\n", name);
  1156. continue;
  1157. }
  1158. if (addr == carveout->start && (addr + size - 1) ==
  1159. carveout->end) {
  1160. if (phandlep)
  1161. *phandlep = fdt_get_phandle(blob, node);
  1162. return 0;
  1163. }
  1164. }
  1165. /*
  1166. * Unpack the start address and generate the name of the new node
  1167. * base on the basename and the unit-address.
  1168. */
  1169. upper = upper_32_bits(carveout->start);
  1170. lower = lower_32_bits(carveout->start);
  1171. if (na > 1 && upper > 0)
  1172. snprintf(name, sizeof(name), "%s@%x,%x", basename, upper,
  1173. lower);
  1174. else {
  1175. if (upper > 0) {
  1176. debug("address %08x:%08x exceeds addressable space\n",
  1177. upper, lower);
  1178. return -FDT_ERR_BADVALUE;
  1179. }
  1180. snprintf(name, sizeof(name), "%s@%x", basename, lower);
  1181. }
  1182. node = fdt_add_subnode(blob, parent, name);
  1183. if (node < 0)
  1184. return node;
  1185. if (phandlep) {
  1186. err = fdt_generate_phandle(blob, &phandle);
  1187. if (err < 0)
  1188. return err;
  1189. err = fdtdec_set_phandle(blob, node, phandle);
  1190. if (err < 0)
  1191. return err;
  1192. }
  1193. /* store one or two address cells */
  1194. if (na > 1)
  1195. *ptr++ = cpu_to_fdt32(upper);
  1196. *ptr++ = cpu_to_fdt32(lower);
  1197. /* store one or two size cells */
  1198. size = carveout->end - carveout->start + 1;
  1199. upper = upper_32_bits(size);
  1200. lower = lower_32_bits(size);
  1201. if (ns > 1)
  1202. *ptr++ = cpu_to_fdt32(upper);
  1203. *ptr++ = cpu_to_fdt32(lower);
  1204. err = fdt_setprop(blob, node, "reg", cells, (na + ns) * sizeof(*cells));
  1205. if (err < 0)
  1206. return err;
  1207. if (no_map) {
  1208. err = fdt_setprop(blob, node, "no-map", NULL, 0);
  1209. if (err < 0)
  1210. return err;
  1211. }
  1212. /* return the phandle for the new node for the caller to use */
  1213. if (phandlep)
  1214. *phandlep = phandle;
  1215. return 0;
  1216. }
  1217. int fdtdec_get_carveout(const void *blob, const char *node, const char *name,
  1218. unsigned int index, struct fdt_memory *carveout)
  1219. {
  1220. const fdt32_t *prop;
  1221. uint32_t phandle;
  1222. int offset, len;
  1223. fdt_size_t size;
  1224. offset = fdt_path_offset(blob, node);
  1225. if (offset < 0)
  1226. return offset;
  1227. prop = fdt_getprop(blob, offset, name, &len);
  1228. if (!prop) {
  1229. debug("failed to get %s for %s\n", name, node);
  1230. return -FDT_ERR_NOTFOUND;
  1231. }
  1232. if ((len % sizeof(phandle)) != 0) {
  1233. debug("invalid phandle property\n");
  1234. return -FDT_ERR_BADPHANDLE;
  1235. }
  1236. if (len < (sizeof(phandle) * (index + 1))) {
  1237. debug("invalid phandle index\n");
  1238. return -FDT_ERR_BADPHANDLE;
  1239. }
  1240. phandle = fdt32_to_cpu(prop[index]);
  1241. offset = fdt_node_offset_by_phandle(blob, phandle);
  1242. if (offset < 0) {
  1243. debug("failed to find node for phandle %u\n", phandle);
  1244. return offset;
  1245. }
  1246. carveout->start = fdtdec_get_addr_size_auto_noparent(blob, offset,
  1247. "reg", 0, &size,
  1248. true);
  1249. if (carveout->start == FDT_ADDR_T_NONE) {
  1250. debug("failed to read address/size from \"reg\" property\n");
  1251. return -FDT_ERR_NOTFOUND;
  1252. }
  1253. carveout->end = carveout->start + size - 1;
  1254. return 0;
  1255. }
  1256. int fdtdec_set_carveout(void *blob, const char *node, const char *prop_name,
  1257. unsigned int index, const char *name,
  1258. const struct fdt_memory *carveout)
  1259. {
  1260. uint32_t phandle;
  1261. int err, offset, len;
  1262. fdt32_t value;
  1263. void *prop;
  1264. err = fdtdec_add_reserved_memory(blob, name, carveout, &phandle, false);
  1265. if (err < 0) {
  1266. debug("failed to add reserved memory: %d\n", err);
  1267. return err;
  1268. }
  1269. offset = fdt_path_offset(blob, node);
  1270. if (offset < 0) {
  1271. debug("failed to find offset for node %s: %d\n", node, offset);
  1272. return offset;
  1273. }
  1274. value = cpu_to_fdt32(phandle);
  1275. if (!fdt_getprop(blob, offset, prop_name, &len)) {
  1276. if (len == -FDT_ERR_NOTFOUND)
  1277. len = 0;
  1278. else
  1279. return len;
  1280. }
  1281. if ((index + 1) * sizeof(value) > len) {
  1282. err = fdt_setprop_placeholder(blob, offset, prop_name,
  1283. (index + 1) * sizeof(value),
  1284. &prop);
  1285. if (err < 0) {
  1286. debug("failed to resize reserved memory property: %s\n",
  1287. fdt_strerror(err));
  1288. return err;
  1289. }
  1290. }
  1291. err = fdt_setprop_inplace_namelen_partial(blob, offset, prop_name,
  1292. strlen(prop_name),
  1293. index * sizeof(value),
  1294. &value, sizeof(value));
  1295. if (err < 0) {
  1296. debug("failed to update %s property for node %s: %s\n",
  1297. prop_name, node, fdt_strerror(err));
  1298. return err;
  1299. }
  1300. return 0;
  1301. }
  1302. __weak int fdtdec_board_setup(const void *fdt_blob)
  1303. {
  1304. return 0;
  1305. }
  1306. int fdtdec_setup(void)
  1307. {
  1308. int ret;
  1309. #if CONFIG_IS_ENABLED(OF_CONTROL)
  1310. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1311. void *fdt_blob;
  1312. # endif
  1313. # ifdef CONFIG_OF_EMBED
  1314. /* Get a pointer to the FDT */
  1315. # ifdef CONFIG_SPL_BUILD
  1316. gd->fdt_blob = __dtb_dt_spl_begin;
  1317. # else
  1318. gd->fdt_blob = __dtb_dt_begin;
  1319. # endif
  1320. # elif defined(CONFIG_OF_BOARD) || defined(CONFIG_OF_SEPARATE)
  1321. /* Allow the board to override the fdt address. */
  1322. gd->fdt_blob = board_fdt_blob_setup();
  1323. # elif defined(CONFIG_OF_HOSTFILE)
  1324. if (sandbox_read_fdt_from_file()) {
  1325. puts("Failed to read control FDT\n");
  1326. return -1;
  1327. }
  1328. # elif defined(CONFIG_OF_PRIOR_STAGE)
  1329. gd->fdt_blob = (void *)prior_stage_fdt_address;
  1330. # endif
  1331. # ifndef CONFIG_SPL_BUILD
  1332. /* Allow the early environment to override the fdt address */
  1333. gd->fdt_blob = map_sysmem
  1334. (env_get_ulong("fdtcontroladdr", 16,
  1335. (unsigned long)map_to_sysmem(gd->fdt_blob)), 0);
  1336. # endif
  1337. # if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1338. /*
  1339. * Try and uncompress the blob.
  1340. * Unfortunately there is no way to know how big the input blob really
  1341. * is. So let us set the maximum input size arbitrarily high. 16MB
  1342. * ought to be more than enough for packed DTBs.
  1343. */
  1344. if (uncompress_blob(gd->fdt_blob, 0x1000000, &fdt_blob) == 0)
  1345. gd->fdt_blob = fdt_blob;
  1346. /*
  1347. * Check if blob is a FIT images containings DTBs.
  1348. * If so, pick the most relevant
  1349. */
  1350. fdt_blob = locate_dtb_in_fit(gd->fdt_blob);
  1351. if (fdt_blob) {
  1352. gd->multi_dtb_fit = gd->fdt_blob;
  1353. gd->fdt_blob = fdt_blob;
  1354. }
  1355. # endif
  1356. #endif
  1357. ret = fdtdec_prepare_fdt();
  1358. if (!ret)
  1359. ret = fdtdec_board_setup(gd->fdt_blob);
  1360. return ret;
  1361. }
  1362. #if CONFIG_IS_ENABLED(MULTI_DTB_FIT)
  1363. int fdtdec_resetup(int *rescan)
  1364. {
  1365. void *fdt_blob;
  1366. /*
  1367. * If the current DTB is part of a compressed FIT image,
  1368. * try to locate the best match from the uncompressed
  1369. * FIT image stillpresent there. Save the time and space
  1370. * required to uncompress it again.
  1371. */
  1372. if (gd->multi_dtb_fit) {
  1373. fdt_blob = locate_dtb_in_fit(gd->multi_dtb_fit);
  1374. if (fdt_blob == gd->fdt_blob) {
  1375. /*
  1376. * The best match did not change. no need to tear down
  1377. * the DM and rescan the fdt.
  1378. */
  1379. *rescan = 0;
  1380. return 0;
  1381. }
  1382. *rescan = 1;
  1383. gd->fdt_blob = fdt_blob;
  1384. return fdtdec_prepare_fdt();
  1385. }
  1386. /*
  1387. * If multi_dtb_fit is NULL, it means that blob appended to u-boot is
  1388. * not a FIT image containings DTB, but a single DTB. There is no need
  1389. * to teard down DM and rescan the DT in this case.
  1390. */
  1391. *rescan = 0;
  1392. return 0;
  1393. }
  1394. #endif
  1395. int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
  1396. phys_addr_t *basep, phys_size_t *sizep,
  1397. struct bd_info *bd)
  1398. {
  1399. int addr_cells, size_cells;
  1400. const u32 *cell, *end;
  1401. u64 total_size, size, addr;
  1402. int node, child;
  1403. bool auto_size;
  1404. int bank;
  1405. int len;
  1406. debug("%s: board_id=%d\n", __func__, board_id);
  1407. if (!area)
  1408. area = "/memory";
  1409. node = fdt_path_offset(blob, area);
  1410. if (node < 0) {
  1411. debug("No %s node found\n", area);
  1412. return -ENOENT;
  1413. }
  1414. cell = fdt_getprop(blob, node, "reg", &len);
  1415. if (!cell) {
  1416. debug("No reg property found\n");
  1417. return -ENOENT;
  1418. }
  1419. addr_cells = fdt_address_cells(blob, node);
  1420. size_cells = fdt_size_cells(blob, node);
  1421. /* Check the board id and mask */
  1422. for (child = fdt_first_subnode(blob, node);
  1423. child >= 0;
  1424. child = fdt_next_subnode(blob, child)) {
  1425. int match_mask, match_value;
  1426. match_mask = fdtdec_get_int(blob, child, "match-mask", -1);
  1427. match_value = fdtdec_get_int(blob, child, "match-value", -1);
  1428. if (match_value >= 0 &&
  1429. ((board_id & match_mask) == match_value)) {
  1430. /* Found matching mask */
  1431. debug("Found matching mask %d\n", match_mask);
  1432. node = child;
  1433. cell = fdt_getprop(blob, node, "reg", &len);
  1434. if (!cell) {
  1435. debug("No memory-banks property found\n");
  1436. return -EINVAL;
  1437. }
  1438. break;
  1439. }
  1440. }
  1441. /* Note: if no matching subnode was found we use the parent node */
  1442. if (bd) {
  1443. memset(bd->bi_dram, '\0', sizeof(bd->bi_dram[0]) *
  1444. CONFIG_NR_DRAM_BANKS);
  1445. }
  1446. auto_size = fdtdec_get_bool(blob, node, "auto-size");
  1447. total_size = 0;
  1448. end = cell + len / 4 - addr_cells - size_cells;
  1449. debug("cell at %p, end %p\n", cell, end);
  1450. for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
  1451. if (cell > end)
  1452. break;
  1453. addr = 0;
  1454. if (addr_cells == 2)
  1455. addr += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1456. addr += fdt32_to_cpu(*cell++);
  1457. if (bd)
  1458. bd->bi_dram[bank].start = addr;
  1459. if (basep && !bank)
  1460. *basep = (phys_addr_t)addr;
  1461. size = 0;
  1462. if (size_cells == 2)
  1463. size += (u64)fdt32_to_cpu(*cell++) << 32UL;
  1464. size += fdt32_to_cpu(*cell++);
  1465. if (auto_size) {
  1466. u64 new_size;
  1467. debug("Auto-sizing %llx, size %llx: ", addr, size);
  1468. new_size = get_ram_size((long *)(uintptr_t)addr, size);
  1469. if (new_size == size) {
  1470. debug("OK\n");
  1471. } else {
  1472. debug("sized to %llx\n", new_size);
  1473. size = new_size;
  1474. }
  1475. }
  1476. if (bd)
  1477. bd->bi_dram[bank].size = size;
  1478. total_size += size;
  1479. }
  1480. debug("Memory size %llu\n", total_size);
  1481. if (sizep)
  1482. *sizep = (phys_size_t)total_size;
  1483. return 0;
  1484. }
  1485. #endif /* !USE_HOSTCC */