mpc8xxx_gpio.c 7.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2016
  4. * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
  5. *
  6. * based on arch/powerpc/include/asm/mpc85xx_gpio.h, which is
  7. *
  8. * Copyright 2010 eXMeritus, A Boeing Company
  9. * Copyright 2020 NXP
  10. */
  11. #include <common.h>
  12. #include <dm.h>
  13. #include <mapmem.h>
  14. #include <asm/gpio.h>
  15. #include <asm/io.h>
  16. #include <dm/of_access.h>
  17. struct ccsr_gpio {
  18. u32 gpdir;
  19. u32 gpodr;
  20. u32 gpdat;
  21. u32 gpier;
  22. u32 gpimr;
  23. u32 gpicr;
  24. u32 gpibe;
  25. };
  26. struct mpc8xxx_gpio_data {
  27. /* The bank's register base in memory */
  28. struct ccsr_gpio __iomem *base;
  29. /* The address of the registers; used to identify the bank */
  30. ulong addr;
  31. /* The GPIO count of the bank */
  32. uint gpio_count;
  33. /* The GPDAT register cannot be used to determine the value of output
  34. * pins on MPC8572/MPC8536, so we shadow it and use the shadowed value
  35. * for output pins
  36. */
  37. u32 dat_shadow;
  38. ulong type;
  39. bool little_endian;
  40. };
  41. enum {
  42. MPC8XXX_GPIO_TYPE,
  43. MPC5121_GPIO_TYPE,
  44. };
  45. inline u32 gpio_mask(uint gpio)
  46. {
  47. return (1U << (31 - (gpio)));
  48. }
  49. static inline u32 mpc8xxx_gpio_get_val(struct udevice *dev, u32 mask)
  50. {
  51. struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
  52. if (data->little_endian)
  53. return in_le32(&data->base->gpdat) & mask;
  54. else
  55. return in_be32(&data->base->gpdat) & mask;
  56. }
  57. static inline u32 mpc8xxx_gpio_get_dir(struct udevice *dev, u32 mask)
  58. {
  59. struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
  60. if (data->little_endian)
  61. return in_le32(&data->base->gpdir) & mask;
  62. else
  63. return in_be32(&data->base->gpdir) & mask;
  64. }
  65. static inline int mpc8xxx_gpio_open_drain_val(struct udevice *dev, u32 mask)
  66. {
  67. struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
  68. if (data->little_endian)
  69. return in_le32(&data->base->gpodr) & mask;
  70. else
  71. return in_be32(&data->base->gpodr) & mask;
  72. }
  73. static inline void mpc8xxx_gpio_open_drain_on(struct udevice *dev, u32
  74. gpios)
  75. {
  76. struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
  77. /* GPODR register 1 -> open drain on */
  78. if (data->little_endian)
  79. setbits_le32(&data->base->gpodr, gpios);
  80. else
  81. setbits_be32(&data->base->gpodr, gpios);
  82. }
  83. static inline void mpc8xxx_gpio_open_drain_off(struct udevice *dev,
  84. u32 gpios)
  85. {
  86. struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
  87. /* GPODR register 0 -> open drain off (actively driven) */
  88. if (data->little_endian)
  89. clrbits_le32(&data->base->gpodr, gpios);
  90. else
  91. clrbits_be32(&data->base->gpodr, gpios);
  92. }
  93. static int mpc8xxx_gpio_direction_input(struct udevice *dev, uint gpio)
  94. {
  95. struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
  96. u32 mask = gpio_mask(gpio);
  97. /* GPDIR register 0 -> input */
  98. if (data->little_endian)
  99. clrbits_le32(&data->base->gpdir, mask);
  100. else
  101. clrbits_be32(&data->base->gpdir, mask);
  102. return 0;
  103. }
  104. static int mpc8xxx_gpio_set_value(struct udevice *dev, uint gpio, int value)
  105. {
  106. struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
  107. struct ccsr_gpio *base = data->base;
  108. u32 mask = gpio_mask(gpio);
  109. u32 gpdir;
  110. if (value) {
  111. data->dat_shadow |= mask;
  112. } else {
  113. data->dat_shadow &= ~mask;
  114. }
  115. if (data->little_endian)
  116. gpdir = in_le32(&base->gpdir);
  117. else
  118. gpdir = in_be32(&base->gpdir);
  119. gpdir |= gpio_mask(gpio);
  120. if (data->little_endian) {
  121. out_le32(&base->gpdat, gpdir & data->dat_shadow);
  122. out_le32(&base->gpdir, gpdir);
  123. } else {
  124. out_be32(&base->gpdat, gpdir & data->dat_shadow);
  125. out_be32(&base->gpdir, gpdir);
  126. }
  127. return 0;
  128. }
  129. static int mpc8xxx_gpio_direction_output(struct udevice *dev, uint gpio,
  130. int value)
  131. {
  132. struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
  133. /* GPIO 28..31 are input only on MPC5121 */
  134. if (data->type == MPC5121_GPIO_TYPE && gpio >= 28)
  135. return -EINVAL;
  136. return mpc8xxx_gpio_set_value(dev, gpio, value);
  137. }
  138. static int mpc8xxx_gpio_get_value(struct udevice *dev, uint gpio)
  139. {
  140. struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
  141. if (!!mpc8xxx_gpio_get_dir(dev, gpio_mask(gpio))) {
  142. /* Output -> use shadowed value */
  143. return !!(data->dat_shadow & gpio_mask(gpio));
  144. }
  145. /* Input -> read value from GPDAT register */
  146. return !!mpc8xxx_gpio_get_val(dev, gpio_mask(gpio));
  147. }
  148. static int mpc8xxx_gpio_get_function(struct udevice *dev, uint gpio)
  149. {
  150. int dir;
  151. dir = !!mpc8xxx_gpio_get_dir(dev, gpio_mask(gpio));
  152. return dir ? GPIOF_OUTPUT : GPIOF_INPUT;
  153. }
  154. #if CONFIG_IS_ENABLED(OF_CONTROL)
  155. static int mpc8xxx_gpio_ofdata_to_platdata(struct udevice *dev)
  156. {
  157. struct mpc8xxx_gpio_plat *plat = dev_get_plat(dev);
  158. struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
  159. fdt_addr_t addr;
  160. u32 i;
  161. u32 reg[4];
  162. if (ofnode_read_bool(dev->node, "little-endian"))
  163. data->little_endian = true;
  164. if (data->little_endian)
  165. dev_read_u32_array(dev, "reg", reg, 4);
  166. else
  167. dev_read_u32_array(dev, "reg", reg, 2);
  168. if (data->little_endian) {
  169. for (i = 0; i < 2; i++)
  170. reg[i] = be32_to_cpu(reg[i]);
  171. }
  172. addr = dev_translate_address(dev, reg);
  173. plat->addr = addr;
  174. if (data->little_endian)
  175. plat->size = reg[3];
  176. else
  177. plat->size = reg[1];
  178. plat->ngpios = dev_read_u32_default(dev, "ngpios", 32);
  179. return 0;
  180. }
  181. #endif
  182. static int mpc8xxx_gpio_platdata_to_priv(struct udevice *dev)
  183. {
  184. struct mpc8xxx_gpio_data *priv = dev_get_priv(dev);
  185. struct mpc8xxx_gpio_plat *plat = dev_get_plat(dev);
  186. unsigned long size = plat->size;
  187. ulong driver_data = dev_get_driver_data(dev);
  188. if (size == 0)
  189. size = 0x100;
  190. priv->addr = plat->addr;
  191. priv->base = map_sysmem(plat->addr, size);
  192. if (!priv->base)
  193. return -ENOMEM;
  194. priv->gpio_count = plat->ngpios;
  195. priv->dat_shadow = 0;
  196. priv->type = driver_data;
  197. return 0;
  198. }
  199. static int mpc8xxx_gpio_probe(struct udevice *dev)
  200. {
  201. struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
  202. struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
  203. char name[32], *str;
  204. mpc8xxx_gpio_platdata_to_priv(dev);
  205. snprintf(name, sizeof(name), "MPC@%lx_", data->addr);
  206. str = strdup(name);
  207. if (!str)
  208. return -ENOMEM;
  209. if (ofnode_device_is_compatible(dev->node, "fsl,qoriq-gpio")) {
  210. unsigned long gpibe = data->addr + sizeof(struct ccsr_gpio)
  211. - sizeof(u32);
  212. out_be32((unsigned int *)gpibe, 0xffffffff);
  213. }
  214. uc_priv->bank_name = str;
  215. uc_priv->gpio_count = data->gpio_count;
  216. return 0;
  217. }
  218. static const struct dm_gpio_ops gpio_mpc8xxx_ops = {
  219. .direction_input = mpc8xxx_gpio_direction_input,
  220. .direction_output = mpc8xxx_gpio_direction_output,
  221. .get_value = mpc8xxx_gpio_get_value,
  222. .set_value = mpc8xxx_gpio_set_value,
  223. .get_function = mpc8xxx_gpio_get_function,
  224. };
  225. static const struct udevice_id mpc8xxx_gpio_ids[] = {
  226. { .compatible = "fsl,pq3-gpio", .data = MPC8XXX_GPIO_TYPE },
  227. { .compatible = "fsl,mpc8308-gpio", .data = MPC8XXX_GPIO_TYPE },
  228. { .compatible = "fsl,mpc8349-gpio", .data = MPC8XXX_GPIO_TYPE },
  229. { .compatible = "fsl,mpc8572-gpio", .data = MPC8XXX_GPIO_TYPE},
  230. { .compatible = "fsl,mpc8610-gpio", .data = MPC8XXX_GPIO_TYPE},
  231. { .compatible = "fsl,mpc5121-gpio", .data = MPC5121_GPIO_TYPE, },
  232. { .compatible = "fsl,qoriq-gpio", .data = MPC8XXX_GPIO_TYPE },
  233. { /* sentinel */ }
  234. };
  235. U_BOOT_DRIVER(gpio_mpc8xxx) = {
  236. .name = "gpio_mpc8xxx",
  237. .id = UCLASS_GPIO,
  238. .ops = &gpio_mpc8xxx_ops,
  239. #if CONFIG_IS_ENABLED(OF_CONTROL)
  240. .ofdata_to_platdata = mpc8xxx_gpio_ofdata_to_platdata,
  241. .plat_auto = sizeof(struct mpc8xxx_gpio_plat),
  242. .of_match = mpc8xxx_gpio_ids,
  243. #endif
  244. .probe = mpc8xxx_gpio_probe,
  245. .priv_auto = sizeof(struct mpc8xxx_gpio_data),
  246. };