README.mpc837xemds 3.0 KB

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  1. Freescale MPC837xEMDS Board
  2. -----------------------------------------
  3. 1. Board Switches and Jumpers
  4. 1.0 There are four Dual-In-Line Packages(DIP) Switches on MPC837xEMDS board
  5. For some reason, the HW designers describe the switch settings
  6. in terms of 0 and 1, and then map that to physical switches where
  7. the label "On" refers to logic 0 and "Off" is logic 1.
  8. Switch bits are numbered 1 through, like, 4 6 8 or 10, but the
  9. bits may contribute to signals that are numbered based at 0,
  10. and some of those signals may be high-bit-number-0 too. Heed
  11. well the names and labels and do not get confused.
  12. "Off" == 1
  13. "On" == 0
  14. SW4[8] is the bit labeled 8 on Switch 4.
  15. SW2[1:6] refers to bits labeled 1 through 6 in order on switch 2.
  16. SW2[1:8]= 0000_0001 refers to bits labeled 1 through 7 is set as "On"
  17. and bits labeled 8 is set as "Off".
  18. 1.1 For the MPC837xEMDS Processor Board
  19. First, make sure the board default setting is consistent with the
  20. document shipped with your board. Then apply the following setting:
  21. SW3[1-8]= 0011_0000 (BOOTSEQ, ROMLOC setting)
  22. SW4[1-8]= 0000_0110 (core PLL setting)
  23. SW5[1-8]= 1001_1000 (system PLL, boot up from low end of flash)
  24. SW6[1-8]= 0000_1000 (HRCW is read from NOR FLASH)
  25. SW7[1-8]= 0110_1101 (TSEC1/2 interface setting - RGMII)
  26. J3 2-3, TSEC1 LVDD1 with 2.5V
  27. J6 2-3, TSEC2 LVDD2 with 2.5V
  28. J9 2-3, CLKIN from osc on board
  29. J10 removed, CS0 connect to NOR flash; when mounted, CS0 connect to NAND
  30. J11 removed, Hardware Reset Configuration Word load from FLASH(NOR or NAND)
  31. mounted, HRCW load from BCSR.
  32. on board Oscillator: 66M
  33. 2. Memory Map
  34. 2.1. The memory map should look pretty much like this:
  35. 0x0000_0000 0x7fff_ffff DDR 2G
  36. 0x8000_0000 0x8fff_ffff PCI MEM prefetch 256M
  37. 0x9000_0000 0x9fff_ffff PCI MEM non-prefetch 256M
  38. 0xc000_0000 0xdfff_ffff Empty 512M
  39. 0xe000_0000 0xe00f_ffff Int Mem Reg Space 1M
  40. 0xe010_0000 0xe02f_ffff Empty 2M
  41. 0xe030_0000 0xe03f_ffff PCI IO 1M
  42. 0xe040_0000 0xe05f_ffff Empty 2M
  43. 0xe060_0000 0xe060_7fff NAND Flash 32K
  44. 0xf400_0000 0xf7ff_ffff Empty 64M
  45. 0xf800_0000 0xf800_7fff BCSR on CS1 32K
  46. 0xfe00_0000 0xffff_ffff NOR Flash on CS0 32M
  47. 3. Definitions
  48. 3.1 Explanation of NEW definitions in:
  49. include/configs/MPC837XEMDS.h
  50. CONFIG_MPC83xx MPC83xx family for both MPC837x and MPC8360
  51. CONFIG_MPC837x MPC837x specific
  52. CONFIG_MPC837XEMDS MPC837XEMDS board specific
  53. 4. Compilation
  54. Assuming you're using BASH shell:
  55. export CROSS_COMPILE=your-cross-compile-prefix
  56. cd u-boot
  57. make distclean
  58. make MPC837XEMDS_config
  59. make
  60. 5. Downloading and Flashing Images
  61. 5.0 Download over serial line using Kermit:
  62. loadb
  63. [Drop to kermit:
  64. ^\c
  65. send <u-boot-bin-image>
  66. c
  67. ]
  68. Or via tftp:
  69. tftp 40000 u-boot.bin
  70. 5.1 Reflash U-boot Image using U-boot
  71. tftp 40000 u-boot.bin
  72. protect off fe000000 fe1fffff
  73. erase fe000000 fe1fffff
  74. cp.b 40000 fe000000 xxxx
  75. You have to supply the correct byte count with 'xxxx' from the TFTP result log.
  76. 6. Notes
  77. 1) The console baudrate for MPC837XEMDS is 115200bps.