README.AVR32-port-muxing 7.7 KB

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  1. AVR32 Port multiplexer configuration
  2. ====================================
  3. On AVR32 chips, most external I/O pins are routed through a port
  4. multiplexer. There are currently two kinds of port multiplexer
  5. hardware around with different register interfaces:
  6. * PIO (AT32AP700x; this is also used on ARM AT91 chips)
  7. * GPIO (all other AVR32 chips)
  8. The "PIO" variant supports multiplexing up to two peripherals per pin
  9. in addition to GPIO (software control). Each pin has configurable
  10. pull-up, glitch filter, interrupt and multi-drive capabilities.
  11. The "GPIO" variant supports multiplexing up to four peripherals per
  12. pin in addition to GPIO. Each pin has configurable
  13. pull-up/pull-down/buskeeper, glitch filter, interrupt, open-drain and
  14. schmitt-trigger capabilities, as well as configurable drive strength
  15. and slew rate control.
  16. Both controllers are configured using the same API, but the functions
  17. may accept different values for some parameters depending on the
  18. actual portmux implementation, and some parameters may be ignored by
  19. one of the implementation (e.g. the "PIO" implementation will ignore
  20. the drive strength flags since the hardware doesn't support
  21. configurable drive strength.)
  22. Selecting the portmux implementation
  23. ------------------------------------
  24. Since u-boot is lacking a Kconfig-style configuration engine, the
  25. portmux implementation must be selected manually by defining one of
  26. the following symbols:
  27. CONFIG_PORTMUX_PIO
  28. CONFIG_PORTMUX_GPIO
  29. depending on which implementation the chip in question uses.
  30. Identifying pins
  31. ----------------
  32. The portmux configuration functions described below identify the pins
  33. to act on based on two parameters: A "port" (i.e. a block of pins
  34. that somehow belong together) and a pin mask. Both are defined in an
  35. implementation-specific manner.
  36. The available ports are defined on the form
  37. #define PORTMUX_PORT_A (something)
  38. where "A" matches the identifier given in the chip's data sheet, and
  39. "something" is whatever the portmux implementation needs to identify
  40. the port (usually a memory address).
  41. The pin mask is a bitmask where each '1' bit indicates a pin to apply
  42. the current operation to. The width of the bitmask may vary from port
  43. to port, but it is never wider than 32 bits (which is the width of
  44. 'unsigned long' on avr32).
  45. Selecting functions
  46. -------------------
  47. Each pin can either be assigned to one of a predefined set of on-chip
  48. peripherals, or it can be set up to be controlled by software. For the
  49. former case, the portmux implementation defines an enum containing all
  50. the possible peripheral functions that can be selected. For example,
  51. the PIO implementation, which allows multiplexing two peripherals per
  52. pin, defines it like this:
  53. enum portmux_function {
  54. PORTMUX_FUNC_A,
  55. PORTMUX_FUNC_B,
  56. };
  57. To configure a set of pins to be connected to a given peripheral
  58. function, the following function is used.
  59. void portmux_select_peripheral(void *port, unsigned long pin_mask,
  60. enum portmux_function func, unsigned long flags);
  61. To configure a set of pins to be controlled by software (GPIO), the
  62. following function is used. In this case, no "function" argument is
  63. required since "GPIO" is a function in its own right.
  64. void portmux_select_gpio(void *port, unsigned int pin_mask,
  65. unsigned long flags);
  66. Both of these functions take a "flags" parameter which may be used to
  67. alter the default configuration of the pin. This is a bitmask of
  68. various flags defined in an implementation-specific way, but the names
  69. of the flags are the same on all implementations.
  70. PORTMUX_DIR_OUTPUT
  71. PORTMUX_DIR_INPUT
  72. These mutually-exclusive flags configure the initial direction of the
  73. pins. PORTMUX_DIR_OUTPUT means that the pins are driven by the CPU,
  74. while PORTMUX_DIR_INPUT means that the pins are tristated by the CPU.
  75. These flags are ignored by portmux_select_peripheral().
  76. PORTMUX_INIT_HIGH
  77. PORTMUX_INIT_LOW
  78. These mutually-exclusive flags configure the initial state of the
  79. pins: High (Vdd) or low (Vss). They are only effective when
  80. portmux_select_gpio() is called with the PORTMUX_DIR_OUTPUT flag set.
  81. PORTMUX_PULL_UP
  82. PORTMUX_PULL_DOWN
  83. PORTMUX_BUSKEEPER
  84. These mutually-exclusive flags are used to enable any on-chip CMOS
  85. resistors connected to the pins. PORTMUX_PULL_UP causes the pins to be
  86. pulled up to Vdd, PORTMUX_PULL_DOWN causes the pins to be pulled down
  87. to Vss, and PORTMUX_BUSKEEPER will keep the pins in whatever state
  88. they were left in by whatever was driving them last. If none of the
  89. flags are specified, the pins are left floating if no one are driving
  90. them; this is only recommended for always-output pins (e.g. extern
  91. address and control lines driven by the CPU.)
  92. Note that the "PIO" implementation will silently ignore the
  93. PORTMUX_PULL_DOWN flag and interpret PORTMUX_BUSKEEPER as
  94. PORTMUX_PULL_UP.
  95. PORTMUX_DRIVE_MIN
  96. PORTMUX_DRIVE_LOW
  97. PORTMUX_DRIVE_HIGH
  98. PORTMUX_DRIVE_MAX
  99. These mutually-exclusive flags determine the drive strength of the
  100. pins. PORTMUX_DRIVE_MIN will give low power-consumption, but may cause
  101. corruption of high-speed signals. PORTMUX_DRIVE_MAX will give high
  102. power-consumption, but may be necessary on pins toggling at very high
  103. speeds. PORTMUX_DRIVE_LOW and PORTMUX_DRIVE_HIGH specify something in
  104. between the other two.
  105. Note that setting the drive strength too high may cause excessive
  106. overshoot and EMI problems, which may in turn cause signal corruption.
  107. Also note that the "PIO" implementation will silently ignore these
  108. flags.
  109. PORTMUX_OPEN_DRAIN
  110. This flag will configure the pins as "open drain", i.e. setting the
  111. pin state to 0 will drive it low, while setting it to 1 will leave it
  112. floating (or, in most cases, let it be pulled high by an internal or
  113. external pull-up resistor.) In the data sheet for chips using the
  114. "PIO" variant, this mode is called "multi-driver".
  115. Enabling specific peripherals
  116. -----------------------------
  117. In addition to the above functions, each chip provides a set of
  118. functions for setting up the port multiplexer to use a given
  119. peripheral. The following are some of the functions available.
  120. All the functions below take a "drive_strength" parameter, which must
  121. be one of the PORTMUX_DRIVE_x flags specified above. Any other
  122. portmux flags will be silently filtered out.
  123. To set up the External Bus Interface (EBI), call
  124. void portmux_enable_ebi(unsigned int bus_width,
  125. unsigned long flags, unsigned long drive_strength)
  126. where "bus_width" must be either 16 or 32. "flags" can be any
  127. combination of the following flags.
  128. PORTMUX_EBI_CS(x) /* Enable chip select x */
  129. PORTMUX_EBI_NAND /* Enable NAND flash interface */
  130. PORTMUX_EBI_CF(x) /* Enable CompactFlash interface x */
  131. PORTMUX_EBI_NWAIT /* Enable NWAIT signal */
  132. To set up a USART, call
  133. void portmux_enable_usartX(unsigned long drive_strength);
  134. where X is replaced by the USART instance to be configured.
  135. To set up an ethernet MAC:
  136. void portmux_enable_macbX(unsigned long flags,
  137. unsigned long drive_strength);
  138. where X is replaced by the MACB instance to be configured. "flags" can
  139. be any combination of the following flags.
  140. PORTMUX_MACB_RMII /* Just set up the RMII interface */
  141. PORTMUX_MACB_MII /* Set up full MII interface */
  142. PORTMUX_MACB_SPEED /* Enable the SPEED pin */
  143. To set up the MMC controller:
  144. void portmux_enable_mmci(unsigned long slot, unsigned long flags
  145. unsigned long drive_strength);
  146. where "slot" identifies which of the alternative SD card slots to
  147. enable. "flags" can be any combination of the following flags:
  148. PORTMUX_MMCI_4BIT /* Enable 4-bit SD card interface */
  149. PORTMUX_MMCI_8BIT /* Enable 8-bit MMC+ interface */
  150. PORTMUX_MMCI_EXT_PULLUP /* Board has external pull-ups */
  151. To set up a SPI controller:
  152. void portmux_enable_spiX(unsigned long cs_mask,
  153. unsigned long drive_strength);
  154. where X is replaced by the SPI instance to be configured. "cs_mask" is
  155. a 4-bit bitmask specifying which of the four standard chip select
  156. lines to set up as GPIOs.