i2c.h 26 KB

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  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * Copyright (C) 2009 Sergey Kubushyn <ksi@koi8.net>
  4. * Copyright (C) 2009 - 2013 Heiko Schocher <hs@denx.de>
  5. * Changes for multibus/multiadapter I2C support.
  6. *
  7. * (C) Copyright 2001
  8. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
  9. *
  10. * The original I2C interface was
  11. * (C) 2000 by Paolo Scaffardi (arsenio@tin.it)
  12. * AIRVENT SAM s.p.a - RIMINI(ITALY)
  13. * but has been changed substantially.
  14. */
  15. #ifndef _I2C_H_
  16. #define _I2C_H_
  17. /*
  18. * For now there are essentially two parts to this file - driver model
  19. * here at the top, and the older code below (with CONFIG_SYS_I2C being
  20. * most recent). The plan is to migrate everything to driver model.
  21. * The driver model structures and API are separate as they are different
  22. * enough as to be incompatible for compilation purposes.
  23. */
  24. enum dm_i2c_chip_flags {
  25. DM_I2C_CHIP_10BIT = 1 << 0, /* Use 10-bit addressing */
  26. DM_I2C_CHIP_RD_ADDRESS = 1 << 1, /* Send address for each read byte */
  27. DM_I2C_CHIP_WR_ADDRESS = 1 << 2, /* Send address for each write byte */
  28. };
  29. /** enum i2c_speed_mode - standard I2C speed modes */
  30. enum i2c_speed_mode {
  31. IC_SPEED_MODE_STANDARD,
  32. IC_SPEED_MODE_FAST,
  33. IC_SPEED_MODE_FAST_PLUS,
  34. IC_SPEED_MODE_HIGH,
  35. IC_SPEED_MODE_FAST_ULTRA,
  36. IC_SPEED_MODE_COUNT,
  37. };
  38. /** enum i2c_speed_rate - standard I2C speeds in Hz */
  39. enum i2c_speed_rate {
  40. I2C_SPEED_STANDARD_RATE = 100000,
  41. I2C_SPEED_FAST_RATE = 400000,
  42. I2C_SPEED_FAST_PLUS_RATE = 1000000,
  43. I2C_SPEED_HIGH_RATE = 3400000,
  44. I2C_SPEED_FAST_ULTRA_RATE = 5000000,
  45. };
  46. /** enum i2c_address_mode - available address modes */
  47. enum i2c_address_mode {
  48. I2C_MODE_7_BIT,
  49. I2C_MODE_10_BIT
  50. };
  51. struct udevice;
  52. /**
  53. * struct dm_i2c_chip - information about an i2c chip
  54. *
  55. * An I2C chip is a device on the I2C bus. It sits at a particular address
  56. * and normally supports 7-bit or 10-bit addressing.
  57. *
  58. * To obtain this structure, use dev_get_parent_platdata(dev) where dev is
  59. * the chip to examine.
  60. *
  61. * @chip_addr: Chip address on bus
  62. * @offset_len: Length of offset in bytes. A single byte offset can
  63. * represent up to 256 bytes. A value larger than 1 may be
  64. * needed for larger devices.
  65. * @flags: Flags for this chip (dm_i2c_chip_flags)
  66. * @chip_addr_offset_mask: Mask of offset bits within chip_addr. Used for
  67. * devices which steal addresses as part of offset.
  68. * If offset_len is zero, then the offset is encoded
  69. * completely within the chip address itself.
  70. * e.g. a devce with chip address of 0x2c with 512
  71. * registers might use the bottom bit of the address
  72. * to indicate which half of the address space is being
  73. * accessed while still only using 1 byte offset.
  74. * This means it will respond to chip address 0x2c and
  75. * 0x2d.
  76. * A real world example is the Atmel AT24C04. It's
  77. * datasheet explains it's usage of this addressing
  78. * mode.
  79. * @emul: Emulator for this chip address (only used for emulation)
  80. */
  81. struct dm_i2c_chip {
  82. uint chip_addr;
  83. uint offset_len;
  84. uint flags;
  85. uint chip_addr_offset_mask;
  86. #ifdef CONFIG_SANDBOX
  87. struct udevice *emul;
  88. bool test_mode;
  89. #endif
  90. };
  91. /**
  92. * struct dm_i2c_bus- information about an i2c bus
  93. *
  94. * An I2C bus contains 0 or more chips on it, each at its own address. The
  95. * bus can operate at different speeds (measured in Hz, typically 100KHz
  96. * or 400KHz).
  97. *
  98. * To obtain this structure, use dev_get_uclass_priv(bus) where bus is the
  99. * I2C bus udevice.
  100. *
  101. * @speed_hz: Bus speed in hertz (typically 100000)
  102. * @max_transaction_bytes: Maximal size of single I2C transfer
  103. */
  104. struct dm_i2c_bus {
  105. int speed_hz;
  106. int max_transaction_bytes;
  107. };
  108. /*
  109. * Not all of these flags are implemented in the U-Boot API
  110. */
  111. enum dm_i2c_msg_flags {
  112. I2C_M_TEN = 0x0010, /* ten-bit chip address */
  113. I2C_M_RD = 0x0001, /* read data, from slave to master */
  114. I2C_M_STOP = 0x8000, /* send stop after this message */
  115. I2C_M_NOSTART = 0x4000, /* no start before this message */
  116. I2C_M_REV_DIR_ADDR = 0x2000, /* invert polarity of R/W bit */
  117. I2C_M_IGNORE_NAK = 0x1000, /* continue after NAK */
  118. I2C_M_NO_RD_ACK = 0x0800, /* skip the Ack bit on reads */
  119. I2C_M_RECV_LEN = 0x0400, /* length is first received byte */
  120. };
  121. /**
  122. * struct i2c_msg - an I2C message
  123. *
  124. * @addr: Slave address
  125. * @flags: Flags (see enum dm_i2c_msg_flags)
  126. * @len: Length of buffer in bytes, may be 0 for a probe
  127. * @buf: Buffer to send/receive, or NULL if no data
  128. */
  129. struct i2c_msg {
  130. uint addr;
  131. uint flags;
  132. uint len;
  133. u8 *buf;
  134. };
  135. /**
  136. * struct i2c_msg_list - a list of I2C messages
  137. *
  138. * This is called i2c_rdwr_ioctl_data in Linux but the name does not seem
  139. * appropriate in U-Boot.
  140. *
  141. * @msg: Pointer to i2c_msg array
  142. * @nmsgs: Number of elements in the array
  143. */
  144. struct i2c_msg_list {
  145. struct i2c_msg *msgs;
  146. uint nmsgs;
  147. };
  148. /**
  149. * dm_i2c_read() - read bytes from an I2C chip
  150. *
  151. * To obtain an I2C device (called a 'chip') given the I2C bus address you
  152. * can use i2c_get_chip(). To obtain a bus by bus number use
  153. * uclass_get_device_by_seq(UCLASS_I2C, <bus number>).
  154. *
  155. * To set the address length of a devce use i2c_set_addr_len(). It
  156. * defaults to 1.
  157. *
  158. * @dev: Chip to read from
  159. * @offset: Offset within chip to start reading
  160. * @buffer: Place to put data
  161. * @len: Number of bytes to read
  162. *
  163. * @return 0 on success, -ve on failure
  164. */
  165. int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len);
  166. /**
  167. * dm_i2c_write() - write bytes to an I2C chip
  168. *
  169. * See notes for dm_i2c_read() above.
  170. *
  171. * @dev: Chip to write to
  172. * @offset: Offset within chip to start writing
  173. * @buffer: Buffer containing data to write
  174. * @len: Number of bytes to write
  175. *
  176. * @return 0 on success, -ve on failure
  177. */
  178. int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
  179. int len);
  180. /**
  181. * dm_i2c_probe() - probe a particular chip address
  182. *
  183. * This can be useful to check for the existence of a chip on the bus.
  184. * It is typically implemented by writing the chip address to the bus
  185. * and checking that the chip replies with an ACK.
  186. *
  187. * @bus: Bus to probe
  188. * @chip_addr: 7-bit address to probe (10-bit and others are not supported)
  189. * @chip_flags: Flags for the probe (see enum dm_i2c_chip_flags)
  190. * @devp: Returns the device found, or NULL if none
  191. * @return 0 if a chip was found at that address, -ve if not
  192. */
  193. int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
  194. struct udevice **devp);
  195. /**
  196. * dm_i2c_reg_read() - Read a value from an I2C register
  197. *
  198. * This reads a single value from the given address in an I2C chip
  199. *
  200. * @dev: Device to use for transfer
  201. * @addr: Address to read from
  202. * @return value read, or -ve on error
  203. */
  204. int dm_i2c_reg_read(struct udevice *dev, uint offset);
  205. /**
  206. * dm_i2c_reg_write() - Write a value to an I2C register
  207. *
  208. * This writes a single value to the given address in an I2C chip
  209. *
  210. * @dev: Device to use for transfer
  211. * @addr: Address to write to
  212. * @val: Value to write (normally a byte)
  213. * @return 0 on success, -ve on error
  214. */
  215. int dm_i2c_reg_write(struct udevice *dev, uint offset, unsigned int val);
  216. /**
  217. * dm_i2c_xfer() - Transfer messages over I2C
  218. *
  219. * This transfers a raw message. It is best to use dm_i2c_reg_read/write()
  220. * instead.
  221. *
  222. * @dev: Device to use for transfer
  223. * @msg: List of messages to transfer
  224. * @nmsgs: Number of messages to transfer
  225. * @return 0 on success, -ve on error
  226. */
  227. int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs);
  228. /**
  229. * dm_i2c_set_bus_speed() - set the speed of a bus
  230. *
  231. * @bus: Bus to adjust
  232. * @speed: Requested speed in Hz
  233. * @return 0 if OK, -EINVAL for invalid values
  234. */
  235. int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed);
  236. /**
  237. * dm_i2c_get_bus_speed() - get the speed of a bus
  238. *
  239. * @bus: Bus to check
  240. * @return speed of selected I2C bus in Hz, -ve on error
  241. */
  242. int dm_i2c_get_bus_speed(struct udevice *bus);
  243. /**
  244. * i2c_set_chip_flags() - set flags for a chip
  245. *
  246. * Typically addresses are 7 bits, but for 10-bit addresses you should set
  247. * flags to DM_I2C_CHIP_10BIT. All accesses will then use 10-bit addressing.
  248. *
  249. * @dev: Chip to adjust
  250. * @flags: New flags
  251. * @return 0 if OK, -EINVAL if value is unsupported, other -ve value on error
  252. */
  253. int i2c_set_chip_flags(struct udevice *dev, uint flags);
  254. /**
  255. * i2c_get_chip_flags() - get flags for a chip
  256. *
  257. * @dev: Chip to check
  258. * @flagsp: Place to put flags
  259. * @return 0 if OK, other -ve value on error
  260. */
  261. int i2c_get_chip_flags(struct udevice *dev, uint *flagsp);
  262. /**
  263. * i2c_set_offset_len() - set the offset length for a chip
  264. *
  265. * The offset used to access a chip may be up to 4 bytes long. Typically it
  266. * is only 1 byte, which is enough for chips with 256 bytes of memory or
  267. * registers. The default value is 1, but you can call this function to
  268. * change it.
  269. *
  270. * @offset_len: New offset length value (typically 1 or 2)
  271. */
  272. int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len);
  273. /**
  274. * i2c_get_offset_len() - get the offset length for a chip
  275. *
  276. * @return: Current offset length value (typically 1 or 2)
  277. */
  278. int i2c_get_chip_offset_len(struct udevice *dev);
  279. /**
  280. * i2c_set_chip_addr_offset_mask() - set mask of address bits usable by offset
  281. *
  282. * Some devices listen on multiple chip addresses to achieve larger offsets
  283. * than their single or multiple byte offsets would allow for. You can use this
  284. * function to set the bits that are valid to be used for offset overflow.
  285. *
  286. * @mask: The mask to be used for high offset bits within address
  287. * @return 0 if OK, other -ve value on error
  288. */
  289. int i2c_set_chip_addr_offset_mask(struct udevice *dev, uint mask);
  290. /*
  291. * i2c_get_chip_addr_offset_mask() - get mask of address bits usable by offset
  292. *
  293. * @return current chip addr offset mask
  294. */
  295. uint i2c_get_chip_addr_offset_mask(struct udevice *dev);
  296. /**
  297. * i2c_deblock() - recover a bus that is in an unknown state
  298. *
  299. * See the deblock() method in 'struct dm_i2c_ops' for full information
  300. *
  301. * @bus: Bus to recover
  302. * @return 0 if OK, -ve on error
  303. */
  304. int i2c_deblock(struct udevice *bus);
  305. /**
  306. * struct dm_i2c_ops - driver operations for I2C uclass
  307. *
  308. * Drivers should support these operations unless otherwise noted. These
  309. * operations are intended to be used by uclass code, not directly from
  310. * other code.
  311. */
  312. struct dm_i2c_ops {
  313. /**
  314. * xfer() - transfer a list of I2C messages
  315. *
  316. * @bus: Bus to read from
  317. * @msg: List of messages to transfer
  318. * @nmsgs: Number of messages in the list
  319. * @return 0 if OK, -EREMOTEIO if the slave did not ACK a byte,
  320. * -ECOMM if the speed cannot be supported, -EPROTO if the chip
  321. * flags cannot be supported, other -ve value on some other error
  322. */
  323. int (*xfer)(struct udevice *bus, struct i2c_msg *msg, int nmsgs);
  324. /**
  325. * probe_chip() - probe for the presense of a chip address
  326. *
  327. * This function is optional. If omitted, the uclass will send a zero
  328. * length message instead.
  329. *
  330. * @bus: Bus to probe
  331. * @chip_addr: Chip address to probe
  332. * @chip_flags: Probe flags (enum dm_i2c_chip_flags)
  333. * @return 0 if chip was found, -EREMOTEIO if not, -ENOSYS to fall back
  334. * to default probem other -ve value on error
  335. */
  336. int (*probe_chip)(struct udevice *bus, uint chip_addr, uint chip_flags);
  337. /**
  338. * set_bus_speed() - set the speed of a bus (optional)
  339. *
  340. * The bus speed value will be updated by the uclass if this function
  341. * does not return an error. This method is optional - if it is not
  342. * provided then the driver can read the speed from
  343. * dev_get_uclass_priv(bus)->speed_hz
  344. *
  345. * @bus: Bus to adjust
  346. * @speed: Requested speed in Hz
  347. * @return 0 if OK, -EINVAL for invalid values
  348. */
  349. int (*set_bus_speed)(struct udevice *bus, unsigned int speed);
  350. /**
  351. * get_bus_speed() - get the speed of a bus (optional)
  352. *
  353. * Normally this can be provided by the uclass, but if you want your
  354. * driver to check the bus speed by looking at the hardware, you can
  355. * implement that here. This method is optional. This method would
  356. * normally be expected to return dev_get_uclass_priv(bus)->speed_hz.
  357. *
  358. * @bus: Bus to check
  359. * @return speed of selected I2C bus in Hz, -ve on error
  360. */
  361. int (*get_bus_speed)(struct udevice *bus);
  362. /**
  363. * set_flags() - set the flags for a chip (optional)
  364. *
  365. * This is generally implemented by the uclass, but drivers can
  366. * check the value to ensure that unsupported options are not used.
  367. * This method is optional. If provided, this method will always be
  368. * called when the flags change.
  369. *
  370. * @dev: Chip to adjust
  371. * @flags: New flags value
  372. * @return 0 if OK, -EINVAL if value is unsupported
  373. */
  374. int (*set_flags)(struct udevice *dev, uint flags);
  375. /**
  376. * deblock() - recover a bus that is in an unknown state
  377. *
  378. * I2C is a synchronous protocol and resets of the processor in the
  379. * middle of an access can block the I2C Bus until a powerdown of
  380. * the full unit is done. This is because slaves can be stuck
  381. * waiting for addition bus transitions for a transaction that will
  382. * never complete. Resetting the I2C master does not help. The only
  383. * way is to force the bus through a series of transitions to make
  384. * sure that all slaves are done with the transaction. This method
  385. * performs this 'deblocking' if support by the driver.
  386. *
  387. * This method is optional.
  388. */
  389. int (*deblock)(struct udevice *bus);
  390. };
  391. #define i2c_get_ops(dev) ((struct dm_i2c_ops *)(dev)->driver->ops)
  392. /**
  393. * struct i2c_mux_ops - operations for an I2C mux
  394. *
  395. * The current mux state is expected to be stored in the mux itself since
  396. * it is the only thing that knows how to make things work. The mux can
  397. * record the current state and then avoid switching unless it is necessary.
  398. * So select() can be skipped if the mux is already in the correct state.
  399. * Also deselect() can be made a nop if required.
  400. */
  401. struct i2c_mux_ops {
  402. /**
  403. * select() - select one of of I2C buses attached to a mux
  404. *
  405. * This will be called when there is no bus currently selected by the
  406. * mux. This method does not need to deselect the old bus since
  407. * deselect() will be already have been called if necessary.
  408. *
  409. * @mux: Mux device
  410. * @bus: I2C bus to select
  411. * @channel: Channel number correponding to the bus to select
  412. * @return 0 if OK, -ve on error
  413. */
  414. int (*select)(struct udevice *mux, struct udevice *bus, uint channel);
  415. /**
  416. * deselect() - select one of of I2C buses attached to a mux
  417. *
  418. * This is used to deselect the currently selected I2C bus.
  419. *
  420. * @mux: Mux device
  421. * @bus: I2C bus to deselect
  422. * @channel: Channel number correponding to the bus to deselect
  423. * @return 0 if OK, -ve on error
  424. */
  425. int (*deselect)(struct udevice *mux, struct udevice *bus, uint channel);
  426. };
  427. #define i2c_mux_get_ops(dev) ((struct i2c_mux_ops *)(dev)->driver->ops)
  428. /**
  429. * i2c_get_chip() - get a device to use to access a chip on a bus
  430. *
  431. * This returns the device for the given chip address. The device can then
  432. * be used with calls to i2c_read(), i2c_write(), i2c_probe(), etc.
  433. *
  434. * @bus: Bus to examine
  435. * @chip_addr: Chip address for the new device
  436. * @offset_len: Length of a register offset in bytes (normally 1)
  437. * @devp: Returns pointer to new device if found or -ENODEV if not
  438. * found
  439. */
  440. int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
  441. struct udevice **devp);
  442. /**
  443. * i2c_get_chip_for_busnum() - get a device to use to access a chip on
  444. * a bus number
  445. *
  446. * This returns the device for the given chip address on a particular bus
  447. * number.
  448. *
  449. * @busnum: Bus number to examine
  450. * @chip_addr: Chip address for the new device
  451. * @offset_len: Length of a register offset in bytes (normally 1)
  452. * @devp: Returns pointer to new device if found or -ENODEV if not
  453. * found
  454. */
  455. int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
  456. struct udevice **devp);
  457. /**
  458. * i2c_chip_ofdata_to_platdata() - Decode standard I2C platform data
  459. *
  460. * This decodes the chip address from a device tree node and puts it into
  461. * its dm_i2c_chip structure. This should be called in your driver's
  462. * ofdata_to_platdata() method.
  463. *
  464. * @blob: Device tree blob
  465. * @node: Node offset to read from
  466. * @spi: Place to put the decoded information
  467. */
  468. int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip);
  469. /**
  470. * i2c_dump_msgs() - Dump a list of I2C messages
  471. *
  472. * This may be useful for debugging.
  473. *
  474. * @msg: Message list to dump
  475. * @nmsgs: Number of messages
  476. */
  477. void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs);
  478. /**
  479. * i2c_emul_find() - Find an emulator for an i2c sandbox device
  480. *
  481. * This looks at the device's 'emul' phandle
  482. *
  483. * @dev: Device to find an emulator for
  484. * @emulp: Returns the associated emulator, if found *
  485. * @return 0 if OK, -ENOENT or -ENODEV if not found
  486. */
  487. int i2c_emul_find(struct udevice *dev, struct udevice **emulp);
  488. /**
  489. * i2c_emul_get_device() - Find the device being emulated
  490. *
  491. * Given an emulator this returns the associated device
  492. *
  493. * @emul: Emulator for the device
  494. * @return device that @emul is emulating
  495. */
  496. struct udevice *i2c_emul_get_device(struct udevice *emul);
  497. #ifndef CONFIG_DM_I2C
  498. /*
  499. * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
  500. *
  501. * The implementation MUST NOT use static or global variables if the
  502. * I2C routines are used to read SDRAM configuration information
  503. * because this is done before the memories are initialized. Limited
  504. * use of stack-based variables are OK (the initial stack size is
  505. * limited).
  506. *
  507. * WARNING WARNING WARNING WARNING WARNING WARNING WARNING WARNING
  508. */
  509. /*
  510. * Configuration items.
  511. */
  512. #define I2C_RXTX_LEN 128 /* maximum tx/rx buffer length */
  513. #if !defined(CONFIG_SYS_I2C_MAX_HOPS)
  514. /* no muxes used bus = i2c adapters */
  515. #define CONFIG_SYS_I2C_DIRECT_BUS 1
  516. #define CONFIG_SYS_I2C_MAX_HOPS 0
  517. #define CONFIG_SYS_NUM_I2C_BUSES ll_entry_count(struct i2c_adapter, i2c)
  518. #else
  519. /* we use i2c muxes */
  520. #undef CONFIG_SYS_I2C_DIRECT_BUS
  521. #endif
  522. /* define the I2C bus number for RTC and DTT if not already done */
  523. #if !defined(CONFIG_SYS_RTC_BUS_NUM)
  524. #define CONFIG_SYS_RTC_BUS_NUM 0
  525. #endif
  526. #if !defined(CONFIG_SYS_SPD_BUS_NUM)
  527. #define CONFIG_SYS_SPD_BUS_NUM 0
  528. #endif
  529. struct i2c_adapter {
  530. void (*init)(struct i2c_adapter *adap, int speed,
  531. int slaveaddr);
  532. int (*probe)(struct i2c_adapter *adap, uint8_t chip);
  533. int (*read)(struct i2c_adapter *adap, uint8_t chip,
  534. uint addr, int alen, uint8_t *buffer,
  535. int len);
  536. int (*write)(struct i2c_adapter *adap, uint8_t chip,
  537. uint addr, int alen, uint8_t *buffer,
  538. int len);
  539. uint (*set_bus_speed)(struct i2c_adapter *adap,
  540. uint speed);
  541. int speed;
  542. int waitdelay;
  543. int slaveaddr;
  544. int init_done;
  545. int hwadapnr;
  546. char *name;
  547. };
  548. #define U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
  549. _set_speed, _speed, _slaveaddr, _hwadapnr, _name) \
  550. { \
  551. .init = _init, \
  552. .probe = _probe, \
  553. .read = _read, \
  554. .write = _write, \
  555. .set_bus_speed = _set_speed, \
  556. .speed = _speed, \
  557. .slaveaddr = _slaveaddr, \
  558. .init_done = 0, \
  559. .hwadapnr = _hwadapnr, \
  560. .name = #_name \
  561. };
  562. #define U_BOOT_I2C_ADAP_COMPLETE(_name, _init, _probe, _read, _write, \
  563. _set_speed, _speed, _slaveaddr, _hwadapnr) \
  564. ll_entry_declare(struct i2c_adapter, _name, i2c) = \
  565. U_BOOT_I2C_MKENT_COMPLETE(_init, _probe, _read, _write, \
  566. _set_speed, _speed, _slaveaddr, _hwadapnr, _name);
  567. struct i2c_adapter *i2c_get_adapter(int index);
  568. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  569. struct i2c_mux {
  570. int id;
  571. char name[16];
  572. };
  573. struct i2c_next_hop {
  574. struct i2c_mux mux;
  575. uint8_t chip;
  576. uint8_t channel;
  577. };
  578. struct i2c_bus_hose {
  579. int adapter;
  580. struct i2c_next_hop next_hop[CONFIG_SYS_I2C_MAX_HOPS];
  581. };
  582. #define I2C_NULL_HOP {{-1, ""}, 0, 0}
  583. extern struct i2c_bus_hose i2c_bus[];
  584. #define I2C_ADAPTER(bus) i2c_bus[bus].adapter
  585. #else
  586. #define I2C_ADAPTER(bus) bus
  587. #endif
  588. #define I2C_BUS gd->cur_i2c_bus
  589. #define I2C_ADAP_NR(bus) i2c_get_adapter(I2C_ADAPTER(bus))
  590. #define I2C_ADAP I2C_ADAP_NR(gd->cur_i2c_bus)
  591. #define I2C_ADAP_HWNR (I2C_ADAP->hwadapnr)
  592. #ifndef CONFIG_SYS_I2C_DIRECT_BUS
  593. #define I2C_MUX_PCA9540_ID 1
  594. #define I2C_MUX_PCA9540 {I2C_MUX_PCA9540_ID, "PCA9540B"}
  595. #define I2C_MUX_PCA9542_ID 2
  596. #define I2C_MUX_PCA9542 {I2C_MUX_PCA9542_ID, "PCA9542A"}
  597. #define I2C_MUX_PCA9544_ID 3
  598. #define I2C_MUX_PCA9544 {I2C_MUX_PCA9544_ID, "PCA9544A"}
  599. #define I2C_MUX_PCA9547_ID 4
  600. #define I2C_MUX_PCA9547 {I2C_MUX_PCA9547_ID, "PCA9547A"}
  601. #define I2C_MUX_PCA9548_ID 5
  602. #define I2C_MUX_PCA9548 {I2C_MUX_PCA9548_ID, "PCA9548"}
  603. #endif
  604. #ifndef I2C_SOFT_DECLARATIONS
  605. # if (defined(CONFIG_AT91RM9200) || \
  606. defined(CONFIG_AT91SAM9260) || defined(CONFIG_AT91SAM9261) || \
  607. defined(CONFIG_AT91SAM9263))
  608. # define I2C_SOFT_DECLARATIONS at91_pio_t *pio = (at91_pio_t *) ATMEL_BASE_PIOA;
  609. # else
  610. # define I2C_SOFT_DECLARATIONS
  611. # endif
  612. #endif
  613. /*
  614. * Many boards/controllers/drivers don't support an I2C slave interface so
  615. * provide a default slave address for them for use in common code. A real
  616. * value for CONFIG_SYS_I2C_SLAVE should be defined for any board which does
  617. * support a slave interface.
  618. */
  619. #ifndef CONFIG_SYS_I2C_SLAVE
  620. #define CONFIG_SYS_I2C_SLAVE 0xfe
  621. #endif
  622. /*
  623. * Initialization, must be called once on start up, may be called
  624. * repeatedly to change the speed and slave addresses.
  625. */
  626. #ifdef CONFIG_SYS_I2C_EARLY_INIT
  627. void i2c_early_init_f(void);
  628. #endif
  629. void i2c_init(int speed, int slaveaddr);
  630. void i2c_init_board(void);
  631. #ifdef CONFIG_SYS_I2C
  632. /*
  633. * i2c_get_bus_num:
  634. *
  635. * Returns index of currently active I2C bus. Zero-based.
  636. */
  637. unsigned int i2c_get_bus_num(void);
  638. /*
  639. * i2c_set_bus_num:
  640. *
  641. * Change the active I2C bus. Subsequent read/write calls will
  642. * go to this one.
  643. *
  644. * bus - bus index, zero based
  645. *
  646. * Returns: 0 on success, not 0 on failure
  647. *
  648. */
  649. int i2c_set_bus_num(unsigned int bus);
  650. /*
  651. * i2c_init_all():
  652. *
  653. * Initializes all I2C adapters in the system. All i2c_adap structures must
  654. * be initialized beforehead with function pointers and data, including
  655. * speed and slaveaddr. Returns 0 on success, non-0 on failure.
  656. */
  657. void i2c_init_all(void);
  658. /*
  659. * Probe the given I2C chip address. Returns 0 if a chip responded,
  660. * not 0 on failure.
  661. */
  662. int i2c_probe(uint8_t chip);
  663. /*
  664. * Read/Write interface:
  665. * chip: I2C chip address, range 0..127
  666. * addr: Memory (register) address within the chip
  667. * alen: Number of bytes to use for addr (typically 1, 2 for larger
  668. * memories, 0 for register type devices with only one
  669. * register)
  670. * buffer: Where to read/write the data
  671. * len: How many bytes to read/write
  672. *
  673. * Returns: 0 on success, not 0 on failure
  674. */
  675. int i2c_read(uint8_t chip, unsigned int addr, int alen,
  676. uint8_t *buffer, int len);
  677. int i2c_write(uint8_t chip, unsigned int addr, int alen,
  678. uint8_t *buffer, int len);
  679. /*
  680. * Utility routines to read/write registers.
  681. */
  682. uint8_t i2c_reg_read(uint8_t addr, uint8_t reg);
  683. void i2c_reg_write(uint8_t addr, uint8_t reg, uint8_t val);
  684. /*
  685. * i2c_set_bus_speed:
  686. *
  687. * Change the speed of the active I2C bus
  688. *
  689. * speed - bus speed in Hz
  690. *
  691. * Returns: new bus speed
  692. *
  693. */
  694. unsigned int i2c_set_bus_speed(unsigned int speed);
  695. /*
  696. * i2c_get_bus_speed:
  697. *
  698. * Returns speed of currently active I2C bus in Hz
  699. */
  700. unsigned int i2c_get_bus_speed(void);
  701. #else
  702. /*
  703. * Probe the given I2C chip address. Returns 0 if a chip responded,
  704. * not 0 on failure.
  705. */
  706. int i2c_probe(uchar chip);
  707. /*
  708. * Read/Write interface:
  709. * chip: I2C chip address, range 0..127
  710. * addr: Memory (register) address within the chip
  711. * alen: Number of bytes to use for addr (typically 1, 2 for larger
  712. * memories, 0 for register type devices with only one
  713. * register)
  714. * buffer: Where to read/write the data
  715. * len: How many bytes to read/write
  716. *
  717. * Returns: 0 on success, not 0 on failure
  718. */
  719. int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
  720. int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
  721. /*
  722. * Utility routines to read/write registers.
  723. */
  724. static inline u8 i2c_reg_read(u8 addr, u8 reg)
  725. {
  726. u8 buf;
  727. #ifdef DEBUG
  728. printf("%s: addr=0x%02x, reg=0x%02x\n", __func__, addr, reg);
  729. #endif
  730. i2c_read(addr, reg, 1, &buf, 1);
  731. return buf;
  732. }
  733. static inline void i2c_reg_write(u8 addr, u8 reg, u8 val)
  734. {
  735. #ifdef DEBUG
  736. printf("%s: addr=0x%02x, reg=0x%02x, val=0x%02x\n",
  737. __func__, addr, reg, val);
  738. #endif
  739. i2c_write(addr, reg, 1, &val, 1);
  740. }
  741. /*
  742. * Functions for setting the current I2C bus and its speed
  743. */
  744. /*
  745. * i2c_set_bus_num:
  746. *
  747. * Change the active I2C bus. Subsequent read/write calls will
  748. * go to this one.
  749. *
  750. * bus - bus index, zero based
  751. *
  752. * Returns: 0 on success, not 0 on failure
  753. *
  754. */
  755. int i2c_set_bus_num(unsigned int bus);
  756. /*
  757. * i2c_get_bus_num:
  758. *
  759. * Returns index of currently active I2C bus. Zero-based.
  760. */
  761. unsigned int i2c_get_bus_num(void);
  762. /*
  763. * i2c_set_bus_speed:
  764. *
  765. * Change the speed of the active I2C bus
  766. *
  767. * speed - bus speed in Hz
  768. *
  769. * Returns: 0 on success, not 0 on failure
  770. *
  771. */
  772. int i2c_set_bus_speed(unsigned int);
  773. /*
  774. * i2c_get_bus_speed:
  775. *
  776. * Returns speed of currently active I2C bus in Hz
  777. */
  778. unsigned int i2c_get_bus_speed(void);
  779. #endif /* CONFIG_SYS_I2C */
  780. /*
  781. * only for backwardcompatibility, should go away if we switched
  782. * completely to new multibus support.
  783. */
  784. #if defined(CONFIG_SYS_I2C) || defined(CONFIG_I2C_MULTI_BUS)
  785. # if !defined(CONFIG_SYS_MAX_I2C_BUS)
  786. # define CONFIG_SYS_MAX_I2C_BUS 2
  787. # endif
  788. # define I2C_MULTI_BUS 1
  789. #else
  790. # define CONFIG_SYS_MAX_I2C_BUS 1
  791. # define I2C_MULTI_BUS 0
  792. #endif
  793. /* NOTE: These two functions MUST be always_inline to avoid code growth! */
  794. static inline unsigned int I2C_GET_BUS(void) __attribute__((always_inline));
  795. static inline unsigned int I2C_GET_BUS(void)
  796. {
  797. return I2C_MULTI_BUS ? i2c_get_bus_num() : 0;
  798. }
  799. static inline void I2C_SET_BUS(unsigned int bus) __attribute__((always_inline));
  800. static inline void I2C_SET_BUS(unsigned int bus)
  801. {
  802. if (I2C_MULTI_BUS)
  803. i2c_set_bus_num(bus);
  804. }
  805. /* Multi I2C definitions */
  806. enum {
  807. I2C_0, I2C_1, I2C_2, I2C_3, I2C_4, I2C_5, I2C_6, I2C_7,
  808. I2C_8, I2C_9, I2C_10,
  809. };
  810. /**
  811. * Get FDT values for i2c bus.
  812. *
  813. * @param blob Device tree blbo
  814. * @return the number of I2C bus
  815. */
  816. void board_i2c_init(const void *blob);
  817. /**
  818. * Find the I2C bus number by given a FDT I2C node.
  819. *
  820. * @param blob Device tree blbo
  821. * @param node FDT I2C node to find
  822. * @return the number of I2C bus (zero based), or -1 on error
  823. */
  824. int i2c_get_bus_num_fdt(int node);
  825. /**
  826. * Reset the I2C bus represented by the given a FDT I2C node.
  827. *
  828. * @param blob Device tree blbo
  829. * @param node FDT I2C node to find
  830. * @return 0 if port was reset, -1 if not found
  831. */
  832. int i2c_reset_port_fdt(const void *blob, int node);
  833. #endif /* !CONFIG_DM_I2C */
  834. #endif /* _I2C_H_ */