mux.c 3.6 KB

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  1. /*
  2. * pinmux setup for siemens dxr2 board
  3. *
  4. * (C) Copyright 2013 Siemens Schweiz AG
  5. * (C) Heiko Schocher, DENX Software Engineering, hs@denx.de.
  6. *
  7. * Based on:
  8. * u-boot:/board/ti/am335x/mux.c
  9. * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  10. *
  11. * SPDX-License-Identifier: GPL-2.0+
  12. */
  13. #include <common.h>
  14. #include <asm/arch/sys_proto.h>
  15. #include <asm/arch/hardware.h>
  16. #include <asm/arch/mux.h>
  17. #include <asm/io.h>
  18. #include <i2c.h>
  19. #include "board.h"
  20. static struct module_pin_mux uart0_pin_mux[] = {
  21. {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
  22. {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
  23. {-1},
  24. };
  25. static struct module_pin_mux uart3_pin_mux[] = {
  26. {OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */
  27. {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */
  28. {-1},
  29. };
  30. static struct module_pin_mux i2c0_pin_mux[] = {
  31. {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
  32. PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
  33. {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
  34. PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
  35. {-1},
  36. };
  37. static struct module_pin_mux nand_pin_mux[] = {
  38. {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
  39. {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
  40. {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */
  41. {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */
  42. {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */
  43. {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */
  44. {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */
  45. {OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD7 */
  46. {OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */
  47. {OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)}, /* NAND_WPN */
  48. {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */
  49. {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */
  50. {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */
  51. {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */
  52. {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */
  53. {-1},
  54. };
  55. static struct module_pin_mux gpios_pin_mux[] = {
  56. /* DFU button GPIO0_27*/
  57. {OFFSET(gpmc_ad11), (MODE(7) | PULLUDEN | RXACTIVE)},
  58. {OFFSET(gpmc_csn3), MODE(7) }, /* LED0 GPIO2_0 */
  59. {OFFSET(emu0), MODE(7)}, /* LED1 GPIO3_7 */
  60. {-1},
  61. };
  62. static struct module_pin_mux ethernet_pin_mux[] = {
  63. {OFFSET(mii1_col), (MODE(3) | RXACTIVE)},
  64. {OFFSET(mii1_crs), (MODE(1) | RXACTIVE)},
  65. {OFFSET(mii1_rxerr), (MODE(1) | RXACTIVE)},
  66. {OFFSET(mii1_txen), (MODE(1))},
  67. {OFFSET(mii1_rxdv), (MODE(3) | RXACTIVE)},
  68. {OFFSET(mii1_txd3), (MODE(7) | RXACTIVE)},
  69. {OFFSET(mii1_txd2), (MODE(7) | RXACTIVE)},
  70. {OFFSET(mii1_txd1), (MODE(1))},
  71. {OFFSET(mii1_txd0), (MODE(1))},
  72. {OFFSET(mii1_txclk), (MODE(1) | RXACTIVE)},
  73. {OFFSET(mii1_rxclk), (MODE(1) | RXACTIVE)},
  74. {OFFSET(mii1_rxd3), (MODE(1) | RXACTIVE)},
  75. {OFFSET(mii1_rxd2), (MODE(1))},
  76. {OFFSET(mii1_rxd1), (MODE(1) | RXACTIVE)},
  77. {OFFSET(mii1_rxd0), (MODE(1) | RXACTIVE)},
  78. {OFFSET(rmii1_refclk), (MODE(0) | RXACTIVE)},
  79. {OFFSET(mdio_data), (MODE(0) | RXACTIVE | PULLUP_EN)},
  80. {OFFSET(mdio_clk), (MODE(0) | PULLUP_EN)},
  81. {-1},
  82. };
  83. void enable_uart0_pin_mux(void)
  84. {
  85. configure_module_pin_mux(uart0_pin_mux);
  86. }
  87. void enable_uart3_pin_mux(void)
  88. {
  89. configure_module_pin_mux(uart3_pin_mux);
  90. }
  91. void enable_i2c0_pin_mux(void)
  92. {
  93. configure_module_pin_mux(i2c0_pin_mux);
  94. }
  95. void enable_board_pin_mux(void)
  96. {
  97. enable_uart3_pin_mux();
  98. configure_module_pin_mux(nand_pin_mux);
  99. configure_module_pin_mux(ethernet_pin_mux);
  100. configure_module_pin_mux(gpios_pin_mux);
  101. }