stm32prog_serial.c 23 KB

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  1. // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
  2. /*
  3. * Copyright (C) 2020, STMicroelectronics - All Rights Reserved
  4. */
  5. #include <common.h>
  6. #include <console.h>
  7. #include <dfu.h>
  8. #include <malloc.h>
  9. #include <serial.h>
  10. #include <watchdog.h>
  11. #include <dm/lists.h>
  12. #include <dm/device-internal.h>
  13. #include <linux/delay.h>
  14. #include "stm32prog.h"
  15. /* - configuration part -----------------------------*/
  16. #define USART_BL_VERSION 0x40 /* USART bootloader version V4.0*/
  17. #define UBOOT_BL_VERSION 0x03 /* bootloader version V0.3*/
  18. #define DEVICE_ID_BYTE1 0x05 /* MSB byte of device ID*/
  19. #define DEVICE_ID_BYTE2 0x00 /* LSB byte of device ID*/
  20. #define USART_RAM_BUFFER_SIZE 256 /* Size of USART_RAM_Buf buffer*/
  21. /* - Commands -----------------------------*/
  22. #define GET_CMD_COMMAND 0x00 /* Get CMD command*/
  23. #define GET_VER_COMMAND 0x01 /* Get Version command*/
  24. #define GET_ID_COMMAND 0x02 /* Get ID command*/
  25. #define GET_PHASE_COMMAND 0x03 /* Get Phase command*/
  26. #define RM_COMMAND 0x11 /* Read Memory command*/
  27. #define READ_PART_COMMAND 0x12 /* Read Partition command*/
  28. #define START_COMMAND 0x21 /* START command (Go)*/
  29. #define DOWNLOAD_COMMAND 0x31 /* Download command*/
  30. /* existing command for other STM32 but not used */
  31. /* ERASE 0x43 */
  32. /* EXTENDED_ERASE 0x44 */
  33. /* WRITE_UNPROTECTED 0x73 */
  34. /* READOUT_PROTECT 0x82 */
  35. /* READOUT_UNPROTECT 0x92 */
  36. /* - miscellaneous defines ----------------------------------------*/
  37. #define INIT_BYTE 0x7F /*Init Byte ID*/
  38. #define ACK_BYTE 0x79 /*Acknowlede Byte ID*/
  39. #define NACK_BYTE 0x1F /*No Acknowlede Byte ID*/
  40. #define ABORT_BYTE 0x5F /*ABORT*/
  41. struct udevice *down_serial_dev;
  42. const u8 cmd_id[] = {
  43. GET_CMD_COMMAND,
  44. GET_VER_COMMAND,
  45. GET_ID_COMMAND,
  46. GET_PHASE_COMMAND,
  47. RM_COMMAND,
  48. READ_PART_COMMAND,
  49. START_COMMAND,
  50. DOWNLOAD_COMMAND
  51. };
  52. #define NB_CMD sizeof(cmd_id)
  53. /* DFU support for serial *********************************************/
  54. static struct dfu_entity *stm32prog_get_entity(struct stm32prog_data *data)
  55. {
  56. int alt_id;
  57. if (!data->cur_part)
  58. if (data->phase == PHASE_FLASHLAYOUT)
  59. alt_id = 0;
  60. else
  61. return NULL;
  62. else
  63. alt_id = data->cur_part->alt_id;
  64. return dfu_get_entity(alt_id);
  65. }
  66. static int stm32prog_write(struct stm32prog_data *data, u8 *buffer,
  67. u32 buffer_size)
  68. {
  69. struct dfu_entity *dfu_entity;
  70. u8 ret = 0;
  71. dfu_entity = stm32prog_get_entity(data);
  72. if (!dfu_entity)
  73. return -ENODEV;
  74. ret = dfu_write(dfu_entity,
  75. buffer,
  76. buffer_size,
  77. data->dfu_seq);
  78. if (ret) {
  79. stm32prog_err("DFU write failed [%d] cnt: %d",
  80. ret, data->dfu_seq);
  81. }
  82. data->dfu_seq++;
  83. /* handle rollover as in driver/dfu/dfu.c */
  84. data->dfu_seq &= 0xffff;
  85. if (buffer_size == 0)
  86. data->dfu_seq = 0; /* flush done */
  87. return ret;
  88. }
  89. static int stm32prog_read(struct stm32prog_data *data, u8 phase, u32 offset,
  90. u8 *buffer, u32 buffer_size)
  91. {
  92. struct dfu_entity *dfu_entity;
  93. struct stm32prog_part_t *part;
  94. u32 size;
  95. int ret, i;
  96. if (data->dfu_seq) {
  97. stm32prog_err("DFU write pending for phase %d, seq %d",
  98. data->phase, data->dfu_seq);
  99. return -EINVAL;
  100. }
  101. if (phase == PHASE_FLASHLAYOUT || phase > PHASE_LAST_USER) {
  102. stm32prog_err("read failed : phase %d is invalid", phase);
  103. return -EINVAL;
  104. }
  105. if (data->read_phase <= PHASE_LAST_USER &&
  106. phase != data->read_phase) {
  107. /* clear previous read session */
  108. dfu_entity = dfu_get_entity(data->read_phase - 1);
  109. if (dfu_entity)
  110. dfu_transaction_cleanup(dfu_entity);
  111. }
  112. dfu_entity = NULL;
  113. /* found partition for the expected phase */
  114. for (i = 0; i < data->part_nb; i++) {
  115. part = &data->part_array[i];
  116. if (part->id == phase)
  117. dfu_entity = dfu_get_entity(part->alt_id);
  118. }
  119. if (!dfu_entity) {
  120. stm32prog_err("read failed : phase %d is unknown", phase);
  121. return -ENODEV;
  122. }
  123. /* clear pending read before to force offset */
  124. if (dfu_entity->inited &&
  125. (data->read_phase != phase || data->offset != offset))
  126. dfu_transaction_cleanup(dfu_entity);
  127. /* initiate before to force offset */
  128. if (!dfu_entity->inited) {
  129. ret = dfu_transaction_initiate(dfu_entity, true);
  130. if (ret < 0) {
  131. stm32prog_err("DFU read init failed [%d] phase = %d offset = 0x%08x",
  132. ret, phase, offset);
  133. return ret;
  134. }
  135. }
  136. /* force new offset */
  137. if (dfu_entity->offset != offset)
  138. dfu_entity->offset = offset;
  139. data->offset = offset;
  140. data->read_phase = phase;
  141. pr_debug("\nSTM32 download read %s offset=0x%x\n",
  142. dfu_entity->name, offset);
  143. ret = dfu_read(dfu_entity, buffer, buffer_size,
  144. dfu_entity->i_blk_seq_num);
  145. if (ret < 0) {
  146. stm32prog_err("DFU read failed [%d] phase = %d offset = 0x%08x",
  147. ret, phase, offset);
  148. return ret;
  149. }
  150. size = ret;
  151. if (size < buffer_size) {
  152. data->offset = 0;
  153. data->read_phase = PHASE_END;
  154. memset(buffer + size, 0, buffer_size - size);
  155. } else {
  156. data->offset += size;
  157. }
  158. return ret;
  159. }
  160. /* UART access ***************************************************/
  161. int stm32prog_serial_init(struct stm32prog_data *data, int link_dev)
  162. {
  163. struct udevice *dev = NULL;
  164. int node;
  165. char alias[10];
  166. const char *path;
  167. struct dm_serial_ops *ops;
  168. /* no parity, 8 bits, 1 stop */
  169. u32 serial_config = SERIAL_DEFAULT_CONFIG;
  170. down_serial_dev = NULL;
  171. sprintf(alias, "serial%d", link_dev);
  172. path = fdt_get_alias(gd->fdt_blob, alias);
  173. if (!path) {
  174. pr_err("%s alias not found", alias);
  175. return -ENODEV;
  176. }
  177. node = fdt_path_offset(gd->fdt_blob, path);
  178. if (!uclass_get_device_by_of_offset(UCLASS_SERIAL, node,
  179. &dev)) {
  180. down_serial_dev = dev;
  181. } else if (node > 0 &&
  182. !lists_bind_fdt(gd->dm_root, offset_to_ofnode(node),
  183. &dev, false)) {
  184. if (!device_probe(dev))
  185. down_serial_dev = dev;
  186. }
  187. if (!down_serial_dev) {
  188. pr_err("%s = %s device not found", alias, path);
  189. return -ENODEV;
  190. }
  191. /* force silent console on uart only when used */
  192. if (gd->cur_serial_dev == down_serial_dev)
  193. gd->flags |= GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT;
  194. else
  195. gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
  196. ops = serial_get_ops(down_serial_dev);
  197. if (!ops) {
  198. pr_err("%s = %s missing ops", alias, path);
  199. return -ENODEV;
  200. }
  201. if (!ops->setconfig) {
  202. pr_err("%s = %s missing setconfig", alias, path);
  203. return -ENODEV;
  204. }
  205. clrsetbits_le32(&serial_config, SERIAL_PAR_MASK, SERIAL_PAR_EVEN);
  206. data->buffer = memalign(CONFIG_SYS_CACHELINE_SIZE,
  207. USART_RAM_BUFFER_SIZE);
  208. return ops->setconfig(down_serial_dev, serial_config);
  209. }
  210. static void stm32prog_serial_flush(void)
  211. {
  212. struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
  213. int err;
  214. do {
  215. err = ops->getc(down_serial_dev);
  216. } while (err != -EAGAIN);
  217. }
  218. static int stm32prog_serial_getc_err(void)
  219. {
  220. struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
  221. int err;
  222. do {
  223. err = ops->getc(down_serial_dev);
  224. if (err == -EAGAIN) {
  225. ctrlc();
  226. WATCHDOG_RESET();
  227. }
  228. } while ((err == -EAGAIN) && (!had_ctrlc()));
  229. return err;
  230. }
  231. static u8 stm32prog_serial_getc(void)
  232. {
  233. int err;
  234. err = stm32prog_serial_getc_err();
  235. return err >= 0 ? err : 0;
  236. }
  237. static bool stm32prog_serial_get_buffer(u8 *buffer, u32 *count)
  238. {
  239. struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
  240. int err;
  241. do {
  242. err = ops->getc(down_serial_dev);
  243. if (err >= 0) {
  244. *buffer++ = err;
  245. *count -= 1;
  246. } else if (err == -EAGAIN) {
  247. ctrlc();
  248. WATCHDOG_RESET();
  249. } else {
  250. break;
  251. }
  252. } while (*count && !had_ctrlc());
  253. return !!(err < 0);
  254. }
  255. static void stm32prog_serial_putc(u8 w_byte)
  256. {
  257. struct dm_serial_ops *ops = serial_get_ops(down_serial_dev);
  258. int err;
  259. do {
  260. err = ops->putc(down_serial_dev, w_byte);
  261. } while (err == -EAGAIN);
  262. }
  263. /* Helper function ************************************************/
  264. static u8 stm32prog_header(struct stm32prog_data *data)
  265. {
  266. u8 ret;
  267. u8 boot = 0;
  268. struct dfu_entity *dfu_entity;
  269. u64 size = 0;
  270. dfu_entity = stm32prog_get_entity(data);
  271. if (!dfu_entity)
  272. return -ENODEV;
  273. printf("\nSTM32 download write %s\n", dfu_entity->name);
  274. /* force cleanup to avoid issue with previous read */
  275. dfu_transaction_cleanup(dfu_entity);
  276. ret = stm32prog_header_check(data->header_data,
  277. &data->header);
  278. /* no header : max size is partition size */
  279. if (ret) {
  280. dfu_entity->get_medium_size(dfu_entity, &size);
  281. data->header.image_length = size;
  282. }
  283. /**** Flash the header if necessary for boot partition */
  284. if (data->phase < PHASE_FIRST_USER)
  285. boot = 1;
  286. /* write header if boot partition */
  287. if (boot) {
  288. if (ret) {
  289. stm32prog_err("invalid header (error %d)", ret);
  290. } else {
  291. ret = stm32prog_write(data,
  292. (u8 *)data->header_data,
  293. BL_HEADER_SIZE);
  294. }
  295. } else {
  296. if (ret)
  297. printf(" partition without checksum\n");
  298. ret = 0;
  299. }
  300. free(data->header_data);
  301. data->header_data = NULL;
  302. return ret;
  303. }
  304. static u8 stm32prog_start(struct stm32prog_data *data, u32 address)
  305. {
  306. u8 ret = 0;
  307. struct dfu_entity *dfu_entity;
  308. if (address < 0x100) {
  309. if (address == PHASE_OTP)
  310. return stm32prog_otp_start(data);
  311. if (address == PHASE_PMIC)
  312. return stm32prog_pmic_start(data);
  313. if (address == PHASE_RESET || address == PHASE_END) {
  314. data->cur_part = NULL;
  315. data->dfu_seq = 0;
  316. data->phase = address;
  317. return 0;
  318. }
  319. if (address != data->phase) {
  320. stm32prog_err("invalid received phase id %d, current phase is %d",
  321. (u8)address, (u8)data->phase);
  322. return -EINVAL;
  323. }
  324. }
  325. /* check the last loaded partition */
  326. if (address == DEFAULT_ADDRESS || address == data->phase) {
  327. switch (data->phase) {
  328. case PHASE_END:
  329. case PHASE_RESET:
  330. case PHASE_DO_RESET:
  331. data->cur_part = NULL;
  332. data->phase = PHASE_DO_RESET;
  333. return 0;
  334. }
  335. dfu_entity = stm32prog_get_entity(data);
  336. if (!dfu_entity)
  337. return -ENODEV;
  338. if (data->dfu_seq) {
  339. ret = dfu_flush(dfu_entity, NULL, 0, data->dfu_seq);
  340. data->dfu_seq = 0;
  341. if (ret) {
  342. stm32prog_err("DFU flush failed [%d]", ret);
  343. return ret;
  344. }
  345. }
  346. printf("\n received length = 0x%x\n", data->cursor);
  347. if (data->header.present) {
  348. if (data->cursor !=
  349. (data->header.image_length + BL_HEADER_SIZE)) {
  350. stm32prog_err("transmission interrupted (length=0x%x expected=0x%x)",
  351. data->cursor,
  352. data->header.image_length +
  353. BL_HEADER_SIZE);
  354. return -EIO;
  355. }
  356. if (data->header.image_checksum != data->checksum) {
  357. stm32prog_err("invalid checksum received (0x%x expected 0x%x)",
  358. data->checksum,
  359. data->header.image_checksum);
  360. return -EIO;
  361. }
  362. printf("\n checksum OK (0x%x)\n", data->checksum);
  363. }
  364. /* update DFU with received flashlayout */
  365. if (data->phase == PHASE_FLASHLAYOUT)
  366. stm32prog_dfu_init(data);
  367. } else {
  368. void (*entry)(void) = (void *)address;
  369. printf("## Starting application at 0x%x ...\n", address);
  370. (*entry)();
  371. printf("## Application terminated\n");
  372. ret = -ENOEXEC;
  373. }
  374. return ret;
  375. }
  376. /**
  377. * get_address() - Get address if it is valid
  378. *
  379. * @tmp_xor: Current xor value to update
  380. * @return The address area
  381. */
  382. static u32 get_address(u8 *tmp_xor)
  383. {
  384. u32 address = 0x0;
  385. u8 data;
  386. data = stm32prog_serial_getc();
  387. *tmp_xor ^= data;
  388. address |= ((u32)data) << 24;
  389. data = stm32prog_serial_getc();
  390. address |= ((u32)data) << 16;
  391. *tmp_xor ^= data;
  392. data = stm32prog_serial_getc();
  393. address |= ((u32)data) << 8;
  394. *tmp_xor ^= data;
  395. data = stm32prog_serial_getc();
  396. address |= ((u32)data);
  397. *tmp_xor ^= data;
  398. return address;
  399. }
  400. static void stm32prog_serial_result(u8 result)
  401. {
  402. /* always flush fifo before to send result */
  403. stm32prog_serial_flush();
  404. stm32prog_serial_putc(result);
  405. }
  406. /* Command -----------------------------------------------*/
  407. /**
  408. * get_cmd_command() - Respond to Get command
  409. *
  410. * @data: Current command context
  411. */
  412. static void get_cmd_command(struct stm32prog_data *data)
  413. {
  414. u32 counter = 0x0;
  415. stm32prog_serial_putc(NB_CMD);
  416. stm32prog_serial_putc(USART_BL_VERSION);
  417. for (counter = 0; counter < NB_CMD; counter++)
  418. stm32prog_serial_putc(cmd_id[counter]);
  419. stm32prog_serial_result(ACK_BYTE);
  420. }
  421. /**
  422. * get_version_command() - Respond to Get Version command
  423. *
  424. * @data: Current command context
  425. */
  426. static void get_version_command(struct stm32prog_data *data)
  427. {
  428. stm32prog_serial_putc(UBOOT_BL_VERSION);
  429. stm32prog_serial_result(ACK_BYTE);
  430. }
  431. /**
  432. * get_id_command() - Respond to Get ID command
  433. *
  434. * @data: Current command context
  435. */
  436. static void get_id_command(struct stm32prog_data *data)
  437. {
  438. /* Send Device IDCode */
  439. stm32prog_serial_putc(0x1);
  440. stm32prog_serial_putc(DEVICE_ID_BYTE1);
  441. stm32prog_serial_putc(DEVICE_ID_BYTE2);
  442. stm32prog_serial_result(ACK_BYTE);
  443. }
  444. /**
  445. * get_phase_command() - Respond to Get phase
  446. *
  447. * @data: Current command context
  448. */
  449. static void get_phase_command(struct stm32prog_data *data)
  450. {
  451. char *err_msg = NULL;
  452. u8 i, length = 0;
  453. u32 destination = DEFAULT_ADDRESS; /* destination address */
  454. int phase = data->phase;
  455. if (phase == PHASE_RESET || phase == PHASE_DO_RESET) {
  456. err_msg = stm32prog_get_error(data);
  457. length = strlen(err_msg);
  458. }
  459. if (phase == PHASE_FLASHLAYOUT)
  460. destination = STM32_DDR_BASE;
  461. stm32prog_serial_putc(length + 5); /* Total length */
  462. stm32prog_serial_putc(phase & 0xFF); /* partition ID */
  463. stm32prog_serial_putc(destination); /* byte 1 of address */
  464. stm32prog_serial_putc(destination >> 8); /* byte 2 of address */
  465. stm32prog_serial_putc(destination >> 16); /* byte 3 of address */
  466. stm32prog_serial_putc(destination >> 24); /* byte 4 of address */
  467. stm32prog_serial_putc(length); /* Information length */
  468. for (i = 0; i < length; i++)
  469. stm32prog_serial_putc(err_msg[i]);
  470. stm32prog_serial_result(ACK_BYTE);
  471. if (phase == PHASE_RESET)
  472. stm32prog_do_reset(data);
  473. }
  474. /**
  475. * read_memory_command() - Read data from memory
  476. *
  477. * @data: Current command context
  478. */
  479. static void read_memory_command(struct stm32prog_data *data)
  480. {
  481. u32 address = 0x0;
  482. u8 rcv_data = 0x0, tmp_xor = 0x0;
  483. u32 counter = 0x0;
  484. /* Read memory address */
  485. address = get_address(&tmp_xor);
  486. /* If address memory is not received correctly */
  487. rcv_data = stm32prog_serial_getc();
  488. if (rcv_data != tmp_xor) {
  489. stm32prog_serial_result(NACK_BYTE);
  490. return;
  491. }
  492. stm32prog_serial_result(ACK_BYTE);
  493. /* Read the number of bytes to be received:
  494. * Max NbrOfData = Data + 1 = 256
  495. */
  496. rcv_data = stm32prog_serial_getc();
  497. tmp_xor = ~rcv_data;
  498. if (stm32prog_serial_getc() != tmp_xor) {
  499. stm32prog_serial_result(NACK_BYTE);
  500. return;
  501. }
  502. /* If checksum is correct send ACK */
  503. stm32prog_serial_result(ACK_BYTE);
  504. /* Send data to the host:
  505. * Number of data to read = data + 1
  506. */
  507. for (counter = (rcv_data + 1); counter != 0; counter--)
  508. stm32prog_serial_putc(*(u8 *)(address++));
  509. }
  510. /**
  511. * start_command() - Respond to start command
  512. *
  513. * Jump to user application in RAM or partition check
  514. *
  515. * @data: Current command context
  516. */
  517. static void start_command(struct stm32prog_data *data)
  518. {
  519. u32 address = 0;
  520. u8 tmp_xor = 0x0;
  521. u8 ret, rcv_data;
  522. /* Read memory address */
  523. address = get_address(&tmp_xor);
  524. /* If address memory is not received correctly */
  525. rcv_data = stm32prog_serial_getc();
  526. if (rcv_data != tmp_xor) {
  527. stm32prog_serial_result(NACK_BYTE);
  528. return;
  529. }
  530. /* validate partition */
  531. ret = stm32prog_start(data,
  532. address);
  533. if (ret)
  534. stm32prog_serial_result(ABORT_BYTE);
  535. else
  536. stm32prog_serial_result(ACK_BYTE);
  537. }
  538. /**
  539. * download_command() - Respond to download command
  540. *
  541. * Write data to not volatile memory, Flash
  542. *
  543. * @data: Current command context
  544. */
  545. static void download_command(struct stm32prog_data *data)
  546. {
  547. u32 address = 0x0;
  548. u8 my_xor = 0x0;
  549. u8 rcv_xor;
  550. u32 counter = 0x0, codesize = 0x0;
  551. u8 *ramaddress = 0;
  552. u8 rcv_data = 0x0;
  553. struct image_header_s *image_header = &data->header;
  554. u32 cursor = data->cursor;
  555. long size = 0;
  556. u8 operation;
  557. u32 packet_number;
  558. u32 result = ACK_BYTE;
  559. u8 ret;
  560. unsigned int i;
  561. bool error;
  562. int rcv;
  563. address = get_address(&my_xor);
  564. /* If address memory is not received correctly */
  565. rcv_xor = stm32prog_serial_getc();
  566. if (rcv_xor != my_xor) {
  567. result = NACK_BYTE;
  568. goto end;
  569. }
  570. /* If address valid send ACK */
  571. stm32prog_serial_result(ACK_BYTE);
  572. /* get packet number and operation type */
  573. operation = (u8)((u32)address >> 24);
  574. packet_number = ((u32)(((u32)address << 8))) >> 8;
  575. switch (operation) {
  576. /* supported operation */
  577. case PHASE_FLASHLAYOUT:
  578. case PHASE_OTP:
  579. case PHASE_PMIC:
  580. break;
  581. default:
  582. result = NACK_BYTE;
  583. goto end;
  584. }
  585. /* check the packet number */
  586. if (packet_number == 0) {
  587. /* erase: re-initialize the image_header struct */
  588. data->packet_number = 0;
  589. if (data->header_data)
  590. memset(data->header_data, 0, BL_HEADER_SIZE);
  591. else
  592. data->header_data = calloc(1, BL_HEADER_SIZE);
  593. cursor = 0;
  594. data->cursor = 0;
  595. data->checksum = 0;
  596. /*idx = cursor;*/
  597. } else {
  598. data->packet_number++;
  599. }
  600. /* Check with the number of current packet if the device receive
  601. * the true packet
  602. */
  603. if (packet_number != data->packet_number) {
  604. data->packet_number--;
  605. result = NACK_BYTE;
  606. goto end;
  607. }
  608. /*-- Read number of bytes to be written and data -----------*/
  609. /* Read the number of bytes to be written:
  610. * Max NbrOfData = data + 1 <= 256
  611. */
  612. rcv_data = stm32prog_serial_getc();
  613. /* NbrOfData to write = data + 1 */
  614. codesize = rcv_data + 0x01;
  615. if (codesize > USART_RAM_BUFFER_SIZE) {
  616. result = NACK_BYTE;
  617. goto end;
  618. }
  619. /* Checksum Initialization */
  620. my_xor = rcv_data;
  621. /* UART receive data and send to Buffer */
  622. counter = codesize;
  623. error = stm32prog_serial_get_buffer(data->buffer, &counter);
  624. /* read checksum */
  625. if (!error) {
  626. rcv = stm32prog_serial_getc_err();
  627. error = !!(rcv < 0);
  628. rcv_xor = rcv;
  629. }
  630. if (error) {
  631. printf("transmission error on packet %d, byte %d\n",
  632. packet_number, codesize - counter);
  633. /* waiting end of packet before flush & NACK */
  634. mdelay(30);
  635. data->packet_number--;
  636. result = NACK_BYTE;
  637. goto end;
  638. }
  639. /* Compute Checksum */
  640. ramaddress = data->buffer;
  641. for (counter = codesize; counter != 0; counter--)
  642. my_xor ^= *(ramaddress++);
  643. /* If Checksum is incorrect */
  644. if (rcv_xor != my_xor) {
  645. printf("checksum error on packet %d\n",
  646. packet_number);
  647. /* wait to be sure that all data are received
  648. * in the FIFO before flush
  649. */
  650. mdelay(30);
  651. data->packet_number--;
  652. result = NACK_BYTE;
  653. goto end;
  654. }
  655. /* Update current position in buffer */
  656. data->cursor += codesize;
  657. if (operation == PHASE_OTP) {
  658. size = data->cursor - cursor;
  659. /* no header for OTP */
  660. if (stm32prog_otp_write(data, cursor,
  661. data->buffer, &size))
  662. result = ABORT_BYTE;
  663. goto end;
  664. }
  665. if (operation == PHASE_PMIC) {
  666. size = data->cursor - cursor;
  667. /* no header for PMIC */
  668. if (stm32prog_pmic_write(data, cursor,
  669. data->buffer, &size))
  670. result = ABORT_BYTE;
  671. goto end;
  672. }
  673. if (cursor < BL_HEADER_SIZE) {
  674. /* size = portion of header in this chunck */
  675. if (data->cursor >= BL_HEADER_SIZE)
  676. size = BL_HEADER_SIZE - cursor;
  677. else
  678. size = data->cursor - cursor;
  679. memcpy((void *)((u32)(data->header_data) + cursor),
  680. data->buffer, size);
  681. cursor += size;
  682. if (cursor == BL_HEADER_SIZE) {
  683. /* Check and Write the header */
  684. if (stm32prog_header(data)) {
  685. result = ABORT_BYTE;
  686. goto end;
  687. }
  688. } else {
  689. goto end;
  690. }
  691. }
  692. if (image_header->present) {
  693. if (data->cursor <= BL_HEADER_SIZE)
  694. goto end;
  695. /* compute checksum on payload */
  696. for (i = (unsigned long)size; i < codesize; i++)
  697. data->checksum += data->buffer[i];
  698. if (data->cursor >
  699. image_header->image_length + BL_HEADER_SIZE) {
  700. pr_err("expected size exceeded\n");
  701. result = ABORT_BYTE;
  702. goto end;
  703. }
  704. /* write data (payload) */
  705. ret = stm32prog_write(data,
  706. &data->buffer[size],
  707. codesize - size);
  708. } else {
  709. /* write all */
  710. ret = stm32prog_write(data,
  711. data->buffer,
  712. codesize);
  713. }
  714. if (ret)
  715. result = ABORT_BYTE;
  716. end:
  717. stm32prog_serial_result(result);
  718. }
  719. /**
  720. * read_partition() - Respond to read command
  721. *
  722. * Read data from not volatile memory, Flash
  723. *
  724. * @data: Current command context
  725. */
  726. static void read_partition_command(struct stm32prog_data *data)
  727. {
  728. u32 i, part_id, codesize, offset = 0, rcv_data;
  729. long size;
  730. u8 tmp_xor;
  731. int res;
  732. u8 buffer[256];
  733. part_id = stm32prog_serial_getc();
  734. tmp_xor = part_id;
  735. offset = get_address(&tmp_xor);
  736. rcv_data = stm32prog_serial_getc();
  737. if (rcv_data != tmp_xor) {
  738. pr_debug("1st checksum received = %x, computed %x\n",
  739. rcv_data, tmp_xor);
  740. goto error;
  741. }
  742. stm32prog_serial_putc(ACK_BYTE);
  743. /* NbrOfData to read = data + 1 */
  744. rcv_data = stm32prog_serial_getc();
  745. codesize = rcv_data + 0x01;
  746. tmp_xor = rcv_data;
  747. rcv_data = stm32prog_serial_getc();
  748. if ((rcv_data ^ tmp_xor) != 0xFF) {
  749. pr_debug("2nd checksum received = %x, computed %x\n",
  750. rcv_data, tmp_xor);
  751. goto error;
  752. }
  753. pr_debug("%s : %x\n", __func__, part_id);
  754. rcv_data = 0;
  755. switch (part_id) {
  756. case PHASE_OTP:
  757. size = codesize;
  758. if (!stm32prog_otp_read(data, offset, buffer, &size))
  759. rcv_data = size;
  760. break;
  761. case PHASE_PMIC:
  762. size = codesize;
  763. if (!stm32prog_pmic_read(data, offset, buffer, &size))
  764. rcv_data = size;
  765. break;
  766. default:
  767. res = stm32prog_read(data, part_id, offset,
  768. buffer, codesize);
  769. if (res > 0)
  770. rcv_data = res;
  771. break;
  772. }
  773. if (rcv_data > 0) {
  774. stm32prog_serial_putc(ACK_BYTE);
  775. /*----------- Send data to the host -----------*/
  776. for (i = 0; i < rcv_data; i++)
  777. stm32prog_serial_putc(buffer[i]);
  778. /*----------- Send filler to the host -----------*/
  779. for (; i < codesize; i++)
  780. stm32prog_serial_putc(0x0);
  781. return;
  782. }
  783. stm32prog_serial_result(ABORT_BYTE);
  784. return;
  785. error:
  786. stm32prog_serial_result(NACK_BYTE);
  787. }
  788. /* MAIN function = SERIAL LOOP ***********************************************/
  789. /**
  790. * stm32prog_serial_loop() - USART bootloader Loop routine
  791. *
  792. * @data: Current command context
  793. * @return true if reset is needed after loop
  794. */
  795. bool stm32prog_serial_loop(struct stm32prog_data *data)
  796. {
  797. u32 counter = 0x0;
  798. u8 command = 0x0;
  799. u8 found;
  800. int phase = data->phase;
  801. /* element of cmd_func need to aligned with cmd_id[]*/
  802. void (*cmd_func[NB_CMD])(struct stm32prog_data *) = {
  803. /* GET_CMD_COMMAND */ get_cmd_command,
  804. /* GET_VER_COMMAND */ get_version_command,
  805. /* GET_ID_COMMAND */ get_id_command,
  806. /* GET_PHASE_COMMAND */ get_phase_command,
  807. /* RM_COMMAND */ read_memory_command,
  808. /* READ_PART_COMMAND */ read_partition_command,
  809. /* START_COMMAND */ start_command,
  810. /* DOWNLOAD_COMMAND */ download_command
  811. };
  812. /* flush and NACK pending command received during u-boot init
  813. * request command reemit
  814. */
  815. stm32prog_serial_result(NACK_BYTE);
  816. clear_ctrlc(); /* forget any previous Control C */
  817. while (!had_ctrlc()) {
  818. phase = data->phase;
  819. if (phase == PHASE_DO_RESET)
  820. return true;
  821. /* Get the user command: read first byte */
  822. command = stm32prog_serial_getc();
  823. if (command == INIT_BYTE) {
  824. puts("\nConnected\n");
  825. stm32prog_serial_result(ACK_BYTE);
  826. continue;
  827. }
  828. found = 0;
  829. for (counter = 0; counter < NB_CMD; counter++)
  830. if (cmd_id[counter] == command) {
  831. found = 1;
  832. break;
  833. }
  834. if (found)
  835. if ((command ^ stm32prog_serial_getc()) != 0xFF)
  836. found = 0;
  837. if (!found) {
  838. /* wait to be sure that all data are received
  839. * in the FIFO before flush (CMD and XOR)
  840. */
  841. mdelay(3);
  842. stm32prog_serial_result(NACK_BYTE);
  843. } else {
  844. stm32prog_serial_result(ACK_BYTE);
  845. cmd_func[counter](data);
  846. }
  847. WATCHDOG_RESET();
  848. }
  849. /* clean device */
  850. if (gd->cur_serial_dev == down_serial_dev) {
  851. /* restore console on uart */
  852. gd->flags &= ~(GD_FLG_DISABLE_CONSOLE | GD_FLG_SILENT);
  853. }
  854. down_serial_dev = NULL;
  855. return false; /* no reset after ctrlc */
  856. }