efuse.c 5.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2015-2016 Reinhard Pfau <reinhard.pfau@gdsys.cc>
  4. */
  5. #include <config.h>
  6. #include <common.h>
  7. #include <errno.h>
  8. #include <asm/io.h>
  9. #include <asm/arch/cpu.h>
  10. #include <asm/arch/efuse.h>
  11. #include <asm/arch/soc.h>
  12. #include <linux/delay.h>
  13. #include <linux/mbus.h>
  14. #if defined(CONFIG_MVEBU_EFUSE_FAKE)
  15. #define DRY_RUN
  16. #else
  17. #undef DRY_RUN
  18. #endif
  19. #define MBUS_EFUSE_BASE 0xF6000000
  20. #define MBUS_EFUSE_SIZE BIT(20)
  21. #define MVEBU_EFUSE_CONTROL (MVEBU_REGISTER(0xE4008))
  22. enum {
  23. MVEBU_EFUSE_CTRL_PROGRAM_ENABLE = (1 << 31),
  24. };
  25. struct mvebu_hd_efuse {
  26. u32 bits_31_0;
  27. u32 bits_63_32;
  28. u32 bit64;
  29. u32 reserved0;
  30. };
  31. #ifndef DRY_RUN
  32. static struct mvebu_hd_efuse *efuses =
  33. (struct mvebu_hd_efuse *)(MBUS_EFUSE_BASE + 0xF9000);
  34. #else
  35. static struct mvebu_hd_efuse efuses[EFUSE_LINE_MAX + 1];
  36. #endif
  37. static int efuse_initialised;
  38. static struct mvebu_hd_efuse *get_efuse_line(int nr)
  39. {
  40. if (nr < 0 || nr > 63 || !efuse_initialised)
  41. return NULL;
  42. return efuses + nr;
  43. }
  44. static void enable_efuse_program(void)
  45. {
  46. #ifndef DRY_RUN
  47. setbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE);
  48. #endif
  49. }
  50. static void disable_efuse_program(void)
  51. {
  52. #ifndef DRY_RUN
  53. clrbits_le32(MVEBU_EFUSE_CONTROL, MVEBU_EFUSE_CTRL_PROGRAM_ENABLE);
  54. #endif
  55. }
  56. static int do_prog_efuse(struct mvebu_hd_efuse *efuse,
  57. struct efuse_val *new_val, u32 mask0, u32 mask1)
  58. {
  59. struct efuse_val val;
  60. val.dwords.d[0] = readl(&efuse->bits_31_0);
  61. val.dwords.d[1] = readl(&efuse->bits_63_32);
  62. val.lock = readl(&efuse->bit64);
  63. if (val.lock & 1)
  64. return -EPERM;
  65. val.dwords.d[0] |= (new_val->dwords.d[0] & mask0);
  66. val.dwords.d[1] |= (new_val->dwords.d[1] & mask1);
  67. val.lock |= new_val->lock;
  68. writel(val.dwords.d[0], &efuse->bits_31_0);
  69. mdelay(1);
  70. writel(val.dwords.d[1], &efuse->bits_63_32);
  71. mdelay(1);
  72. writel(val.lock, &efuse->bit64);
  73. mdelay(5);
  74. return 0;
  75. }
  76. static int prog_efuse(int nr, struct efuse_val *new_val, u32 mask0, u32 mask1)
  77. {
  78. struct mvebu_hd_efuse *efuse;
  79. int res = 0;
  80. res = mvebu_efuse_init_hw();
  81. if (res)
  82. return res;
  83. efuse = get_efuse_line(nr);
  84. if (!efuse)
  85. return -ENODEV;
  86. if (!new_val)
  87. return -EINVAL;
  88. /* only write a fuse line with lock bit */
  89. if (!new_val->lock)
  90. return -EINVAL;
  91. /* according to specs ECC protection bits must be 0 on write */
  92. if (new_val->bytes.d[7] & 0xFE)
  93. return -EINVAL;
  94. if (!new_val->dwords.d[0] && !new_val->dwords.d[1] && (mask0 | mask1))
  95. return 0;
  96. enable_efuse_program();
  97. res = do_prog_efuse(efuse, new_val, mask0, mask1);
  98. disable_efuse_program();
  99. return res;
  100. }
  101. int mvebu_efuse_init_hw(void)
  102. {
  103. int ret;
  104. if (efuse_initialised)
  105. return 0;
  106. ret = mvebu_mbus_add_window_by_id(
  107. CPU_TARGET_SATA23_DFX, 0xA, MBUS_EFUSE_BASE, MBUS_EFUSE_SIZE);
  108. if (ret)
  109. return ret;
  110. efuse_initialised = 1;
  111. return 0;
  112. }
  113. int mvebu_read_efuse(int nr, struct efuse_val *val)
  114. {
  115. struct mvebu_hd_efuse *efuse;
  116. int res;
  117. res = mvebu_efuse_init_hw();
  118. if (res)
  119. return res;
  120. efuse = get_efuse_line(nr);
  121. if (!efuse)
  122. return -ENODEV;
  123. if (!val)
  124. return -EINVAL;
  125. val->dwords.d[0] = readl(&efuse->bits_31_0);
  126. val->dwords.d[1] = readl(&efuse->bits_63_32);
  127. val->lock = readl(&efuse->bit64);
  128. return 0;
  129. }
  130. int mvebu_write_efuse(int nr, struct efuse_val *val)
  131. {
  132. return prog_efuse(nr, val, ~0, ~0);
  133. }
  134. int mvebu_lock_efuse(int nr)
  135. {
  136. struct efuse_val val = {
  137. .lock = 1,
  138. };
  139. return prog_efuse(nr, &val, 0, 0);
  140. }
  141. /*
  142. * wrapper funcs providing the fuse API
  143. *
  144. * we use the following mapping:
  145. * "bank" -> eFuse line
  146. * "word" -> 0: bits 0-31
  147. * 1: bits 32-63
  148. * 2: bit 64 (lock)
  149. */
  150. static struct efuse_val prog_val;
  151. static int valid_prog_words;
  152. int fuse_read(u32 bank, u32 word, u32 *val)
  153. {
  154. struct efuse_val fuse_line;
  155. int res;
  156. if (bank < EFUSE_LINE_MIN || bank > EFUSE_LINE_MAX || word > 2)
  157. return -EINVAL;
  158. res = mvebu_read_efuse(bank, &fuse_line);
  159. if (res)
  160. return res;
  161. if (word < 2)
  162. *val = fuse_line.dwords.d[word];
  163. else
  164. *val = fuse_line.lock;
  165. return res;
  166. }
  167. int fuse_sense(u32 bank, u32 word, u32 *val)
  168. {
  169. /* not supported */
  170. return -ENOSYS;
  171. }
  172. int fuse_prog(u32 bank, u32 word, u32 val)
  173. {
  174. int res = 0;
  175. /*
  176. * NOTE: Fuse line should be written as whole.
  177. * So how can we do that with this API?
  178. * For now: remember values for word == 0 and word == 1 and write the
  179. * whole line when word == 2.
  180. * This implies that we always require all 3 fuse prog cmds (one for
  181. * for each word) to write a single fuse line.
  182. * Exception is a single write to word 2 which will lock the fuse line.
  183. *
  184. * Hope that will be OK.
  185. */
  186. if (bank < EFUSE_LINE_MIN || bank > EFUSE_LINE_MAX || word > 2)
  187. return -EINVAL;
  188. if (word < 2) {
  189. prog_val.dwords.d[word] = val;
  190. valid_prog_words |= (1 << word);
  191. } else if ((valid_prog_words & 3) == 0 && val) {
  192. res = mvebu_lock_efuse(bank);
  193. valid_prog_words = 0;
  194. } else if ((valid_prog_words & 3) != 3 || !val) {
  195. res = -EINVAL;
  196. } else {
  197. prog_val.lock = val != 0;
  198. res = mvebu_write_efuse(bank, &prog_val);
  199. valid_prog_words = 0;
  200. }
  201. return res;
  202. }
  203. int fuse_override(u32 bank, u32 word, u32 val)
  204. {
  205. /* not supported */
  206. return -ENOSYS;
  207. }