blackstamp.h 6.1 KB

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  1. /*
  2. * U-boot - Configuration file for BlackStamp board
  3. * Configuration by Ben Matthews for UR LLE using bf533-stamp.h
  4. * as a template
  5. * See http://blackfin.uclinux.org/gf/project/blackstamp/
  6. */
  7. #ifndef __CONFIG_BLACKSTAMP_H__
  8. #define __CONFIG_BLACKSTAMP_H__
  9. #include <asm/config-pre.h>
  10. /*
  11. * Debugging: Set these options if you're having problems
  12. */
  13. /*
  14. * #define CONFIG_DEBUG_EARLY_SERIAL
  15. * #define DEBUG
  16. * #define CONFIG_DEBUG_DUMP
  17. * #define CONFIG_DEBUG_DUMP_SYMS
  18. */
  19. #define CONFIG_PANIC_HANG 0
  20. /* CPU Options
  21. * Be sure to set the Silicon Revision Correctly
  22. */
  23. #define CONFIG_BFIN_CPU bf532-0.5
  24. #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_SPI_MASTER
  25. /*
  26. * Board settings
  27. */
  28. #define CONFIG_NET_MULTI
  29. #define CONFIG_SMC91111 1
  30. #define CONFIG_SMC91111_BASE 0x20300300
  31. /* FLASH/ETHERNET uses the same address range
  32. * Depending on what you have the CPLD doing
  33. * this probably isn't needed
  34. */
  35. #define SHARED_RESOURCES 1
  36. /* Is I2C bit-banged? */
  37. #undef CONFIG_SOFT_I2
  38. /*
  39. * Clock Settings
  40. * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
  41. * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
  42. */
  43. /* CONFIG_CLKIN_HZ is any value in Hz */
  44. #define CONFIG_CLKIN_HZ 25000000
  45. /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
  46. /* 1 = CLKIN / 2 */
  47. #define CONFIG_CLKIN_HALF 0
  48. /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
  49. /* 1 = bypass PLL */
  50. #define CONFIG_PLL_BYPASS 0
  51. /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
  52. /* Values can range from 0-63 (where 0 means 64) */
  53. #define CONFIG_VCO_MULT 16
  54. /* CCLK_DIV controls the core clock divider */
  55. /* Values can be 1, 2, 4, or 8 ONLY */
  56. #define CONFIG_CCLK_DIV 1
  57. /* SCLK_DIV controls the system clock divider */
  58. /* Values can range from 1-15 */
  59. #define CONFIG_SCLK_DIV 3
  60. /*
  61. * Network settings
  62. */
  63. #ifdef CONFIG_SMC91111
  64. #define CONFIG_IPADDR 192.168.0.15
  65. #define CONFIG_NETMASK 255.255.255.0
  66. #define CONFIG_GATEWAYIP 192.168.0.1
  67. #define CONFIG_SERVERIP 192.168.0.2
  68. #define CONFIG_HOSTNAME blackstamp
  69. #define CONFIG_ROOTPATH /checkout/uClinux-dist/romfs
  70. #define CONFIG_SYS_AUTOLOAD "no"
  71. /* To remove hardcoding and enable MAC storage in EEPROM */
  72. /* #define CONFIG_ETHADDR 02:80:ad:20:31:b8 */
  73. #endif
  74. #define CONFIG_ENV_IS_IN_SPI_FLASH
  75. #define CONFIG_ENV_OFFSET 0x40000
  76. #define CONFIG_ENV_SIZE 0x2000
  77. #define CONFIG_ENV_SECT_SIZE 0x40000
  78. /*
  79. * SDRAM settings & memory map
  80. */
  81. #define CONFIG_MEM_SIZE 64 /* 128, 64, 32, 16 */
  82. #define CONFIG_MEM_ADD_WDTH 10 /* 8, 9, 10, 11 */
  83. #define CONFIG_SYS_MONITOR_LEN (256 << 10)
  84. #define CONFIG_SYS_MALLOC_LEN (384 << 10)
  85. /*
  86. * Command settings
  87. */
  88. #define CONFIG_SYS_LONGHELP 1
  89. #define CONFIG_CMDLINE_EDITING 1
  90. #define CONFIG_AUTO_COMPLETE 1
  91. #define CONFIG_ENV_OVERWRITE 1
  92. #include <config_cmd_default.h>
  93. #ifdef CONFIG_SMC91111
  94. # define CONFIG_CMD_DHCP
  95. # define CONFIG_CMD_PING
  96. #else
  97. # undef CONFIG_CMD_NET
  98. #endif
  99. #ifdef CONFIG_SOFT_I2C
  100. # define CONFIG_CMD_I2C
  101. #endif
  102. #define CONFIG_CMD_BOOTLDR
  103. #define CONFIG_CMD_CACHE
  104. #define CONFIG_CMD_CPLBINFO
  105. #define CONFIG_CMD_DATE
  106. #define CONFIG_CMD_SF
  107. #define CONFIG_CMD_ELF
  108. #define CONFIG_BOOTDELAY 5
  109. #define CONFIG_BOOTCOMMAND "run ramboot"
  110. #define CONFIG_BOOTARGS \
  111. "root=/dev/mtdblock0 rw " \
  112. "clkin_hz=" MK_STR(CONFIG_CLKIN_HZ) " " \
  113. "earlyprintk=" \
  114. "serial," \
  115. "uart" MK_STR(CONFIG_UART_CONSOLE) "," \
  116. MK_STR(CONFIG_BAUDRATE) " " \
  117. "console=ttyBF0," MK_STR(CONFIG_BAUDRATE)
  118. #if defined(CONFIG_CMD_NET)
  119. # if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
  120. # define UBOOT_ENV_FILE "u-boot.bin"
  121. # else
  122. # define UBOOT_ENV_FILE "u-boot.ldr"
  123. # endif
  124. # if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
  125. # ifdef CONFIG_SPI
  126. # define UBOOT_ENV_UPDATE \
  127. "eeprom write $(loadaddr) 0x0 $(filesize)"
  128. # else
  129. # define UBOOT_ENV_UPDATE \
  130. "sf probe " MK_STR(BFIN_BOOT_SPI_SSEL) ";" \
  131. "sf erase 0 0x40000;" \
  132. "sf write $(loadaddr) 0 $(filesize)"
  133. # endif
  134. # else
  135. # define UBOOT_ENV_UPDATE \
  136. "protect off 0x20000000 0x2003FFFF;" \
  137. "erase 0x20000000 0x2003FFFF;" \
  138. "cp.b $(loadaddr) 0x20000000 $(filesize)"
  139. # endif
  140. # define NETWORK_ENV_SETTINGS \
  141. "ubootfile=" UBOOT_ENV_FILE "\0" \
  142. "update=" \
  143. "tftp $(loadaddr) $(ubootfile);" \
  144. UBOOT_ENV_UPDATE \
  145. "\0" \
  146. "addip=set bootargs $(bootargs) " \
  147. "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):" \
  148. "$(hostname):eth0:off" \
  149. "\0" \
  150. "ramargs=set bootargs " CONFIG_BOOTARGS "\0" \
  151. "ramboot=" \
  152. "tftp $(loadaddr) uImage;" \
  153. "run ramargs;" \
  154. "run addip;" \
  155. "bootm" \
  156. "\0" \
  157. "nfsargs=set bootargs " \
  158. "root=/dev/nfs rw " \
  159. "nfsroot=$(serverip):$(rootpath),tcp,nfsvers=3" \
  160. "\0" \
  161. "nfsboot=" \
  162. "tftp $(loadaddr) vmImage;" \
  163. "run nfsargs;" \
  164. "run addip;" \
  165. "bootm" \
  166. "\0"
  167. #else
  168. # define NETWORK_ENV_SETTINGS
  169. #endif
  170. /*
  171. * Console settings
  172. */
  173. #define CONFIG_BAUDRATE 57600
  174. #define CONFIG_LOADS_ECHO 1
  175. #define CONFIG_UART_CONSOLE 0
  176. /*
  177. * I2C settings
  178. * By default PF2 is used as SDA and PF3 as SCL on the Stamp board
  179. * Located on the expansion connector on pins 86/85
  180. * Note these pins are arbitrarily chosen because we aren't using
  181. * them yet. You can (and probably should) change these values!
  182. */
  183. #ifdef CONFIG_SOFT_I2C
  184. #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF9
  185. #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF8
  186. #define CONFIG_SYS_I2C_SPEED 50000
  187. #define CONFIG_SYS_I2C_SLAVE 0xFE
  188. #endif
  189. /*
  190. * Miscellaneous configurable options
  191. */
  192. #define CONFIG_RTC_BFIN 1
  193. /*
  194. * Serial Flash Infomation
  195. */
  196. #define CONFIG_BFIN_SPI
  197. /* For the M25P64 SCK Should be Kept < 15Mhz */
  198. #define CONFIG_ENV_SPI_MAX_HZ 15000000
  199. #define CONFIG_SF_DEFAULT_SPEED 15000000
  200. #define CONFIG_SPI_FLASH
  201. #define CONFIG_SPI_FLASH_STMICRO
  202. /*
  203. * FLASH organization and environment definitions
  204. */
  205. #define CONFIG_EBIU_AMGCTL_VAL 0xFF
  206. #define CONFIG_EBIU_AMBCTL0_VAL 0xBBC3BBC3
  207. #define CONFIG_EBIU_AMBCTL1_VAL 0x99B39983
  208. #define CONFIG_EBIU_SDRRC_VAL 0x268
  209. #define CONFIG_EBIU_SDGCTL_VAL 0x911109
  210. /* Even though Rev C boards have Parallel Flash
  211. * We aren't supporting it. Newer versions of the
  212. * hardware don't support Parallel Flash at all.
  213. */
  214. #define CONFIG_SYS_NO_FLASH
  215. #undef CONFIG_CMD_IMLS
  216. #undef CONFIG_CMD_JFFS2
  217. #undef CONFIG_CMD_FLASH
  218. #endif