bf561-ezkit.h 3.4 KB

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  1. /*
  2. * U-boot - Configuration file for BF561 EZKIT board
  3. */
  4. #ifndef __CONFIG_BF561_EZKIT_H__
  5. #define __CONFIG_BF561_EZKIT_H__
  6. #include <asm/config-pre.h>
  7. /*
  8. * Processor Settings
  9. */
  10. #define CONFIG_BFIN_CPU bf561-0.3
  11. #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
  12. /*
  13. * Clock Settings
  14. * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
  15. * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
  16. */
  17. /* CONFIG_CLKIN_HZ is any value in Hz */
  18. #define CONFIG_CLKIN_HZ 30000000
  19. /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
  20. /* 1 = CLKIN / 2 */
  21. #define CONFIG_CLKIN_HALF 0
  22. /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
  23. /* 1 = bypass PLL */
  24. #define CONFIG_PLL_BYPASS 0
  25. /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
  26. /* Values can range from 0-63 (where 0 means 64) */
  27. #define CONFIG_VCO_MULT 20
  28. /* CCLK_DIV controls the core clock divider */
  29. /* Values can be 1, 2, 4, or 8 ONLY */
  30. #define CONFIG_CCLK_DIV 1
  31. /* SCLK_DIV controls the system clock divider */
  32. /* Values can range from 1-15 */
  33. #define CONFIG_SCLK_DIV 6
  34. /*
  35. * Memory Settings
  36. */
  37. #define CONFIG_MEM_ADD_WDTH 9
  38. #define CONFIG_MEM_SIZE 64
  39. #define CONFIG_EBIU_SDRRC_VAL 0x306
  40. #define CONFIG_EBIU_SDGCTL_VAL 0x91114d
  41. #define CONFIG_EBIU_AMGCTL_VAL 0x3F
  42. #define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0
  43. #define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0
  44. #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
  45. #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
  46. /*
  47. * Network Settings
  48. */
  49. #define ADI_CMDS_NETWORK 1
  50. #define CONFIG_NET_MULTI
  51. #define CONFIG_SMC91111 1
  52. #define CONFIG_SMC91111_BASE 0x2C010300
  53. #define CONFIG_SMC_USE_32_BIT 1
  54. #define CONFIG_HOSTNAME bf561-ezkit
  55. /* Uncomment next line to use fixed MAC address */
  56. /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
  57. /*
  58. * Flash Settings
  59. */
  60. #define CONFIG_SYS_FLASH_CFI
  61. #define CONFIG_FLASH_CFI_DRIVER
  62. #define CONFIG_SYS_FLASH_CFI_AMD_RESET
  63. #define CONFIG_SYS_FLASH_BASE 0x20000000
  64. #define CONFIG_SYS_MAX_FLASH_BANKS 1
  65. #define CONFIG_SYS_MAX_FLASH_SECT 135
  66. /* The BF561-EZKIT uses a top boot flash */
  67. #define CONFIG_ENV_IS_IN_FLASH 1
  68. #define CONFIG_ENV_ADDR 0x20004000
  69. #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
  70. #define CONFIG_ENV_SIZE 0x2000
  71. #define CONFIG_ENV_SECT_SIZE 0x10000
  72. #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
  73. #define ENV_IS_EMBEDDED
  74. #else
  75. #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
  76. #endif
  77. #ifdef ENV_IS_EMBEDDED
  78. /* WARNING - the following is hand-optimized to fit within
  79. * the sector before the environment sector. If it throws
  80. * an error during compilation remove an object here to get
  81. * it linked after the configuration sector.
  82. */
  83. # define LDS_BOARD_TEXT \
  84. arch/blackfin/cpu/traps.o (.text .text.*); \
  85. arch/blackfin/cpu/interrupt.o (.text .text.*); \
  86. arch/blackfin/cpu/serial.o (.text .text.*); \
  87. common/dlmalloc.o (.text .text.*); \
  88. lib/crc32.o (.text .text.*); \
  89. lib/zlib.o (.text .text.*); \
  90. board/bf561-ezkit/bf561-ezkit.o (.text .text.*); \
  91. . = DEFINED(env_offset) ? env_offset : .; \
  92. common/env_embedded.o (.text .text.*);
  93. #endif
  94. /*
  95. * I2C Settings
  96. */
  97. #define CONFIG_SOFT_I2C
  98. #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF0
  99. #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF1
  100. /*
  101. * Misc Settings
  102. */
  103. #define CONFIG_UART_CONSOLE 0
  104. /*
  105. * Pull in common ADI header for remaining command/environment setup
  106. */
  107. #include <configs/bfin_adi_common.h>
  108. #endif