bf533-stamp.h 5.6 KB

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  1. /*
  2. * U-boot - Configuration file for BF533 STAMP board
  3. */
  4. #ifndef __CONFIG_BF533_STAMP_H__
  5. #define __CONFIG_BF533_STAMP_H__
  6. #include <asm/config-pre.h>
  7. /*
  8. * Processor Settings
  9. */
  10. #define CONFIG_BFIN_CPU bf533-0.3
  11. #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
  12. /*
  13. * Clock Settings
  14. * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
  15. * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
  16. */
  17. /* CONFIG_CLKIN_HZ is any value in Hz */
  18. #define CONFIG_CLKIN_HZ 11059200
  19. /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
  20. /* 1 = CLKIN / 2 */
  21. #define CONFIG_CLKIN_HALF 0
  22. /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
  23. /* 1 = bypass PLL */
  24. #define CONFIG_PLL_BYPASS 0
  25. /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
  26. /* Values can range from 0-63 (where 0 means 64) */
  27. #define CONFIG_VCO_MULT 45
  28. /* CCLK_DIV controls the core clock divider */
  29. /* Values can be 1, 2, 4, or 8 ONLY */
  30. #define CONFIG_CCLK_DIV 1
  31. /* SCLK_DIV controls the system clock divider */
  32. /* Values can range from 1-15 */
  33. #define CONFIG_SCLK_DIV 6 /* note: 1.2 boards can go faster */
  34. /*
  35. * Memory Settings
  36. */
  37. #define CONFIG_MEM_ADD_WDTH 11
  38. #define CONFIG_MEM_SIZE 128
  39. #define CONFIG_EBIU_SDRRC_VAL 0x268
  40. #define CONFIG_EBIU_SDGCTL_VAL 0x911109
  41. #define CONFIG_EBIU_AMGCTL_VAL 0xFF
  42. #define CONFIG_EBIU_AMBCTL0_VAL 0xBBC3BBC3
  43. #define CONFIG_EBIU_AMBCTL1_VAL 0x99B39983
  44. #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
  45. #define CONFIG_SYS_MALLOC_LEN (384 * 1024)
  46. /*
  47. * Network Settings
  48. */
  49. #define ADI_CMDS_NETWORK 1
  50. #define CONFIG_NET_MULTI
  51. #define CONFIG_SMC91111 1
  52. #define CONFIG_SMC91111_BASE 0x20300300
  53. #define SMC91111_EEPROM_INIT() \
  54. do { \
  55. bfin_write_FIO_DIR(bfin_read_FIO_DIR() | PF1 | PF0); \
  56. bfin_write_FIO_FLAG_C(PF1); \
  57. bfin_write_FIO_FLAG_S(PF0); \
  58. SSYNC(); \
  59. } while (0)
  60. #define CONFIG_HOSTNAME bf533-stamp
  61. /* Uncomment next line to use fixed MAC address */
  62. /* #define CONFIG_ETHADDR 02:80:ad:20:31:b8 */
  63. /*
  64. * Flash Settings
  65. */
  66. #define CONFIG_FLASH_CFI_DRIVER
  67. #define CONFIG_SYS_FLASH_BASE 0x20000000
  68. #define CONFIG_SYS_FLASH_CFI
  69. #define CONFIG_SYS_FLASH_CFI_AMD_RESET
  70. #define CONFIG_SYS_MAX_FLASH_BANKS 1
  71. #define CONFIG_SYS_MAX_FLASH_SECT 67
  72. /*
  73. * SPI Settings
  74. */
  75. #define CONFIG_BFIN_SPI
  76. #define CONFIG_ENV_SPI_MAX_HZ 30000000
  77. #define CONFIG_SF_DEFAULT_SPEED 30000000
  78. #define CONFIG_SPI_FLASH
  79. #define CONFIG_SPI_FLASH_ATMEL
  80. #define CONFIG_SPI_FLASH_SPANSION
  81. #define CONFIG_SPI_FLASH_STMICRO
  82. #define CONFIG_SPI_FLASH_WINBOND
  83. /*
  84. * Env Storage Settings
  85. */
  86. #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER)
  87. #define CONFIG_ENV_IS_IN_SPI_FLASH
  88. #define CONFIG_ENV_OFFSET 0x10000
  89. #define CONFIG_ENV_SIZE 0x2000
  90. #define CONFIG_ENV_SECT_SIZE 0x10000
  91. #else
  92. #define CONFIG_ENV_IS_IN_FLASH
  93. #define CONFIG_ENV_OFFSET 0x4000
  94. #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET)
  95. #define CONFIG_ENV_SIZE 0x2000
  96. #define CONFIG_ENV_SECT_SIZE 0x2000
  97. #endif
  98. #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
  99. #define ENV_IS_EMBEDDED
  100. #else
  101. #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
  102. #endif
  103. #ifdef ENV_IS_EMBEDDED
  104. /* WARNING - the following is hand-optimized to fit within
  105. * the sector before the environment sector. If it throws
  106. * an error during compilation remove an object here to get
  107. * it linked after the configuration sector.
  108. */
  109. # define LDS_BOARD_TEXT \
  110. arch/blackfin/cpu/traps.o (.text .text.*); \
  111. arch/blackfin/cpu/interrupt.o (.text .text.*); \
  112. arch/blackfin/cpu/serial.o (.text .text.*); \
  113. common/dlmalloc.o (.text .text.*); \
  114. lib/crc32.o (.text .text.*); \
  115. . = DEFINED(env_offset) ? env_offset : .; \
  116. common/env_embedded.o (.text .text.*);
  117. #endif
  118. /*
  119. * I2C Settings
  120. */
  121. #define CONFIG_SOFT_I2C
  122. #define CONFIG_SOFT_I2C_GPIO_SCL GPIO_PF3
  123. #define CONFIG_SOFT_I2C_GPIO_SDA GPIO_PF2
  124. /*
  125. * Compact Flash / IDE / ATA Settings
  126. */
  127. /* Enabled below option for CF support */
  128. /* #define CONFIG_STAMP_CF */
  129. #if defined(CONFIG_STAMP_CF)
  130. #define CONFIG_MISC_INIT_R
  131. #define CONFIG_DOS_PARTITION 1
  132. #undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */
  133. #undef CONFIG_IDE_LED /* no led for ide supported */
  134. #undef CONFIG_IDE_RESET /* no reset for ide supported */
  135. #define CONFIG_SYS_IDE_MAXBUS 1
  136. #define CONFIG_SYS_IDE_MAXDEVICE (CONFIG_SYS_IDE_MAXBUS * 1)
  137. #define CONFIG_SYS_ATA_BASE_ADDR 0x20200000
  138. #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
  139. #define CONFIG_SYS_ATA_DATA_OFFSET 0x0020 /* data I/O */
  140. #define CONFIG_SYS_ATA_REG_OFFSET 0x0020 /* normal register accesses */
  141. #define CONFIG_SYS_ATA_ALT_OFFSET 0x0007 /* alternate registers */
  142. #define CONFIG_SYS_ATA_STRIDE 2
  143. #undef CONFIG_EBIU_AMBCTL1_VAL
  144. #define CONFIG_EBIU_AMBCTL1_VAL 0x99B3ffc2
  145. #endif
  146. /*
  147. * Misc Settings
  148. */
  149. #define CONFIG_RTC_BFIN
  150. #define CONFIG_UART_CONSOLE 0
  151. /* FLASH/ETHERNET uses the same async bank */
  152. #define SHARED_RESOURCES 1
  153. /* define to enable boot progress via leds */
  154. /* #define CONFIG_SHOW_BOOT_PROGRESS */
  155. /* define to enable run status via led */
  156. /* #define CONFIG_STATUS_LED */
  157. #ifdef CONFIG_STATUS_LED
  158. #define CONFIG_GPIO_LED
  159. #define CONFIG_BOARD_SPECIFIC_LED
  160. /* use LED0 to indicate booting/alive */
  161. #define STATUS_LED_BOOT 0
  162. #define STATUS_LED_BIT GPIO_PF2
  163. #define STATUS_LED_STATE STATUS_LED_ON
  164. #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 4)
  165. /* use LED1 to indicate crash */
  166. #define STATUS_LED_CRASH 1
  167. #define STATUS_LED_BIT1 GPIO_PF3
  168. #define STATUS_LED_STATE1 STATUS_LED_ON
  169. #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2)
  170. /* #define STATUS_LED_BIT2 GPIO_PF4 */
  171. #endif
  172. /* define to enable splash screen support */
  173. /* #define CONFIG_VIDEO */
  174. /*
  175. * Pull in common ADI header for remaining command/environment setup
  176. */
  177. #include <configs/bfin_adi_common.h>
  178. #endif