i2c-uclass.c 16 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2014 Google, Inc
  4. */
  5. #include <common.h>
  6. #include <dm.h>
  7. #include <errno.h>
  8. #include <i2c.h>
  9. #include <malloc.h>
  10. #include <dm/device-internal.h>
  11. #include <dm/lists.h>
  12. #include <dm/pinctrl.h>
  13. #if CONFIG_IS_ENABLED(DM_GPIO)
  14. #include <asm/gpio.h>
  15. #endif
  16. #define I2C_MAX_OFFSET_LEN 4
  17. enum {
  18. PIN_SDA = 0,
  19. PIN_SCL,
  20. PIN_COUNT,
  21. };
  22. /* Useful debugging function */
  23. void i2c_dump_msgs(struct i2c_msg *msg, int nmsgs)
  24. {
  25. int i;
  26. for (i = 0; i < nmsgs; i++) {
  27. struct i2c_msg *m = &msg[i];
  28. printf(" %s %x len=%x", m->flags & I2C_M_RD ? "R" : "W",
  29. msg->addr, msg->len);
  30. if (!(m->flags & I2C_M_RD))
  31. printf(": %x", m->buf[0]);
  32. printf("\n");
  33. }
  34. }
  35. /**
  36. * i2c_setup_offset() - Set up a new message with a chip offset
  37. *
  38. * @chip: Chip to use
  39. * @offset: Byte offset within chip
  40. * @offset_buf: Place to put byte offset
  41. * @msg: Message buffer
  42. * @return 0 if OK, -EADDRNOTAVAIL if the offset length is 0. In that case the
  43. * message is still set up but will not contain an offset.
  44. */
  45. static int i2c_setup_offset(struct dm_i2c_chip *chip, uint offset,
  46. uint8_t offset_buf[], struct i2c_msg *msg)
  47. {
  48. int offset_len;
  49. msg->addr = chip->chip_addr;
  50. msg->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  51. msg->len = chip->offset_len;
  52. msg->buf = offset_buf;
  53. if (!chip->offset_len)
  54. return -EADDRNOTAVAIL;
  55. assert(chip->offset_len <= I2C_MAX_OFFSET_LEN);
  56. offset_len = chip->offset_len;
  57. while (offset_len--)
  58. *offset_buf++ = offset >> (8 * offset_len);
  59. return 0;
  60. }
  61. static int i2c_read_bytewise(struct udevice *dev, uint offset,
  62. uint8_t *buffer, int len)
  63. {
  64. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  65. struct udevice *bus = dev_get_parent(dev);
  66. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  67. struct i2c_msg msg[2], *ptr;
  68. uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
  69. int ret;
  70. int i;
  71. for (i = 0; i < len; i++) {
  72. if (i2c_setup_offset(chip, offset + i, offset_buf, msg))
  73. return -EINVAL;
  74. ptr = msg + 1;
  75. ptr->addr = chip->chip_addr;
  76. ptr->flags = msg->flags | I2C_M_RD;
  77. ptr->len = 1;
  78. ptr->buf = &buffer[i];
  79. ptr++;
  80. ret = ops->xfer(bus, msg, ptr - msg);
  81. if (ret)
  82. return ret;
  83. }
  84. return 0;
  85. }
  86. static int i2c_write_bytewise(struct udevice *dev, uint offset,
  87. const uint8_t *buffer, int len)
  88. {
  89. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  90. struct udevice *bus = dev_get_parent(dev);
  91. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  92. struct i2c_msg msg[1];
  93. uint8_t buf[I2C_MAX_OFFSET_LEN + 1];
  94. int ret;
  95. int i;
  96. for (i = 0; i < len; i++) {
  97. if (i2c_setup_offset(chip, offset + i, buf, msg))
  98. return -EINVAL;
  99. buf[msg->len++] = buffer[i];
  100. ret = ops->xfer(bus, msg, 1);
  101. if (ret)
  102. return ret;
  103. }
  104. return 0;
  105. }
  106. int dm_i2c_read(struct udevice *dev, uint offset, uint8_t *buffer, int len)
  107. {
  108. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  109. struct udevice *bus = dev_get_parent(dev);
  110. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  111. struct i2c_msg msg[2], *ptr;
  112. uint8_t offset_buf[I2C_MAX_OFFSET_LEN];
  113. int msg_count;
  114. if (!ops->xfer)
  115. return -ENOSYS;
  116. if (chip->flags & DM_I2C_CHIP_RD_ADDRESS)
  117. return i2c_read_bytewise(dev, offset, buffer, len);
  118. ptr = msg;
  119. if (!i2c_setup_offset(chip, offset, offset_buf, ptr))
  120. ptr++;
  121. if (len) {
  122. ptr->addr = chip->chip_addr;
  123. ptr->flags = chip->flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  124. ptr->flags |= I2C_M_RD;
  125. ptr->len = len;
  126. ptr->buf = buffer;
  127. ptr++;
  128. }
  129. msg_count = ptr - msg;
  130. return ops->xfer(bus, msg, msg_count);
  131. }
  132. int dm_i2c_write(struct udevice *dev, uint offset, const uint8_t *buffer,
  133. int len)
  134. {
  135. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  136. struct udevice *bus = dev_get_parent(dev);
  137. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  138. struct i2c_msg msg[1];
  139. if (!ops->xfer)
  140. return -ENOSYS;
  141. if (chip->flags & DM_I2C_CHIP_WR_ADDRESS)
  142. return i2c_write_bytewise(dev, offset, buffer, len);
  143. /*
  144. * The simple approach would be to send two messages here: one to
  145. * set the offset and one to write the bytes. However some drivers
  146. * will not be expecting this, and some chips won't like how the
  147. * driver presents this on the I2C bus.
  148. *
  149. * The API does not support separate offset and data. We could extend
  150. * it with a flag indicating that there is data in the next message
  151. * that needs to be processed in the same transaction. We could
  152. * instead add an additional buffer to each message. For now, handle
  153. * this in the uclass since it isn't clear what the impact on drivers
  154. * would be with this extra complication. Unfortunately this means
  155. * copying the message.
  156. *
  157. * Use the stack for small messages, malloc() for larger ones. We
  158. * need to allow space for the offset (up to 4 bytes) and the message
  159. * itself.
  160. */
  161. if (len < 64) {
  162. uint8_t buf[I2C_MAX_OFFSET_LEN + len];
  163. i2c_setup_offset(chip, offset, buf, msg);
  164. msg->len += len;
  165. memcpy(buf + chip->offset_len, buffer, len);
  166. return ops->xfer(bus, msg, 1);
  167. } else {
  168. uint8_t *buf;
  169. int ret;
  170. buf = malloc(I2C_MAX_OFFSET_LEN + len);
  171. if (!buf)
  172. return -ENOMEM;
  173. i2c_setup_offset(chip, offset, buf, msg);
  174. msg->len += len;
  175. memcpy(buf + chip->offset_len, buffer, len);
  176. ret = ops->xfer(bus, msg, 1);
  177. free(buf);
  178. return ret;
  179. }
  180. }
  181. int dm_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
  182. {
  183. struct udevice *bus = dev_get_parent(dev);
  184. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  185. if (!ops->xfer)
  186. return -ENOSYS;
  187. return ops->xfer(bus, msg, nmsgs);
  188. }
  189. int dm_i2c_reg_read(struct udevice *dev, uint offset)
  190. {
  191. uint8_t val;
  192. int ret;
  193. ret = dm_i2c_read(dev, offset, &val, 1);
  194. if (ret < 0)
  195. return ret;
  196. return val;
  197. }
  198. int dm_i2c_reg_write(struct udevice *dev, uint offset, uint value)
  199. {
  200. uint8_t val = value;
  201. return dm_i2c_write(dev, offset, &val, 1);
  202. }
  203. /**
  204. * i2c_probe_chip() - probe for a chip on a bus
  205. *
  206. * @bus: Bus to probe
  207. * @chip_addr: Chip address to probe
  208. * @flags: Flags for the chip
  209. * @return 0 if found, -ENOSYS if the driver is invalid, -EREMOTEIO if the chip
  210. * does not respond to probe
  211. */
  212. static int i2c_probe_chip(struct udevice *bus, uint chip_addr,
  213. enum dm_i2c_chip_flags chip_flags)
  214. {
  215. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  216. struct i2c_msg msg[1];
  217. int ret;
  218. if (ops->probe_chip) {
  219. ret = ops->probe_chip(bus, chip_addr, chip_flags);
  220. if (!ret || ret != -ENOSYS)
  221. return ret;
  222. }
  223. if (!ops->xfer)
  224. return -ENOSYS;
  225. /* Probe with a zero-length message */
  226. msg->addr = chip_addr;
  227. msg->flags = chip_flags & DM_I2C_CHIP_10BIT ? I2C_M_TEN : 0;
  228. msg->len = 0;
  229. msg->buf = NULL;
  230. return ops->xfer(bus, msg, 1);
  231. }
  232. static int i2c_bind_driver(struct udevice *bus, uint chip_addr, uint offset_len,
  233. struct udevice **devp)
  234. {
  235. struct dm_i2c_chip *chip;
  236. char name[30], *str;
  237. struct udevice *dev;
  238. int ret;
  239. snprintf(name, sizeof(name), "generic_%x", chip_addr);
  240. str = strdup(name);
  241. if (!str)
  242. return -ENOMEM;
  243. ret = device_bind_driver(bus, "i2c_generic_chip_drv", str, &dev);
  244. debug("%s: device_bind_driver: ret=%d\n", __func__, ret);
  245. if (ret)
  246. goto err_bind;
  247. /* Tell the device what we know about it */
  248. chip = dev_get_parent_platdata(dev);
  249. chip->chip_addr = chip_addr;
  250. chip->offset_len = offset_len;
  251. ret = device_probe(dev);
  252. debug("%s: device_probe: ret=%d\n", __func__, ret);
  253. if (ret)
  254. goto err_probe;
  255. *devp = dev;
  256. return 0;
  257. err_probe:
  258. /*
  259. * If the device failed to probe, unbind it. There is nothing there
  260. * on the bus so we don't want to leave it lying around
  261. */
  262. device_unbind(dev);
  263. err_bind:
  264. free(str);
  265. return ret;
  266. }
  267. int i2c_get_chip(struct udevice *bus, uint chip_addr, uint offset_len,
  268. struct udevice **devp)
  269. {
  270. struct udevice *dev;
  271. debug("%s: Searching bus '%s' for address %02x: ", __func__,
  272. bus->name, chip_addr);
  273. for (device_find_first_child(bus, &dev); dev;
  274. device_find_next_child(&dev)) {
  275. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  276. int ret;
  277. if (chip->chip_addr == chip_addr) {
  278. ret = device_probe(dev);
  279. debug("found, ret=%d\n", ret);
  280. if (ret)
  281. return ret;
  282. *devp = dev;
  283. return 0;
  284. }
  285. }
  286. debug("not found\n");
  287. return i2c_bind_driver(bus, chip_addr, offset_len, devp);
  288. }
  289. int i2c_get_chip_for_busnum(int busnum, int chip_addr, uint offset_len,
  290. struct udevice **devp)
  291. {
  292. struct udevice *bus;
  293. int ret;
  294. ret = uclass_get_device_by_seq(UCLASS_I2C, busnum, &bus);
  295. if (ret) {
  296. debug("Cannot find I2C bus %d\n", busnum);
  297. return ret;
  298. }
  299. /* detect the presence of the chip on the bus */
  300. ret = i2c_probe_chip(bus, chip_addr, 0);
  301. debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name,
  302. chip_addr, ret);
  303. if (ret) {
  304. debug("Cannot detect I2C chip %02x on bus %d\n", chip_addr,
  305. busnum);
  306. return ret;
  307. }
  308. ret = i2c_get_chip(bus, chip_addr, offset_len, devp);
  309. if (ret) {
  310. debug("Cannot find I2C chip %02x on bus %d\n", chip_addr,
  311. busnum);
  312. return ret;
  313. }
  314. return 0;
  315. }
  316. int dm_i2c_probe(struct udevice *bus, uint chip_addr, uint chip_flags,
  317. struct udevice **devp)
  318. {
  319. int ret;
  320. *devp = NULL;
  321. /* First probe that chip */
  322. ret = i2c_probe_chip(bus, chip_addr, chip_flags);
  323. debug("%s: bus='%s', address %02x, ret=%d\n", __func__, bus->name,
  324. chip_addr, ret);
  325. if (ret)
  326. return ret;
  327. /* The chip was found, see if we have a driver, and probe it */
  328. ret = i2c_get_chip(bus, chip_addr, 1, devp);
  329. debug("%s: i2c_get_chip: ret=%d\n", __func__, ret);
  330. return ret;
  331. }
  332. int dm_i2c_set_bus_speed(struct udevice *bus, unsigned int speed)
  333. {
  334. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  335. struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus);
  336. int ret;
  337. /*
  338. * If we have a method, call it. If not then the driver probably wants
  339. * to deal with speed changes on the next transfer. It can easily read
  340. * the current speed from this uclass
  341. */
  342. if (ops->set_bus_speed) {
  343. ret = ops->set_bus_speed(bus, speed);
  344. if (ret)
  345. return ret;
  346. }
  347. i2c->speed_hz = speed;
  348. return 0;
  349. }
  350. int dm_i2c_get_bus_speed(struct udevice *bus)
  351. {
  352. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  353. struct dm_i2c_bus *i2c = dev_get_uclass_priv(bus);
  354. if (!ops->get_bus_speed)
  355. return i2c->speed_hz;
  356. return ops->get_bus_speed(bus);
  357. }
  358. int i2c_set_chip_flags(struct udevice *dev, uint flags)
  359. {
  360. struct udevice *bus = dev->parent;
  361. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  362. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  363. int ret;
  364. if (ops->set_flags) {
  365. ret = ops->set_flags(dev, flags);
  366. if (ret)
  367. return ret;
  368. }
  369. chip->flags = flags;
  370. return 0;
  371. }
  372. int i2c_get_chip_flags(struct udevice *dev, uint *flagsp)
  373. {
  374. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  375. *flagsp = chip->flags;
  376. return 0;
  377. }
  378. int i2c_set_chip_offset_len(struct udevice *dev, uint offset_len)
  379. {
  380. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  381. if (offset_len > I2C_MAX_OFFSET_LEN)
  382. return -EINVAL;
  383. chip->offset_len = offset_len;
  384. return 0;
  385. }
  386. int i2c_get_chip_offset_len(struct udevice *dev)
  387. {
  388. struct dm_i2c_chip *chip = dev_get_parent_platdata(dev);
  389. return chip->offset_len;
  390. }
  391. #if CONFIG_IS_ENABLED(DM_GPIO)
  392. static void i2c_gpio_set_pin(struct gpio_desc *pin, int bit)
  393. {
  394. if (bit)
  395. dm_gpio_set_dir_flags(pin, GPIOD_IS_IN);
  396. else
  397. dm_gpio_set_dir_flags(pin, GPIOD_IS_OUT |
  398. GPIOD_ACTIVE_LOW |
  399. GPIOD_IS_OUT_ACTIVE);
  400. }
  401. static int i2c_gpio_get_pin(struct gpio_desc *pin)
  402. {
  403. return dm_gpio_get_value(pin);
  404. }
  405. static int i2c_deblock_gpio_loop(struct gpio_desc *sda_pin,
  406. struct gpio_desc *scl_pin)
  407. {
  408. int counter = 9;
  409. int ret = 0;
  410. i2c_gpio_set_pin(sda_pin, 1);
  411. i2c_gpio_set_pin(scl_pin, 1);
  412. udelay(5);
  413. /* Toggle SCL until slave release SDA */
  414. while (counter-- >= 0) {
  415. i2c_gpio_set_pin(scl_pin, 1);
  416. udelay(5);
  417. i2c_gpio_set_pin(scl_pin, 0);
  418. udelay(5);
  419. if (i2c_gpio_get_pin(sda_pin))
  420. break;
  421. }
  422. /* Then, send I2C stop */
  423. i2c_gpio_set_pin(sda_pin, 0);
  424. udelay(5);
  425. i2c_gpio_set_pin(scl_pin, 1);
  426. udelay(5);
  427. i2c_gpio_set_pin(sda_pin, 1);
  428. udelay(5);
  429. if (!i2c_gpio_get_pin(sda_pin) || !i2c_gpio_get_pin(scl_pin))
  430. ret = -EREMOTEIO;
  431. return ret;
  432. }
  433. static int i2c_deblock_gpio(struct udevice *bus)
  434. {
  435. struct gpio_desc gpios[PIN_COUNT];
  436. int ret, ret0;
  437. ret = gpio_request_list_by_name(bus, "gpios", gpios,
  438. ARRAY_SIZE(gpios), GPIOD_IS_IN);
  439. if (ret != ARRAY_SIZE(gpios)) {
  440. debug("%s: I2C Node '%s' has no 'gpios' property %s\n",
  441. __func__, dev_read_name(bus), bus->name);
  442. if (ret >= 0) {
  443. gpio_free_list(bus, gpios, ret);
  444. ret = -ENOENT;
  445. }
  446. goto out;
  447. }
  448. ret = pinctrl_select_state(bus, "gpio");
  449. if (ret) {
  450. debug("%s: I2C Node '%s' has no 'gpio' pinctrl state. %s\n",
  451. __func__, dev_read_name(bus), bus->name);
  452. goto out_no_pinctrl;
  453. }
  454. ret0 = i2c_deblock_gpio_loop(&gpios[PIN_SDA], &gpios[PIN_SCL]);
  455. ret = pinctrl_select_state(bus, "default");
  456. if (ret) {
  457. debug("%s: I2C Node '%s' has no 'default' pinctrl state. %s\n",
  458. __func__, dev_read_name(bus), bus->name);
  459. }
  460. ret = !ret ? ret0 : ret;
  461. out_no_pinctrl:
  462. gpio_free_list(bus, gpios, ARRAY_SIZE(gpios));
  463. out:
  464. return ret;
  465. }
  466. #else
  467. static int i2c_deblock_gpio(struct udevice *bus)
  468. {
  469. return -ENOSYS;
  470. }
  471. #endif /* DM_GPIO */
  472. int i2c_deblock(struct udevice *bus)
  473. {
  474. struct dm_i2c_ops *ops = i2c_get_ops(bus);
  475. if (!ops->deblock)
  476. return i2c_deblock_gpio(bus);
  477. return ops->deblock(bus);
  478. }
  479. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  480. int i2c_chip_ofdata_to_platdata(struct udevice *dev, struct dm_i2c_chip *chip)
  481. {
  482. int addr;
  483. chip->offset_len = dev_read_u32_default(dev, "u-boot,i2c-offset-len",
  484. 1);
  485. chip->flags = 0;
  486. addr = dev_read_u32_default(dev, "reg", -1);
  487. if (addr == -1) {
  488. debug("%s: I2C Node '%s' has no 'reg' property %s\n", __func__,
  489. dev_read_name(dev), dev->name);
  490. return -EINVAL;
  491. }
  492. chip->chip_addr = addr;
  493. return 0;
  494. }
  495. #endif
  496. static int i2c_pre_probe(struct udevice *dev)
  497. {
  498. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  499. struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
  500. unsigned int max = 0;
  501. ofnode node;
  502. int ret;
  503. i2c->max_transaction_bytes = 0;
  504. dev_for_each_subnode(node, dev) {
  505. ret = ofnode_read_u32(node,
  506. "u-boot,i2c-transaction-bytes",
  507. &max);
  508. if (!ret && max > i2c->max_transaction_bytes)
  509. i2c->max_transaction_bytes = max;
  510. }
  511. debug("%s: I2C bus: %s max transaction bytes: %d\n", __func__,
  512. dev->name, i2c->max_transaction_bytes);
  513. #endif
  514. return 0;
  515. }
  516. static int i2c_post_probe(struct udevice *dev)
  517. {
  518. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  519. struct dm_i2c_bus *i2c = dev_get_uclass_priv(dev);
  520. i2c->speed_hz = dev_read_u32_default(dev, "clock-frequency", 100000);
  521. return dm_i2c_set_bus_speed(dev, i2c->speed_hz);
  522. #else
  523. return 0;
  524. #endif
  525. }
  526. static int i2c_child_post_bind(struct udevice *dev)
  527. {
  528. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  529. struct dm_i2c_chip *plat = dev_get_parent_platdata(dev);
  530. if (!dev_of_valid(dev))
  531. return 0;
  532. return i2c_chip_ofdata_to_platdata(dev, plat);
  533. #else
  534. return 0;
  535. #endif
  536. }
  537. struct i2c_priv {
  538. int max_id;
  539. };
  540. static int i2c_post_bind(struct udevice *dev)
  541. {
  542. struct uclass *class = dev->uclass;
  543. struct i2c_priv *priv = class->priv;
  544. int ret = 0;
  545. /* Just for sure */
  546. if (!priv)
  547. return -ENOMEM;
  548. debug("%s: %s, req_seq=%d\n", __func__, dev->name, dev->req_seq);
  549. /* if there is no alias ID, use the first free */
  550. if (dev->req_seq == -1)
  551. dev->req_seq = ++priv->max_id;
  552. debug("%s: %s, new req_seq=%d\n", __func__, dev->name, dev->req_seq);
  553. #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)
  554. ret = dm_scan_fdt_dev(dev);
  555. #endif
  556. return ret;
  557. }
  558. int i2c_uclass_init(struct uclass *class)
  559. {
  560. struct i2c_priv *priv = class->priv;
  561. /* Just for sure */
  562. if (!priv)
  563. return -ENOMEM;
  564. /* Get the last allocated alias. */
  565. #if CONFIG_IS_ENABLED(OF_CONTROL)
  566. priv->max_id = dev_read_alias_highest_id("i2c");
  567. #else
  568. priv->max_id = -1;
  569. #endif
  570. debug("%s: highest alias id is %d\n", __func__, priv->max_id);
  571. return 0;
  572. }
  573. UCLASS_DRIVER(i2c) = {
  574. .id = UCLASS_I2C,
  575. .name = "i2c",
  576. .flags = DM_UC_FLAG_SEQ_ALIAS,
  577. .post_bind = i2c_post_bind,
  578. .init = i2c_uclass_init,
  579. .priv_auto_alloc_size = sizeof(struct i2c_priv),
  580. .pre_probe = i2c_pre_probe,
  581. .post_probe = i2c_post_probe,
  582. .per_device_auto_alloc_size = sizeof(struct dm_i2c_bus),
  583. .per_child_platdata_auto_alloc_size = sizeof(struct dm_i2c_chip),
  584. .child_post_bind = i2c_child_post_bind,
  585. };
  586. UCLASS_DRIVER(i2c_generic) = {
  587. .id = UCLASS_I2C_GENERIC,
  588. .name = "i2c_generic",
  589. };
  590. U_BOOT_DRIVER(i2c_generic_chip_drv) = {
  591. .name = "i2c_generic_chip_drv",
  592. .id = UCLASS_I2C_GENERIC,
  593. };