board.c 6.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2013 SAMSUNG Electronics
  4. * Rajeshwari Shinde <rajeshwari.s@samsung.com>
  5. */
  6. #include <common.h>
  7. #include <cros_ec.h>
  8. #include <env.h>
  9. #include <errno.h>
  10. #include <fdtdec.h>
  11. #include <hang.h>
  12. #include <init.h>
  13. #include <log.h>
  14. #include <net.h>
  15. #include <spi.h>
  16. #include <tmu.h>
  17. #include <netdev.h>
  18. #include <asm/global_data.h>
  19. #include <asm/io.h>
  20. #include <asm/gpio.h>
  21. #include <asm/arch/board.h>
  22. #include <asm/arch/cpu.h>
  23. #include <asm/arch/dwmmc.h>
  24. #include <asm/arch/mmc.h>
  25. #include <asm/arch/pinmux.h>
  26. #include <asm/arch/power.h>
  27. #include <asm/arch/system.h>
  28. #include <lcd.h>
  29. #include <i2c.h>
  30. #include <mmc.h>
  31. #include <stdio_dev.h>
  32. #include <usb.h>
  33. #include <dwc3-uboot.h>
  34. #include <linux/delay.h>
  35. #include <samsung/misc.h>
  36. #include <dm/pinctrl.h>
  37. #include <dm.h>
  38. DECLARE_GLOBAL_DATA_PTR;
  39. __weak int exynos_early_init_f(void)
  40. {
  41. return 0;
  42. }
  43. __weak int exynos_power_init(void)
  44. {
  45. return 0;
  46. }
  47. /**
  48. * get_boot_mmc_dev() - read boot MMC device id from XOM[7:5] pins.
  49. */
  50. static int get_boot_mmc_dev(void)
  51. {
  52. u32 mode = readl(EXYNOS4_OP_MODE) & 0x1C;
  53. if (mode == 0x04)
  54. return 2; /* MMC2: SD */
  55. /* MMC0: eMMC or unknown */
  56. return 0;
  57. }
  58. #if defined CONFIG_EXYNOS_TMU
  59. /* Boot Time Thermal Analysis for SoC temperature threshold breach */
  60. static void boot_temp_check(void)
  61. {
  62. int temp;
  63. switch (tmu_monitor(&temp)) {
  64. case TMU_STATUS_NORMAL:
  65. break;
  66. case TMU_STATUS_TRIPPED:
  67. /*
  68. * Status TRIPPED ans WARNING means corresponding threshold
  69. * breach
  70. */
  71. puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n");
  72. set_ps_hold_ctrl();
  73. hang();
  74. break;
  75. case TMU_STATUS_WARNING:
  76. puts("EXYNOS_TMU: WARNING! Temperature very high\n");
  77. break;
  78. case TMU_STATUS_INIT:
  79. /*
  80. * TMU_STATUS_INIT means something is wrong with temperature
  81. * sensing and TMU status was changed back from NORMAL to INIT.
  82. */
  83. puts("EXYNOS_TMU: WARNING! Temperature sensing not done\n");
  84. break;
  85. default:
  86. debug("EXYNOS_TMU: Unknown TMU state\n");
  87. }
  88. }
  89. #endif
  90. int board_init(void)
  91. {
  92. gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
  93. #if defined CONFIG_EXYNOS_TMU
  94. if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) {
  95. debug("%s: Failed to init TMU\n", __func__);
  96. return -1;
  97. }
  98. boot_temp_check();
  99. #endif
  100. #ifdef CONFIG_TZSW_RESERVED_DRAM_SIZE
  101. /* The last few MB of memory can be reserved for secure firmware */
  102. ulong size = CONFIG_TZSW_RESERVED_DRAM_SIZE;
  103. gd->ram_size -= size;
  104. gd->bd->bi_dram[CONFIG_NR_DRAM_BANKS - 1].size -= size;
  105. #endif
  106. return exynos_init();
  107. }
  108. int dram_init(void)
  109. {
  110. unsigned int i;
  111. unsigned long addr;
  112. for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  113. addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
  114. gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE);
  115. }
  116. return 0;
  117. }
  118. int dram_init_banksize(void)
  119. {
  120. unsigned int i;
  121. unsigned long addr, size;
  122. for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  123. addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE);
  124. size = get_ram_size((long *)addr, SDRAM_BANK_SIZE);
  125. gd->bd->bi_dram[i].start = addr;
  126. gd->bd->bi_dram[i].size = size;
  127. }
  128. return 0;
  129. }
  130. static int board_uart_init(void)
  131. {
  132. #ifndef CONFIG_PINCTRL_EXYNOS
  133. int err, uart_id, ret = 0;
  134. for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) {
  135. err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE);
  136. if (err) {
  137. debug("UART%d not configured\n",
  138. (uart_id - PERIPH_ID_UART0));
  139. ret |= err;
  140. }
  141. }
  142. return ret;
  143. #else
  144. return 0;
  145. #endif
  146. }
  147. #ifdef CONFIG_BOARD_EARLY_INIT_F
  148. int board_early_init_f(void)
  149. {
  150. int err;
  151. #ifdef CONFIG_BOARD_TYPES
  152. set_board_type();
  153. #endif
  154. err = board_uart_init();
  155. if (err) {
  156. debug("UART init failed\n");
  157. return err;
  158. }
  159. #ifdef CONFIG_SYS_I2C_INIT_BOARD
  160. board_i2c_init(gd->fdt_blob);
  161. #endif
  162. return exynos_early_init_f();
  163. }
  164. #endif
  165. #if defined(CONFIG_POWER) || defined(CONFIG_DM_PMIC)
  166. int power_init_board(void)
  167. {
  168. set_ps_hold_ctrl();
  169. return exynos_power_init();
  170. }
  171. #endif
  172. #if defined(CONFIG_DISPLAY_BOARDINFO) || defined(CONFIG_DISPLAY_BOARDINFO_LATE)
  173. int checkboard(void)
  174. {
  175. if (IS_ENABLED(CONFIG_BOARD_TYPES)) {
  176. const char *board_info;
  177. if (IS_ENABLED(CONFIG_DISPLAY_BOARDINFO_LATE)) {
  178. /*
  179. * Printing type requires having revision, although
  180. * this will succeed only if done late.
  181. * Otherwise revision will be set in misc_init_r().
  182. */
  183. set_board_revision();
  184. }
  185. board_info = get_board_type();
  186. if (board_info)
  187. printf("Type: %s\n", board_info);
  188. }
  189. return 0;
  190. }
  191. #endif
  192. #ifdef CONFIG_BOARD_LATE_INIT
  193. int board_late_init(void)
  194. {
  195. struct udevice *dev;
  196. int ret;
  197. int mmcbootdev = get_boot_mmc_dev();
  198. char mmcbootdev_str[16];
  199. ret = uclass_first_device_err(UCLASS_CROS_EC, &dev);
  200. if (ret && ret != -ENODEV) {
  201. /* Force console on */
  202. gd->flags &= ~GD_FLG_SILENT;
  203. printf("cros-ec communications failure %d\n", ret);
  204. puts("\nPlease reset with Power+Refresh\n\n");
  205. panic("Cannot init cros-ec device");
  206. return -1;
  207. }
  208. printf("Boot device: MMC(%u)\n", mmcbootdev);
  209. sprintf(mmcbootdev_str, "%u", mmcbootdev);
  210. env_set("mmcbootdev", mmcbootdev_str);
  211. return 0;
  212. }
  213. #endif
  214. #ifdef CONFIG_MISC_INIT_R
  215. int misc_init_r(void)
  216. {
  217. if (IS_ENABLED(CONFIG_BOARD_TYPES) &&
  218. !IS_ENABLED(CONFIG_DISPLAY_BOARDINFO_LATE)) {
  219. /*
  220. * If revision was not set by late display boardinfo,
  221. * set it here. At this point regulators should be already
  222. * available.
  223. */
  224. set_board_revision();
  225. }
  226. #ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
  227. set_board_info();
  228. #endif
  229. #ifdef CONFIG_LCD_MENU
  230. keys_init();
  231. check_boot_mode();
  232. #endif
  233. #ifdef CONFIG_CMD_BMP
  234. if (panel_info.logo_on)
  235. draw_logo();
  236. #endif
  237. return 0;
  238. }
  239. #endif
  240. void reset_misc(void)
  241. {
  242. struct gpio_desc gpio = {};
  243. int node;
  244. node = fdt_node_offset_by_compatible(gd->fdt_blob, 0,
  245. "samsung,emmc-reset");
  246. if (node < 0)
  247. return;
  248. gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpio", 0,
  249. &gpio, GPIOD_IS_OUT);
  250. if (dm_gpio_is_valid(&gpio)) {
  251. /*
  252. * Reset eMMC
  253. *
  254. * FIXME: Need to optimize delay time. Minimum 1usec pulse is
  255. * required by 'JEDEC Standard No.84-A441' (eMMC)
  256. * document but real delay time is expected to greater
  257. * than 1usec.
  258. */
  259. dm_gpio_set_value(&gpio, 0);
  260. mdelay(10);
  261. dm_gpio_set_value(&gpio, 1);
  262. }
  263. }
  264. int board_usb_cleanup(int index, enum usb_init_type init)
  265. {
  266. #ifdef CONFIG_USB_DWC3
  267. dwc3_uboot_exit(index);
  268. #endif
  269. return 0;
  270. }
  271. int mmc_get_env_dev(void)
  272. {
  273. return get_boot_mmc_dev();
  274. }