Kconfig 49 KB

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  1. menu "ARM architecture"
  2. depends on ARM
  3. config SYS_ARCH
  4. default "arm"
  5. config ARM64
  6. bool
  7. select PHYS_64BIT
  8. select SYS_CACHE_SHIFT_6
  9. if ARM64
  10. config POSITION_INDEPENDENT
  11. bool "Generate position-independent pre-relocation code"
  12. help
  13. U-Boot expects to be linked to a specific hard-coded address, and to
  14. be loaded to and run from that address. This option lifts that
  15. restriction, thus allowing the code to be loaded to and executed from
  16. almost any 4K aligned address. This logic relies on the relocation
  17. information that is embedded in the binary to support U-Boot
  18. relocating itself to the top-of-RAM later during execution.
  19. config INIT_SP_RELATIVE
  20. bool "Specify the early stack pointer relative to the .bss section"
  21. default n if ARCH_QEMU
  22. default y if POSITION_INDEPENDENT
  23. help
  24. U-Boot typically uses a hard-coded value for the stack pointer
  25. before relocation. Enable this option to instead calculate the
  26. initial SP at run-time. This is useful to avoid hard-coding addresses
  27. into U-Boot, so that it can be loaded and executed at arbitrary
  28. addresses and thus avoid using arbitrary addresses at runtime.
  29. If this option is enabled, the early stack pointer is set to
  30. &_bss_start with a offset value added. The offset is specified by
  31. SYS_INIT_SP_BSS_OFFSET.
  32. config SYS_INIT_SP_BSS_OFFSET
  33. int "Early stack offset from the .bss base address"
  34. depends on INIT_SP_RELATIVE
  35. default 524288
  36. help
  37. This option's value is the offset added to &_bss_start in order to
  38. calculate the stack pointer. This offset should be large enough so
  39. that the early malloc region, global data (gd), and early stack usage
  40. do not overlap any appended DTB.
  41. config LINUX_KERNEL_IMAGE_HEADER
  42. bool
  43. help
  44. Place a Linux kernel image header at the start of the U-Boot binary.
  45. The format of the header is described in the Linux kernel source at
  46. Documentation/arm64/booting.txt. This feature is useful since the
  47. image header reports the amount of memory (BSS and similar) that
  48. U-Boot needs to use, but which isn't part of the binary.
  49. if LINUX_KERNEL_IMAGE_HEADER
  50. config LNX_KRNL_IMG_TEXT_OFFSET_BASE
  51. hex
  52. help
  53. The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
  54. TEXT_OFFSET value written to the Linux kernel image header.
  55. endif
  56. endif
  57. config GIC_V3_ITS
  58. bool "ARM GICV3 ITS"
  59. select REGMAP
  60. select SYSCON
  61. select IRQ
  62. help
  63. ARM GICV3 Interrupt translation service (ITS).
  64. Basic support for programming locality specific peripheral
  65. interrupts (LPI) configuration tables and enable LPI tables.
  66. LPI configuration table can be used by u-boot or Linux.
  67. ARM GICV3 has limitation, once the LPI table is enabled, LPI
  68. configuration table can not be re-programmed, unless GICV3 reset.
  69. config STATIC_RELA
  70. bool
  71. default y if ARM64
  72. config DMA_ADDR_T_64BIT
  73. bool
  74. default y if ARM64
  75. config HAS_VBAR
  76. bool
  77. config HAS_THUMB2
  78. bool
  79. config GPIO_EXTRA_HEADER
  80. bool
  81. # Used for compatibility with asm files copied from the kernel
  82. config ARM_ASM_UNIFIED
  83. bool
  84. default y
  85. # Used for compatibility with asm files copied from the kernel
  86. config THUMB2_KERNEL
  87. bool
  88. config SYS_ICACHE_OFF
  89. bool "Do not enable icache"
  90. default n
  91. help
  92. Do not enable instruction cache in U-Boot.
  93. config SPL_SYS_ICACHE_OFF
  94. bool "Do not enable icache in SPL"
  95. depends on SPL
  96. default SYS_ICACHE_OFF
  97. help
  98. Do not enable instruction cache in SPL.
  99. config SYS_DCACHE_OFF
  100. bool "Do not enable dcache"
  101. default n
  102. help
  103. Do not enable data cache in U-Boot.
  104. config SPL_SYS_DCACHE_OFF
  105. bool "Do not enable dcache in SPL"
  106. depends on SPL
  107. default SYS_DCACHE_OFF
  108. help
  109. Do not enable data cache in SPL.
  110. config SYS_ARM_CACHE_CP15
  111. bool "CP15 based cache enabling support"
  112. help
  113. Select this if your processor suports enabling caches by using
  114. CP15 registers.
  115. config SYS_ARM_MMU
  116. bool "MMU-based Paged Memory Management Support"
  117. select SYS_ARM_CACHE_CP15
  118. help
  119. Select if you want MMU-based virtualised addressing space
  120. support via paged memory management.
  121. config SYS_ARM_MPU
  122. bool 'Use the ARM v7 PMSA Compliant MPU'
  123. help
  124. Some ARM systems without an MMU have instead a Memory Protection
  125. Unit (MPU) that defines the type and permissions for regions of
  126. memory.
  127. If your CPU has an MPU then you should choose 'y' here unless you
  128. know that you do not want to use the MPU.
  129. # If set, the workarounds for these ARM errata are applied early during U-Boot
  130. # startup. Note that in general these options force the workarounds to be
  131. # applied; no CPU-type/version detection exists, unlike the similar options in
  132. # the Linux kernel. Do not set these options unless they apply! Also note that
  133. # the following can be machine-specific errata. These do have ability to
  134. # provide rudimentary version and machine-specific checks, but expect no
  135. # product checks:
  136. # CONFIG_ARM_ERRATA_430973
  137. # CONFIG_ARM_ERRATA_454179
  138. # CONFIG_ARM_ERRATA_621766
  139. # CONFIG_ARM_ERRATA_798870
  140. # CONFIG_ARM_ERRATA_801819
  141. # CONFIG_ARM_CORTEX_A8_CVE_2017_5715
  142. # CONFIG_ARM_CORTEX_A15_CVE_2017_5715
  143. config ARM_ERRATA_430973
  144. bool
  145. config ARM_ERRATA_454179
  146. bool
  147. config ARM_ERRATA_621766
  148. bool
  149. config ARM_ERRATA_716044
  150. bool
  151. config ARM_ERRATA_725233
  152. bool
  153. config ARM_ERRATA_742230
  154. bool
  155. config ARM_ERRATA_743622
  156. bool
  157. config ARM_ERRATA_751472
  158. bool
  159. config ARM_ERRATA_761320
  160. bool
  161. config ARM_ERRATA_773022
  162. bool
  163. config ARM_ERRATA_774769
  164. bool
  165. config ARM_ERRATA_794072
  166. bool
  167. config ARM_ERRATA_798870
  168. bool
  169. config ARM_ERRATA_801819
  170. bool
  171. config ARM_ERRATA_826974
  172. bool
  173. config ARM_ERRATA_828024
  174. bool
  175. config ARM_ERRATA_829520
  176. bool
  177. config ARM_ERRATA_833069
  178. bool
  179. config ARM_ERRATA_833471
  180. bool
  181. config ARM_ERRATA_845369
  182. bool
  183. config ARM_ERRATA_852421
  184. bool
  185. config ARM_ERRATA_852423
  186. bool
  187. config ARM_ERRATA_855873
  188. bool
  189. config ARM_CORTEX_A8_CVE_2017_5715
  190. bool
  191. config ARM_CORTEX_A15_CVE_2017_5715
  192. bool
  193. config CPU_ARM720T
  194. bool
  195. select SYS_CACHE_SHIFT_5
  196. imply SYS_ARM_MMU
  197. config CPU_ARM920T
  198. bool
  199. select SYS_CACHE_SHIFT_5
  200. imply SYS_ARM_MMU
  201. config CPU_ARM926EJS
  202. bool
  203. select SYS_CACHE_SHIFT_5
  204. imply SYS_ARM_MMU
  205. config CPU_ARM946ES
  206. bool
  207. select SYS_CACHE_SHIFT_5
  208. imply SYS_ARM_MMU
  209. config CPU_ARM1136
  210. bool
  211. select SYS_CACHE_SHIFT_5
  212. imply SYS_ARM_MMU
  213. config CPU_ARM1176
  214. bool
  215. select HAS_VBAR
  216. select SYS_CACHE_SHIFT_5
  217. imply SYS_ARM_MMU
  218. config CPU_V7A
  219. bool
  220. select HAS_THUMB2
  221. select HAS_VBAR
  222. select SYS_CACHE_SHIFT_6
  223. imply SYS_ARM_MMU
  224. config CPU_V7M
  225. bool
  226. select HAS_THUMB2
  227. select SYS_ARM_MPU
  228. select SYS_CACHE_SHIFT_5
  229. select SYS_THUMB_BUILD
  230. select THUMB2_KERNEL
  231. config CPU_V7R
  232. bool
  233. select HAS_THUMB2
  234. select SYS_ARM_CACHE_CP15
  235. select SYS_ARM_MPU
  236. select SYS_CACHE_SHIFT_6
  237. config CPU_PXA
  238. bool
  239. select SYS_CACHE_SHIFT_5
  240. imply SYS_ARM_MMU
  241. config CPU_SA1100
  242. bool
  243. select SYS_CACHE_SHIFT_5
  244. imply SYS_ARM_MMU
  245. config SYS_CPU
  246. default "arm720t" if CPU_ARM720T
  247. default "arm920t" if CPU_ARM920T
  248. default "arm926ejs" if CPU_ARM926EJS
  249. default "arm946es" if CPU_ARM946ES
  250. default "arm1136" if CPU_ARM1136
  251. default "arm1176" if CPU_ARM1176
  252. default "armv7" if CPU_V7A
  253. default "armv7" if CPU_V7R
  254. default "armv7m" if CPU_V7M
  255. default "pxa" if CPU_PXA
  256. default "sa1100" if CPU_SA1100
  257. default "armv8" if ARM64
  258. config SYS_ARM_ARCH
  259. int
  260. default 4 if CPU_ARM720T
  261. default 4 if CPU_ARM920T
  262. default 5 if CPU_ARM926EJS
  263. default 5 if CPU_ARM946ES
  264. default 6 if CPU_ARM1136
  265. default 6 if CPU_ARM1176
  266. default 7 if CPU_V7A
  267. default 7 if CPU_V7M
  268. default 7 if CPU_V7R
  269. default 5 if CPU_PXA
  270. default 4 if CPU_SA1100
  271. default 8 if ARM64
  272. config SYS_CACHE_SHIFT_5
  273. bool
  274. config SYS_CACHE_SHIFT_6
  275. bool
  276. config SYS_CACHE_SHIFT_7
  277. bool
  278. config SYS_CACHELINE_SIZE
  279. int
  280. default 128 if SYS_CACHE_SHIFT_7
  281. default 64 if SYS_CACHE_SHIFT_6
  282. default 32 if SYS_CACHE_SHIFT_5
  283. choice
  284. prompt "Select the ARM data write cache policy"
  285. default SYS_ARM_CACHE_WRITETHROUGH if TARGET_BCMCYGNUS || \
  286. CPU_PXA || RZA1
  287. default SYS_ARM_CACHE_WRITEBACK
  288. config SYS_ARM_CACHE_WRITEBACK
  289. bool "Write-back (WB)"
  290. help
  291. A write updates the cache only and marks the cache line as dirty.
  292. External memory is updated only when the line is evicted or explicitly
  293. cleaned.
  294. config SYS_ARM_CACHE_WRITETHROUGH
  295. bool "Write-through (WT)"
  296. help
  297. A write updates both the cache and the external memory system.
  298. This does not mark the cache line as dirty.
  299. config SYS_ARM_CACHE_WRITEALLOC
  300. bool "Write allocation (WA)"
  301. help
  302. A cache line is allocated on a write miss. This means that executing a
  303. store instruction on the processor might cause a burst read to occur.
  304. There is a linefill to obtain the data for the cache line, before the
  305. write is performed.
  306. endchoice
  307. config ARCH_CPU_INIT
  308. bool "Enable ARCH_CPU_INIT"
  309. help
  310. Some architectures require a call to arch_cpu_init().
  311. Say Y here to enable it
  312. config SYS_ARCH_TIMER
  313. bool "ARM Generic Timer support"
  314. depends on CPU_V7A || ARM64
  315. default y if ARM64
  316. help
  317. The ARM Generic Timer (aka arch-timer) provides an architected
  318. interface to a timer source on an SoC.
  319. It is mandatory for ARMv8 implementation and widely available
  320. on ARMv7 systems.
  321. config ARM_SMCCC
  322. bool "Support for ARM SMC Calling Convention (SMCCC)"
  323. depends on CPU_V7A || ARM64
  324. select ARM_PSCI_FW
  325. help
  326. Say Y here if you want to enable ARM SMC Calling Convention.
  327. This should be enabled if U-Boot needs to communicate with system
  328. firmware (for example, PSCI) according to SMCCC.
  329. config SEMIHOSTING
  330. bool "support boot from semihosting"
  331. help
  332. In emulated environments, semihosting is a way for
  333. the hosted environment to call out to the emulator to
  334. retrieve files from the host machine.
  335. config SYS_THUMB_BUILD
  336. bool "Build U-Boot using the Thumb instruction set"
  337. depends on !ARM64
  338. help
  339. Use this flag to build U-Boot using the Thumb instruction set for
  340. ARM architectures. Thumb instruction set provides better code
  341. density. For ARM architectures that support Thumb2 this flag will
  342. result in Thumb2 code generated by GCC.
  343. config SPL_SYS_THUMB_BUILD
  344. bool "Build SPL using the Thumb instruction set"
  345. default y if SYS_THUMB_BUILD
  346. depends on !ARM64 && SPL
  347. help
  348. Use this flag to build SPL using the Thumb instruction set for
  349. ARM architectures. Thumb instruction set provides better code
  350. density. For ARM architectures that support Thumb2 this flag will
  351. result in Thumb2 code generated by GCC.
  352. config TPL_SYS_THUMB_BUILD
  353. bool "Build TPL using the Thumb instruction set"
  354. default y if SYS_THUMB_BUILD
  355. depends on TPL && !ARM64
  356. help
  357. Use this flag to build TPL using the Thumb instruction set for
  358. ARM architectures. Thumb instruction set provides better code
  359. density. For ARM architectures that support Thumb2 this flag will
  360. result in Thumb2 code generated by GCC.
  361. config SYS_L2CACHE_OFF
  362. bool "L2cache off"
  363. help
  364. If SoC does not support L2CACHE or one does not want to enable
  365. L2CACHE, choose this option.
  366. config ENABLE_ARM_SOC_BOOT0_HOOK
  367. bool "prepare BOOT0 header"
  368. help
  369. If the SoC's BOOT0 requires a header area filled with (magic)
  370. values, then choose this option, and create a file included as
  371. <asm/arch/boot0.h> which contains the required assembler code.
  372. config ARM_CORTEX_CPU_IS_UP
  373. bool
  374. default n
  375. config USE_ARCH_MEMCPY
  376. bool "Use an assembly optimized implementation of memcpy"
  377. default y
  378. depends on !ARM64
  379. help
  380. Enable the generation of an optimized version of memcpy.
  381. Such an implementation may be faster under some conditions
  382. but may increase the binary size.
  383. config SPL_USE_ARCH_MEMCPY
  384. bool "Use an assembly optimized implementation of memcpy for SPL"
  385. default y if USE_ARCH_MEMCPY
  386. depends on !ARM64 && SPL
  387. help
  388. Enable the generation of an optimized version of memcpy.
  389. Such an implementation may be faster under some conditions
  390. but may increase the binary size.
  391. config TPL_USE_ARCH_MEMCPY
  392. bool "Use an assembly optimized implementation of memcpy for TPL"
  393. default y if USE_ARCH_MEMCPY
  394. depends on !ARM64 && TPL
  395. help
  396. Enable the generation of an optimized version of memcpy.
  397. Such an implementation may be faster under some conditions
  398. but may increase the binary size.
  399. config USE_ARCH_MEMSET
  400. bool "Use an assembly optimized implementation of memset"
  401. default y
  402. depends on !ARM64
  403. help
  404. Enable the generation of an optimized version of memset.
  405. Such an implementation may be faster under some conditions
  406. but may increase the binary size.
  407. config SPL_USE_ARCH_MEMSET
  408. bool "Use an assembly optimized implementation of memset for SPL"
  409. default y if USE_ARCH_MEMSET
  410. depends on !ARM64 && SPL
  411. help
  412. Enable the generation of an optimized version of memset.
  413. Such an implementation may be faster under some conditions
  414. but may increase the binary size.
  415. config TPL_USE_ARCH_MEMSET
  416. bool "Use an assembly optimized implementation of memset for TPL"
  417. default y if USE_ARCH_MEMSET
  418. depends on !ARM64 && TPL
  419. help
  420. Enable the generation of an optimized version of memset.
  421. Such an implementation may be faster under some conditions
  422. but may increase the binary size.
  423. config ARM64_SUPPORT_AARCH32
  424. bool "ARM64 system support AArch32 execution state"
  425. depends on ARM64
  426. default y if !TARGET_THUNDERX_88XX
  427. help
  428. This ARM64 system supports AArch32 execution state.
  429. choice
  430. prompt "Target select"
  431. default TARGET_HIKEY
  432. config ARCH_AT91
  433. bool "Atmel AT91"
  434. select GPIO_EXTRA_HEADER
  435. select SPL_BOARD_INIT if SPL && !TARGET_SMARTWEB
  436. select SPL_SEPARATE_BSS if SPL
  437. config TARGET_ASPENITE
  438. bool "Support aspenite"
  439. select CPU_ARM926EJS
  440. select GPIO_EXTRA_HEADER
  441. config ARCH_DAVINCI
  442. bool "TI DaVinci"
  443. select CPU_ARM926EJS
  444. select GPIO_EXTRA_HEADER
  445. select SPL_DM_SPI if SPL
  446. imply CMD_SAVES
  447. help
  448. Support for TI's DaVinci platform.
  449. config ARCH_KIRKWOOD
  450. bool "Marvell Kirkwood"
  451. select ARCH_MISC_INIT
  452. select BOARD_EARLY_INIT_F
  453. select CPU_ARM926EJS
  454. select GPIO_EXTRA_HEADER
  455. config ARCH_MVEBU
  456. bool "Marvell MVEBU family (Armada XP/375/38x/3700/7K/8K)"
  457. select DM
  458. select DM_ETH
  459. select DM_SERIAL
  460. select DM_SPI
  461. select DM_SPI_FLASH
  462. select GPIO_EXTRA_HEADER
  463. select SPL_DM_SPI if SPL
  464. select SPL_DM_SPI_FLASH if SPL
  465. select OF_CONTROL
  466. select OF_SEPARATE
  467. select SPI
  468. imply CMD_DM
  469. config ARCH_ORION5X
  470. bool "Marvell Orion"
  471. select CPU_ARM926EJS
  472. select GPIO_EXTRA_HEADER
  473. config TARGET_STV0991
  474. bool "Support stv0991"
  475. select CPU_V7A
  476. select DM
  477. select DM_SERIAL
  478. select DM_SPI
  479. select DM_SPI_FLASH
  480. select GPIO_EXTRA_HEADER
  481. select PL01X_SERIAL
  482. select SPI
  483. select SPI_FLASH
  484. imply CMD_DM
  485. config TARGET_FLEA3
  486. bool "Support flea3"
  487. select CPU_ARM1136
  488. select GPIO_EXTRA_HEADER
  489. config ARCH_BCM283X
  490. bool "Broadcom BCM283X family"
  491. select DM
  492. select DM_GPIO
  493. select DM_SERIAL
  494. select GPIO_EXTRA_HEADER
  495. select OF_CONTROL
  496. select PL01X_SERIAL
  497. select SERIAL_SEARCH_ALL
  498. imply CMD_DM
  499. imply FAT_WRITE
  500. config ARCH_BCM63158
  501. bool "Broadcom BCM63158 family"
  502. select DM
  503. select OF_CONTROL
  504. imply CMD_DM
  505. config ARCH_BCM68360
  506. bool "Broadcom BCM68360 family"
  507. select DM
  508. select OF_CONTROL
  509. imply CMD_DM
  510. config ARCH_BCM6858
  511. bool "Broadcom BCM6858 family"
  512. select DM
  513. select OF_CONTROL
  514. imply CMD_DM
  515. config ARCH_BCMSTB
  516. bool "Broadcom BCM7XXX family"
  517. select CPU_V7A
  518. select DM
  519. select GPIO_EXTRA_HEADER
  520. select OF_CONTROL
  521. select OF_PRIOR_STAGE
  522. imply CMD_DM
  523. help
  524. This enables support for Broadcom ARM-based set-top box
  525. chipsets, including the 7445 family of chips.
  526. config TARGET_BCMCYGNUS
  527. bool "Support bcmcygnus"
  528. select CPU_V7A
  529. select GPIO_EXTRA_HEADER
  530. imply BCM_SF2_ETH
  531. imply BCM_SF2_ETH_GMAC
  532. imply CMD_HASH
  533. imply CRC32_VERIFY
  534. imply FAT_WRITE
  535. imply HASH_VERIFY
  536. imply NETDEVICES
  537. config TARGET_BCMNS2
  538. bool "Support Broadcom Northstar2"
  539. select ARM64
  540. select GPIO_EXTRA_HEADER
  541. help
  542. Support for Broadcom Northstar 2 SoCs. NS2 is a quad-core 64-bit
  543. ARMv8 Cortex-A57 processors targeting a broad range of networking
  544. applications.
  545. config TARGET_BCMNS3
  546. bool "Support Broadcom NS3"
  547. select ARM64
  548. select BOARD_LATE_INIT
  549. help
  550. Support for Broadcom Northstar 3 SoCs. NS3 is a octo-core 64-bit
  551. ARMv8 Cortex-A72 processors targeting a broad range of networking
  552. applications.
  553. config ARCH_EXYNOS
  554. bool "Samsung EXYNOS"
  555. select DM
  556. select DM_GPIO
  557. select DM_I2C
  558. select DM_ETH
  559. select DM_KEYBOARD
  560. select DM_SERIAL
  561. select DM_SPI
  562. select DM_SPI_FLASH
  563. select SPI
  564. select GPIO_EXTRA_HEADER
  565. imply SYS_THUMB_BUILD
  566. imply CMD_DM
  567. imply FAT_WRITE
  568. config ARCH_S5PC1XX
  569. bool "Samsung S5PC1XX"
  570. select CPU_V7A
  571. select DM
  572. select DM_GPIO
  573. select DM_I2C
  574. select DM_SERIAL
  575. select GPIO_EXTRA_HEADER
  576. imply CMD_DM
  577. config ARCH_HIGHBANK
  578. bool "Calxeda Highbank"
  579. select CPU_V7A
  580. select PL01X_SERIAL
  581. select DM
  582. select DM_SERIAL
  583. select OF_CONTROL
  584. select OF_BOARD
  585. select CLK
  586. select CLK_CCF
  587. select AHCI
  588. select DM_ETH
  589. select PHYS_64BIT
  590. config ARCH_INTEGRATOR
  591. bool "ARM Ltd. Integrator family"
  592. select DM
  593. select DM_SERIAL
  594. select GPIO_EXTRA_HEADER
  595. select PL01X_SERIAL
  596. imply CMD_DM
  597. config ARCH_IPQ40XX
  598. bool "Qualcomm IPQ40xx SoCs"
  599. select CPU_V7A
  600. select DM
  601. select DM_GPIO
  602. select DM_SERIAL
  603. select DM_RESET
  604. select GPIO_EXTRA_HEADER
  605. select MSM_SMEM
  606. select PINCTRL
  607. select CLK
  608. select SMEM
  609. select OF_CONTROL
  610. imply CMD_DM
  611. config ARCH_KEYSTONE
  612. bool "TI Keystone"
  613. select CMD_POWEROFF
  614. select CPU_V7A
  615. select GPIO_EXTRA_HEADER
  616. select SUPPORT_SPL
  617. select SYS_ARCH_TIMER
  618. select SYS_THUMB_BUILD
  619. imply CMD_MTDPARTS
  620. imply CMD_SAVES
  621. imply FIT
  622. config ARCH_K3
  623. bool "Texas Instruments' K3 Architecture"
  624. select SPL
  625. select SUPPORT_SPL
  626. select FIT
  627. config ARCH_OMAP2PLUS
  628. bool "TI OMAP2+"
  629. select CPU_V7A
  630. select GPIO_EXTRA_HEADER
  631. select SPL_BOARD_INIT if SPL
  632. select SPL_STACK_R if SPL
  633. select SUPPORT_SPL
  634. imply TI_SYSC if DM && OF_CONTROL
  635. imply FIT
  636. config ARCH_MESON
  637. bool "Amlogic Meson"
  638. select GPIO_EXTRA_HEADER
  639. imply DISTRO_DEFAULTS
  640. imply DM_RNG
  641. help
  642. Support for the Meson SoC family developed by Amlogic Inc.,
  643. targeted at media players and tablet computers. We currently
  644. support the S905 (GXBaby) 64-bit SoC.
  645. config ARCH_MEDIATEK
  646. bool "MediaTek SoCs"
  647. select DM
  648. select GPIO_EXTRA_HEADER
  649. select OF_CONTROL
  650. select SPL_DM if SPL
  651. select SPL_LIBCOMMON_SUPPORT if SPL
  652. select SPL_LIBGENERIC_SUPPORT if SPL
  653. select SPL_OF_CONTROL if SPL
  654. select SUPPORT_SPL
  655. help
  656. Support for the MediaTek SoCs family developed by MediaTek Inc.
  657. Please refer to doc/README.mediatek for more information.
  658. config ARCH_LPC32XX
  659. bool "NXP LPC32xx platform"
  660. select CPU_ARM926EJS
  661. select DM
  662. select DM_GPIO
  663. select DM_SERIAL
  664. select GPIO_EXTRA_HEADER
  665. select SPL_DM if SPL
  666. select SUPPORT_SPL
  667. imply CMD_DM
  668. config ARCH_IMX8
  669. bool "NXP i.MX8 platform"
  670. select ARM64
  671. select DM
  672. select GPIO_EXTRA_HEADER
  673. select OF_CONTROL
  674. select ENABLE_ARM_SOC_BOOT0_HOOK
  675. config ARCH_IMX8M
  676. bool "NXP i.MX8M platform"
  677. select ARM64
  678. select GPIO_EXTRA_HEADER
  679. select SYS_FSL_HAS_SEC if IMX_HAB
  680. select SYS_FSL_SEC_COMPAT_4
  681. select SYS_FSL_SEC_LE
  682. select DM
  683. select SUPPORT_SPL
  684. imply CMD_DM
  685. config ARCH_IMXRT
  686. bool "NXP i.MXRT platform"
  687. select CPU_V7M
  688. select DM
  689. select DM_SERIAL
  690. select GPIO_EXTRA_HEADER
  691. select SUPPORT_SPL
  692. imply CMD_DM
  693. config ARCH_MX23
  694. bool "NXP i.MX23 family"
  695. select CPU_ARM926EJS
  696. select GPIO_EXTRA_HEADER
  697. select PL011_SERIAL
  698. select SUPPORT_SPL
  699. config ARCH_MX25
  700. bool "NXP MX25"
  701. select CPU_ARM926EJS
  702. select GPIO_EXTRA_HEADER
  703. imply MXC_GPIO
  704. config ARCH_MX28
  705. bool "NXP i.MX28 family"
  706. select CPU_ARM926EJS
  707. select GPIO_EXTRA_HEADER
  708. select PL011_SERIAL
  709. select SUPPORT_SPL
  710. config ARCH_MX31
  711. bool "NXP i.MX31 family"
  712. select CPU_ARM1136
  713. select GPIO_EXTRA_HEADER
  714. config ARCH_MX7ULP
  715. bool "NXP MX7ULP"
  716. select CPU_V7A
  717. select GPIO_EXTRA_HEADER
  718. select SYS_FSL_HAS_SEC if IMX_HAB
  719. select SYS_FSL_SEC_COMPAT_4
  720. select SYS_FSL_SEC_LE
  721. select ROM_UNIFIED_SECTIONS
  722. imply MXC_GPIO
  723. imply SYS_THUMB_BUILD
  724. config ARCH_MX7
  725. bool "Freescale MX7"
  726. select ARCH_MISC_INIT
  727. select CPU_V7A
  728. select GPIO_EXTRA_HEADER
  729. select SYS_FSL_HAS_SEC if IMX_HAB
  730. select SYS_FSL_SEC_COMPAT_4
  731. select SYS_FSL_SEC_LE
  732. imply BOARD_EARLY_INIT_F
  733. imply MXC_GPIO
  734. imply SYS_THUMB_BUILD
  735. config ARCH_MX6
  736. bool "Freescale MX6"
  737. select CPU_V7A
  738. select GPIO_EXTRA_HEADER
  739. select SYS_FSL_HAS_SEC
  740. select SYS_FSL_SEC_COMPAT_4
  741. select SYS_FSL_SEC_LE
  742. imply MXC_GPIO
  743. imply SYS_THUMB_BUILD
  744. if ARCH_MX6
  745. config SPL_LDSCRIPT
  746. default "arch/arm/mach-omap2/u-boot-spl.lds"
  747. endif
  748. config ARCH_MX5
  749. bool "Freescale MX5"
  750. select BOARD_EARLY_INIT_F
  751. select CPU_V7A
  752. select GPIO_EXTRA_HEADER
  753. imply MXC_GPIO
  754. config ARCH_NEXELL
  755. bool "Nexell S5P4418/S5P6818 SoC"
  756. select ENABLE_ARM_SOC_BOOT0_HOOK
  757. select DM
  758. select GPIO_EXTRA_HEADER
  759. config ARCH_OWL
  760. bool "Actions Semi OWL SoCs"
  761. select DM
  762. select DM_ETH
  763. select DM_SERIAL
  764. select GPIO_EXTRA_HEADER
  765. select OWL_SERIAL
  766. select CLK
  767. select CLK_OWL
  768. select OF_CONTROL
  769. select SYS_RELOC_GD_ENV_ADDR
  770. imply CMD_DM
  771. config ARCH_QEMU
  772. bool "QEMU Virtual Platform"
  773. select DM
  774. select DM_SERIAL
  775. select OF_CONTROL
  776. select PL01X_SERIAL
  777. imply CMD_DM
  778. imply DM_RNG
  779. imply DM_RTC
  780. imply RTC_PL031
  781. config ARCH_RMOBILE
  782. bool "Renesas ARM SoCs"
  783. select DM
  784. select DM_SERIAL
  785. select GPIO_EXTRA_HEADER
  786. imply BOARD_EARLY_INIT_F
  787. imply CMD_DM
  788. imply FAT_WRITE
  789. imply SYS_THUMB_BUILD
  790. imply ARCH_MISC_INIT if DISPLAY_CPUINFO
  791. config ARCH_SNAPDRAGON
  792. bool "Qualcomm Snapdragon SoCs"
  793. select ARM64
  794. select DM
  795. select DM_GPIO
  796. select DM_SERIAL
  797. select GPIO_EXTRA_HEADER
  798. select MSM_SMEM
  799. select OF_CONTROL
  800. select OF_SEPARATE
  801. select SMEM
  802. select SPMI
  803. imply CMD_DM
  804. config ARCH_SOCFPGA
  805. bool "Altera SOCFPGA family"
  806. select ARCH_EARLY_INIT_R
  807. select ARCH_MISC_INIT if !TARGET_SOCFPGA_ARRIA10
  808. select ARM64 if TARGET_SOCFPGA_SOC64
  809. select CPU_V7A if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  810. select DM
  811. select DM_SERIAL
  812. select GPIO_EXTRA_HEADER
  813. select ENABLE_ARM_SOC_BOOT0_HOOK if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  814. select OF_CONTROL
  815. select SPL_DM_RESET if DM_RESET
  816. select SPL_DM_SERIAL
  817. select SPL_LIBCOMMON_SUPPORT
  818. select SPL_LIBGENERIC_SUPPORT
  819. select SPL_NAND_SUPPORT if SPL_NAND_DENALI
  820. select SPL_OF_CONTROL
  821. select SPL_SEPARATE_BSS if TARGET_SOCFPGA_SOC64
  822. select SPL_SERIAL_SUPPORT
  823. select SPL_SYSRESET
  824. select SPL_WATCHDOG
  825. select SUPPORT_SPL
  826. select SYS_NS16550
  827. select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  828. select SYSRESET
  829. select SYSRESET_SOCFPGA if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
  830. select SYSRESET_SOCFPGA_SOC64 if TARGET_SOCFPGA_SOC64
  831. imply CMD_DM
  832. imply CMD_MTDPARTS
  833. imply CRC32_VERIFY
  834. imply DM_SPI
  835. imply DM_SPI_FLASH
  836. imply FAT_WRITE
  837. imply SPL
  838. imply SPL_DM
  839. imply SPL_DM_SPI
  840. imply SPL_DM_SPI_FLASH
  841. imply SPL_LIBDISK_SUPPORT
  842. imply SPL_MMC_SUPPORT
  843. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
  844. imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
  845. imply SPL_SPI_FLASH_SUPPORT
  846. imply SPL_SPI_SUPPORT
  847. imply L2X0_CACHE
  848. config ARCH_SUNXI
  849. bool "Support sunxi (Allwinner) SoCs"
  850. select BINMAN
  851. select CMD_GPIO
  852. select CMD_MMC if MMC
  853. select CMD_USB if DISTRO_DEFAULTS && USB_HOST
  854. select CLK
  855. select DM
  856. select DM_ETH
  857. select DM_GPIO
  858. select DM_KEYBOARD
  859. select DM_MMC if MMC
  860. select DM_SCSI if SCSI
  861. select DM_SERIAL
  862. select GPIO_EXTRA_HEADER
  863. select OF_BOARD_SETUP
  864. select OF_CONTROL
  865. select OF_SEPARATE
  866. select SPECIFY_CONSOLE_INDEX
  867. select SPL_STACK_R if SPL
  868. select SPL_SYS_MALLOC_SIMPLE if SPL
  869. select SPL_SYS_THUMB_BUILD if !ARM64
  870. select SUNXI_GPIO
  871. select SYS_NS16550
  872. select SYS_THUMB_BUILD if !ARM64
  873. select USB if DISTRO_DEFAULTS
  874. select USB_KEYBOARD if DISTRO_DEFAULTS && USB_HOST
  875. select USB_STORAGE if DISTRO_DEFAULTS && USB_HOST
  876. select SPL_USE_TINY_PRINTF
  877. select USE_PREBOOT
  878. select SYS_RELOC_GD_ENV_ADDR
  879. imply BOARD_LATE_INIT
  880. imply CMD_DM
  881. imply CMD_GPT
  882. imply CMD_UBI if MTD_RAW_NAND
  883. imply DISTRO_DEFAULTS
  884. imply FAT_WRITE
  885. imply FIT
  886. imply OF_LIBFDT_OVERLAY
  887. imply PRE_CONSOLE_BUFFER
  888. imply SPL_GPIO
  889. imply SPL_LIBCOMMON_SUPPORT
  890. imply SPL_LIBGENERIC_SUPPORT
  891. imply SPL_MMC_SUPPORT if MMC
  892. imply SPL_POWER
  893. imply SPL_SERIAL_SUPPORT
  894. imply USB_GADGET
  895. config ARCH_U8500
  896. bool "ST-Ericsson U8500 Series"
  897. select CPU_V7A
  898. select DM
  899. select DM_GPIO
  900. select DM_MMC if MMC
  901. select DM_SERIAL
  902. select OF_CONTROL
  903. select SYSRESET
  904. select TIMER
  905. imply ARM_PL180_MMCI
  906. imply DM_RTC
  907. imply NOMADIK_MTU_TIMER
  908. imply PL01X_SERIAL
  909. imply RTC_PL031
  910. imply SYSRESET_SYSCON
  911. config ARCH_VERSAL
  912. bool "Support Xilinx Versal Platform"
  913. select ARM64
  914. select CLK
  915. select DM
  916. select DM_ETH if NET
  917. select DM_MMC if MMC
  918. select DM_SERIAL
  919. select GPIO_EXTRA_HEADER
  920. select OF_CONTROL
  921. imply BOARD_LATE_INIT
  922. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  923. config ARCH_VF610
  924. bool "Freescale Vybrid"
  925. select CPU_V7A
  926. select GPIO_EXTRA_HEADER
  927. select SYS_FSL_ERRATUM_ESDHC111
  928. imply CMD_MTDPARTS
  929. imply MTD_RAW_NAND
  930. config ARCH_ZYNQ
  931. bool "Xilinx Zynq based platform"
  932. select CLK
  933. select CLK_ZYNQ
  934. select CPU_V7A
  935. select DM
  936. select DM_ETH if NET
  937. select DM_MMC if MMC
  938. select DM_SERIAL
  939. select DM_SPI
  940. select DM_SPI_FLASH
  941. select GPIO_EXTRA_HEADER
  942. select OF_CONTROL
  943. select SPI
  944. select SPL_BOARD_INIT if SPL
  945. select SPL_CLK if SPL
  946. select SPL_DM if SPL
  947. select SPL_DM_SPI if SPL
  948. select SPL_DM_SPI_FLASH if SPL
  949. select SPL_OF_CONTROL if SPL
  950. select SPL_SEPARATE_BSS if SPL
  951. select SUPPORT_SPL
  952. imply ARCH_EARLY_INIT_R
  953. imply BOARD_LATE_INIT
  954. imply CMD_CLK
  955. imply CMD_DM
  956. imply CMD_SPL
  957. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  958. imply FAT_WRITE
  959. config ARCH_ZYNQMP_R5
  960. bool "Xilinx ZynqMP R5 based platform"
  961. select CLK
  962. select CPU_V7R
  963. select DM
  964. select DM_ETH if NET
  965. select DM_MMC if MMC
  966. select DM_SERIAL
  967. select GPIO_EXTRA_HEADER
  968. select OF_CONTROL
  969. imply CMD_DM
  970. imply DM_USB_GADGET
  971. config ARCH_ZYNQMP
  972. bool "Xilinx ZynqMP based platform"
  973. select ARM64
  974. select CLK
  975. select DM
  976. select DM_ETH if NET
  977. select DM_MAILBOX
  978. select DM_MMC if MMC
  979. select DM_SERIAL
  980. select DM_SPI if SPI
  981. select DM_SPI_FLASH if DM_SPI
  982. select FIRMWARE
  983. select GPIO_EXTRA_HEADER
  984. select OF_CONTROL
  985. select SPL_BOARD_INIT if SPL
  986. select SPL_CLK if SPL
  987. select SPL_DM if SPL
  988. select SPL_DM_SPI if SPI && SPL_DM
  989. select SPL_DM_SPI_FLASH if SPL_DM_SPI
  990. select SPL_DM_MAILBOX if SPL
  991. select SPL_FIRMWARE if SPL
  992. select SPL_SEPARATE_BSS if SPL
  993. select SUPPORT_SPL
  994. select ZYNQMP_IPI
  995. imply BOARD_LATE_INIT
  996. imply CMD_DM
  997. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  998. imply FAT_WRITE
  999. imply MP
  1000. imply DM_USB_GADGET
  1001. config ARCH_TEGRA
  1002. bool "NVIDIA Tegra"
  1003. select GPIO_EXTRA_HEADER
  1004. imply DISTRO_DEFAULTS
  1005. imply FAT_WRITE
  1006. config TARGET_VEXPRESS64_AEMV8A
  1007. bool "Support vexpress_aemv8a"
  1008. select ARM64
  1009. select GPIO_EXTRA_HEADER
  1010. select PL01X_SERIAL
  1011. config TARGET_VEXPRESS64_BASE_FVP
  1012. bool "Support Versatile Express ARMv8a FVP BASE model"
  1013. select ARM64
  1014. select GPIO_EXTRA_HEADER
  1015. select PL01X_SERIAL
  1016. select SEMIHOSTING
  1017. config TARGET_VEXPRESS64_JUNO
  1018. bool "Support Versatile Express Juno Development Platform"
  1019. select ARM64
  1020. select GPIO_EXTRA_HEADER
  1021. select PL01X_SERIAL
  1022. select DM
  1023. select OF_CONTROL
  1024. select OF_BOARD
  1025. select CLK
  1026. select DM_SERIAL
  1027. select ARM_PSCI_FW
  1028. select PSCI_RESET
  1029. select DM_ETH
  1030. select BLK
  1031. select USB
  1032. config TARGET_TOTAL_COMPUTE
  1033. bool "Support Total Compute Platform"
  1034. select ARM64
  1035. select PL01X_SERIAL
  1036. select DM
  1037. select DM_SERIAL
  1038. select DM_MMC
  1039. select DM_GPIO
  1040. config TARGET_LS2080A_EMU
  1041. bool "Support ls2080a_emu"
  1042. select ARCH_LS2080A
  1043. select ARM64
  1044. select ARMV8_MULTIENTRY
  1045. select FSL_DDR_SYNC_REFRESH
  1046. select GPIO_EXTRA_HEADER
  1047. help
  1048. Support for Freescale LS2080A_EMU platform.
  1049. The LS2080A Development System (EMULATOR) is a pre-silicon
  1050. development platform that supports the QorIQ LS2080A
  1051. Layerscape Architecture processor.
  1052. config TARGET_LS1088AQDS
  1053. bool "Support ls1088aqds"
  1054. select ARCH_LS1088A
  1055. select ARM64
  1056. select ARMV8_MULTIENTRY
  1057. select ARCH_SUPPORT_TFABOOT
  1058. select BOARD_LATE_INIT
  1059. select GPIO_EXTRA_HEADER
  1060. select SUPPORT_SPL
  1061. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1062. help
  1063. Support for NXP LS1088AQDS platform.
  1064. The LS1088A Development System (QDS) is a high-performance
  1065. development platform that supports the QorIQ LS1088A
  1066. Layerscape Architecture processor.
  1067. config TARGET_LS2080AQDS
  1068. bool "Support ls2080aqds"
  1069. select ARCH_LS2080A
  1070. select ARM64
  1071. select ARMV8_MULTIENTRY
  1072. select ARCH_SUPPORT_TFABOOT
  1073. select BOARD_LATE_INIT
  1074. select GPIO_EXTRA_HEADER
  1075. select SUPPORT_SPL
  1076. imply SCSI
  1077. imply SCSI_AHCI
  1078. select FSL_DDR_BIST
  1079. select FSL_DDR_INTERACTIVE if !SPL
  1080. help
  1081. Support for Freescale LS2080AQDS platform.
  1082. The LS2080A Development System (QDS) is a high-performance
  1083. development platform that supports the QorIQ LS2080A
  1084. Layerscape Architecture processor.
  1085. config TARGET_LS2080ARDB
  1086. bool "Support ls2080ardb"
  1087. select ARCH_LS2080A
  1088. select ARM64
  1089. select ARMV8_MULTIENTRY
  1090. select ARCH_SUPPORT_TFABOOT
  1091. select BOARD_LATE_INIT
  1092. select SUPPORT_SPL
  1093. select FSL_DDR_BIST
  1094. select FSL_DDR_INTERACTIVE if !SPL
  1095. select GPIO_EXTRA_HEADER
  1096. imply SCSI
  1097. imply SCSI_AHCI
  1098. help
  1099. Support for Freescale LS2080ARDB platform.
  1100. The LS2080A Reference design board (RDB) is a high-performance
  1101. development platform that supports the QorIQ LS2080A
  1102. Layerscape Architecture processor.
  1103. config TARGET_LS2081ARDB
  1104. bool "Support ls2081ardb"
  1105. select ARCH_LS2080A
  1106. select ARM64
  1107. select ARMV8_MULTIENTRY
  1108. select BOARD_LATE_INIT
  1109. select GPIO_EXTRA_HEADER
  1110. select SUPPORT_SPL
  1111. help
  1112. Support for Freescale LS2081ARDB platform.
  1113. The LS2081A Reference design board (RDB) is a high-performance
  1114. development platform that supports the QorIQ LS2081A/LS2041A
  1115. Layerscape Architecture processor.
  1116. config TARGET_LX2160ARDB
  1117. bool "Support lx2160ardb"
  1118. select ARCH_LX2160A
  1119. select ARM64
  1120. select ARMV8_MULTIENTRY
  1121. select ARCH_SUPPORT_TFABOOT
  1122. select BOARD_LATE_INIT
  1123. select GPIO_EXTRA_HEADER
  1124. help
  1125. Support for NXP LX2160ARDB platform.
  1126. The lx2160ardb (LX2160A Reference design board (RDB)
  1127. is a high-performance development platform that supports the
  1128. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1129. config TARGET_LX2160AQDS
  1130. bool "Support lx2160aqds"
  1131. select ARCH_LX2160A
  1132. select ARM64
  1133. select ARMV8_MULTIENTRY
  1134. select ARCH_SUPPORT_TFABOOT
  1135. select BOARD_LATE_INIT
  1136. select GPIO_EXTRA_HEADER
  1137. help
  1138. Support for NXP LX2160AQDS platform.
  1139. The lx2160aqds (LX2160A QorIQ Development System (QDS)
  1140. is a high-performance development platform that supports the
  1141. QorIQ LX2160A/LX2120A/LX2080A Layerscape Architecture processor.
  1142. config TARGET_LX2162AQDS
  1143. bool "Support lx2162aqds"
  1144. select ARCH_LX2162A
  1145. select ARCH_MISC_INIT
  1146. select ARM64
  1147. select ARMV8_MULTIENTRY
  1148. select ARCH_SUPPORT_TFABOOT
  1149. select BOARD_LATE_INIT
  1150. select GPIO_EXTRA_HEADER
  1151. help
  1152. Support for NXP LX2162AQDS platform.
  1153. The lx2162aqds support is based on LX2160A Layerscape Architecture processor.
  1154. config TARGET_HIKEY
  1155. bool "Support HiKey 96boards Consumer Edition Platform"
  1156. select ARM64
  1157. select DM
  1158. select DM_GPIO
  1159. select DM_SERIAL
  1160. select GPIO_EXTRA_HEADER
  1161. select OF_CONTROL
  1162. select PL01X_SERIAL
  1163. select SPECIFY_CONSOLE_INDEX
  1164. imply CMD_DM
  1165. help
  1166. Support for HiKey 96boards platform. It features a HI6220
  1167. SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
  1168. config TARGET_HIKEY960
  1169. bool "Support HiKey960 96boards Consumer Edition Platform"
  1170. select ARM64
  1171. select DM
  1172. select DM_SERIAL
  1173. select GPIO_EXTRA_HEADER
  1174. select OF_CONTROL
  1175. select PL01X_SERIAL
  1176. imply CMD_DM
  1177. help
  1178. Support for HiKey960 96boards platform. It features a HI3660
  1179. SoC, with 4xA73 CPU, 4xA53 CPU, MALI-G71 GPU, and 3GB RAM.
  1180. config TARGET_POPLAR
  1181. bool "Support Poplar 96boards Enterprise Edition Platform"
  1182. select ARM64
  1183. select DM
  1184. select DM_SERIAL
  1185. select GPIO_EXTRA_HEADER
  1186. select OF_CONTROL
  1187. select PL01X_SERIAL
  1188. imply CMD_DM
  1189. help
  1190. Support for Poplar 96boards EE platform. It features a HI3798cv200
  1191. SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
  1192. making it capable of running any commercial set-top solution based on
  1193. Linux or Android.
  1194. config TARGET_LS1012AQDS
  1195. bool "Support ls1012aqds"
  1196. select ARCH_LS1012A
  1197. select ARM64
  1198. select ARCH_SUPPORT_TFABOOT
  1199. select BOARD_LATE_INIT
  1200. select GPIO_EXTRA_HEADER
  1201. help
  1202. Support for Freescale LS1012AQDS platform.
  1203. The LS1012A Development System (QDS) is a high-performance
  1204. development platform that supports the QorIQ LS1012A
  1205. Layerscape Architecture processor.
  1206. config TARGET_LS1012ARDB
  1207. bool "Support ls1012ardb"
  1208. select ARCH_LS1012A
  1209. select ARM64
  1210. select ARCH_SUPPORT_TFABOOT
  1211. select BOARD_LATE_INIT
  1212. select GPIO_EXTRA_HEADER
  1213. imply SCSI
  1214. imply SCSI_AHCI
  1215. help
  1216. Support for Freescale LS1012ARDB platform.
  1217. The LS1012A Reference design board (RDB) is a high-performance
  1218. development platform that supports the QorIQ LS1012A
  1219. Layerscape Architecture processor.
  1220. config TARGET_LS1012A2G5RDB
  1221. bool "Support ls1012a2g5rdb"
  1222. select ARCH_LS1012A
  1223. select ARM64
  1224. select ARCH_SUPPORT_TFABOOT
  1225. select BOARD_LATE_INIT
  1226. select GPIO_EXTRA_HEADER
  1227. imply SCSI
  1228. help
  1229. Support for Freescale LS1012A2G5RDB platform.
  1230. The LS1012A 2G5 Reference design board (RDB) is a high-performance
  1231. development platform that supports the QorIQ LS1012A
  1232. Layerscape Architecture processor.
  1233. config TARGET_LS1012AFRWY
  1234. bool "Support ls1012afrwy"
  1235. select ARCH_LS1012A
  1236. select ARM64
  1237. select ARCH_SUPPORT_TFABOOT
  1238. select BOARD_LATE_INIT
  1239. select GPIO_EXTRA_HEADER
  1240. imply SCSI
  1241. imply SCSI_AHCI
  1242. help
  1243. Support for Freescale LS1012AFRWY platform.
  1244. The LS1012A FRWY board (FRWY) is a high-performance
  1245. development platform that supports the QorIQ LS1012A
  1246. Layerscape Architecture processor.
  1247. config TARGET_LS1012AFRDM
  1248. bool "Support ls1012afrdm"
  1249. select ARCH_LS1012A
  1250. select ARM64
  1251. select ARCH_SUPPORT_TFABOOT
  1252. select GPIO_EXTRA_HEADER
  1253. help
  1254. Support for Freescale LS1012AFRDM platform.
  1255. The LS1012A Freedom board (FRDM) is a high-performance
  1256. development platform that supports the QorIQ LS1012A
  1257. Layerscape Architecture processor.
  1258. config TARGET_LS1028AQDS
  1259. bool "Support ls1028aqds"
  1260. select ARCH_LS1028A
  1261. select ARM64
  1262. select ARMV8_MULTIENTRY
  1263. select ARCH_SUPPORT_TFABOOT
  1264. select BOARD_LATE_INIT
  1265. select GPIO_EXTRA_HEADER
  1266. help
  1267. Support for Freescale LS1028AQDS platform
  1268. The LS1028A Development System (QDS) is a high-performance
  1269. development platform that supports the QorIQ LS1028A
  1270. Layerscape Architecture processor.
  1271. config TARGET_LS1028ARDB
  1272. bool "Support ls1028ardb"
  1273. select ARCH_LS1028A
  1274. select ARM64
  1275. select ARMV8_MULTIENTRY
  1276. select ARCH_SUPPORT_TFABOOT
  1277. select BOARD_LATE_INIT
  1278. select GPIO_EXTRA_HEADER
  1279. help
  1280. Support for Freescale LS1028ARDB platform
  1281. The LS1028A Development System (RDB) is a high-performance
  1282. development platform that supports the QorIQ LS1028A
  1283. Layerscape Architecture processor.
  1284. config TARGET_LS1088ARDB
  1285. bool "Support ls1088ardb"
  1286. select ARCH_LS1088A
  1287. select ARM64
  1288. select ARMV8_MULTIENTRY
  1289. select ARCH_SUPPORT_TFABOOT
  1290. select BOARD_LATE_INIT
  1291. select SUPPORT_SPL
  1292. select FSL_DDR_INTERACTIVE if !SD_BOOT
  1293. select GPIO_EXTRA_HEADER
  1294. help
  1295. Support for NXP LS1088ARDB platform.
  1296. The LS1088A Reference design board (RDB) is a high-performance
  1297. development platform that supports the QorIQ LS1088A
  1298. Layerscape Architecture processor.
  1299. config TARGET_LS1021AQDS
  1300. bool "Support ls1021aqds"
  1301. select ARCH_LS1021A
  1302. select ARCH_SUPPORT_PSCI
  1303. select BOARD_EARLY_INIT_F
  1304. select BOARD_LATE_INIT
  1305. select CPU_V7A
  1306. select CPU_V7_HAS_NONSEC
  1307. select CPU_V7_HAS_VIRT
  1308. select LS1_DEEP_SLEEP
  1309. select SUPPORT_SPL
  1310. select SYS_FSL_DDR
  1311. select FSL_DDR_INTERACTIVE
  1312. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1313. select GPIO_EXTRA_HEADER
  1314. select SPI_FLASH_DATAFLASH if FSL_DSPI || FSL_QSPI
  1315. imply SCSI
  1316. config TARGET_LS1021ATWR
  1317. bool "Support ls1021atwr"
  1318. select ARCH_LS1021A
  1319. select ARCH_SUPPORT_PSCI
  1320. select BOARD_EARLY_INIT_F
  1321. select BOARD_LATE_INIT
  1322. select CPU_V7A
  1323. select CPU_V7_HAS_NONSEC
  1324. select CPU_V7_HAS_VIRT
  1325. select LS1_DEEP_SLEEP
  1326. select SUPPORT_SPL
  1327. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1328. select GPIO_EXTRA_HEADER
  1329. imply SCSI
  1330. config TARGET_PG_WCOM_SELI8
  1331. bool "Support Hitachi-Powergrids SELI8 service unit card"
  1332. select ARCH_LS1021A
  1333. select ARCH_SUPPORT_PSCI
  1334. select BOARD_EARLY_INIT_F
  1335. select BOARD_LATE_INIT
  1336. select CPU_V7A
  1337. select CPU_V7_HAS_NONSEC
  1338. select CPU_V7_HAS_VIRT
  1339. select SYS_FSL_DDR
  1340. select FSL_DDR_INTERACTIVE
  1341. select GPIO_EXTRA_HEADER
  1342. select VENDOR_KM
  1343. imply SCSI
  1344. help
  1345. Support for Hitachi-Powergrids SELI8 service unit card.
  1346. SELI8 is a QorIQ LS1021a based service unit card used
  1347. in XMC20 and FOX615 product families.
  1348. config TARGET_PG_WCOM_EXPU1
  1349. bool "Support Hitachi-Powergrids EXPU1 service unit card"
  1350. select ARCH_LS1021A
  1351. select ARCH_SUPPORT_PSCI
  1352. select BOARD_EARLY_INIT_F
  1353. select BOARD_LATE_INIT
  1354. select CPU_V7A
  1355. select CPU_V7_HAS_NONSEC
  1356. select CPU_V7_HAS_VIRT
  1357. select SYS_FSL_DDR
  1358. select FSL_DDR_INTERACTIVE
  1359. select VENDOR_KM
  1360. imply SCSI
  1361. help
  1362. Support for Hitachi-Powergrids EXPU1 service unit card.
  1363. EXPU1 is a QorIQ LS1021a based service unit card used
  1364. in XMC20 and FOX615 product families.
  1365. config TARGET_LS1021ATSN
  1366. bool "Support ls1021atsn"
  1367. select ARCH_LS1021A
  1368. select ARCH_SUPPORT_PSCI
  1369. select BOARD_EARLY_INIT_F
  1370. select BOARD_LATE_INIT
  1371. select CPU_V7A
  1372. select CPU_V7_HAS_NONSEC
  1373. select CPU_V7_HAS_VIRT
  1374. select LS1_DEEP_SLEEP
  1375. select SUPPORT_SPL
  1376. select GPIO_EXTRA_HEADER
  1377. imply SCSI
  1378. config TARGET_LS1021AIOT
  1379. bool "Support ls1021aiot"
  1380. select ARCH_LS1021A
  1381. select ARCH_SUPPORT_PSCI
  1382. select BOARD_LATE_INIT
  1383. select CPU_V7A
  1384. select CPU_V7_HAS_NONSEC
  1385. select CPU_V7_HAS_VIRT
  1386. select SUPPORT_SPL
  1387. select DM_SPI_FLASH if FSL_DSPI || FSL_QSPI
  1388. select GPIO_EXTRA_HEADER
  1389. imply SCSI
  1390. help
  1391. Support for Freescale LS1021AIOT platform.
  1392. The LS1021A Freescale board (IOT) is a high-performance
  1393. development platform that supports the QorIQ LS1021A
  1394. Layerscape Architecture processor.
  1395. config TARGET_LS1043AQDS
  1396. bool "Support ls1043aqds"
  1397. select ARCH_LS1043A
  1398. select ARM64
  1399. select ARMV8_MULTIENTRY
  1400. select ARCH_SUPPORT_TFABOOT
  1401. select BOARD_EARLY_INIT_F
  1402. select BOARD_LATE_INIT
  1403. select SUPPORT_SPL
  1404. select FSL_DDR_INTERACTIVE if !SPL
  1405. select FSL_DSPI if !SPL_NO_DSPI
  1406. select DM_SPI_FLASH if FSL_DSPI
  1407. select GPIO_EXTRA_HEADER
  1408. imply SCSI
  1409. imply SCSI_AHCI
  1410. help
  1411. Support for Freescale LS1043AQDS platform.
  1412. config TARGET_LS1043ARDB
  1413. bool "Support ls1043ardb"
  1414. select ARCH_LS1043A
  1415. select ARM64
  1416. select ARMV8_MULTIENTRY
  1417. select ARCH_SUPPORT_TFABOOT
  1418. select BOARD_EARLY_INIT_F
  1419. select BOARD_LATE_INIT
  1420. select SUPPORT_SPL
  1421. select FSL_DSPI if !SPL_NO_DSPI
  1422. select DM_SPI_FLASH if FSL_DSPI
  1423. select GPIO_EXTRA_HEADER
  1424. help
  1425. Support for Freescale LS1043ARDB platform.
  1426. config TARGET_LS1046AQDS
  1427. bool "Support ls1046aqds"
  1428. select ARCH_LS1046A
  1429. select ARM64
  1430. select ARMV8_MULTIENTRY
  1431. select ARCH_SUPPORT_TFABOOT
  1432. select BOARD_EARLY_INIT_F
  1433. select BOARD_LATE_INIT
  1434. select DM_SPI_FLASH if DM_SPI
  1435. select SUPPORT_SPL
  1436. select FSL_DDR_BIST if !SPL
  1437. select FSL_DDR_INTERACTIVE if !SPL
  1438. select FSL_DDR_INTERACTIVE if !SPL
  1439. select GPIO_EXTRA_HEADER
  1440. imply SCSI
  1441. help
  1442. Support for Freescale LS1046AQDS platform.
  1443. The LS1046A Development System (QDS) is a high-performance
  1444. development platform that supports the QorIQ LS1046A
  1445. Layerscape Architecture processor.
  1446. config TARGET_LS1046ARDB
  1447. bool "Support ls1046ardb"
  1448. select ARCH_LS1046A
  1449. select ARM64
  1450. select ARMV8_MULTIENTRY
  1451. select ARCH_SUPPORT_TFABOOT
  1452. select BOARD_EARLY_INIT_F
  1453. select BOARD_LATE_INIT
  1454. select DM_SPI_FLASH if DM_SPI
  1455. select POWER_MC34VR500
  1456. select SUPPORT_SPL
  1457. select FSL_DDR_BIST
  1458. select FSL_DDR_INTERACTIVE if !SPL
  1459. select GPIO_EXTRA_HEADER
  1460. imply SCSI
  1461. help
  1462. Support for Freescale LS1046ARDB platform.
  1463. The LS1046A Reference Design Board (RDB) is a high-performance
  1464. development platform that supports the QorIQ LS1046A
  1465. Layerscape Architecture processor.
  1466. config TARGET_LS1046AFRWY
  1467. bool "Support ls1046afrwy"
  1468. select ARCH_LS1046A
  1469. select ARM64
  1470. select ARMV8_MULTIENTRY
  1471. select ARCH_SUPPORT_TFABOOT
  1472. select BOARD_EARLY_INIT_F
  1473. select BOARD_LATE_INIT
  1474. select DM_SPI_FLASH if DM_SPI
  1475. select GPIO_EXTRA_HEADER
  1476. imply SCSI
  1477. help
  1478. Support for Freescale LS1046AFRWY platform.
  1479. The LS1046A Freeway Board (FRWY) is a high-performance
  1480. development platform that supports the QorIQ LS1046A
  1481. Layerscape Architecture processor.
  1482. config TARGET_SL28
  1483. bool "Support sl28"
  1484. select ARCH_LS1028A
  1485. select ARM64
  1486. select ARMV8_MULTIENTRY
  1487. select SUPPORT_SPL
  1488. select BINMAN
  1489. select DM
  1490. select DM_GPIO
  1491. select DM_I2C
  1492. select DM_MMC
  1493. select DM_SPI_FLASH
  1494. select DM_ETH
  1495. select DM_MDIO
  1496. select DM_PCI
  1497. select DM_RNG
  1498. select DM_RTC
  1499. select DM_SCSI
  1500. select DM_SERIAL
  1501. select DM_SPI
  1502. select GPIO_EXTRA_HEADER
  1503. select SPL_DM if SPL
  1504. select SPL_DM_SPI if SPL
  1505. select SPL_DM_SPI_FLASH if SPL
  1506. select SPL_DM_I2C if SPL
  1507. select SPL_DM_MMC if SPL
  1508. select SPL_DM_SERIAL if SPL
  1509. help
  1510. Support for Kontron SMARC-sAL28 board.
  1511. config TARGET_COLIBRI_PXA270
  1512. bool "Support colibri_pxa270"
  1513. select CPU_PXA
  1514. select GPIO_EXTRA_HEADER
  1515. config ARCH_UNIPHIER
  1516. bool "Socionext UniPhier SoCs"
  1517. select BOARD_LATE_INIT
  1518. select DM
  1519. select DM_ETH
  1520. select DM_GPIO
  1521. select DM_I2C
  1522. select DM_MMC
  1523. select DM_MTD
  1524. select DM_RESET
  1525. select DM_SERIAL
  1526. select OF_BOARD_SETUP
  1527. select OF_CONTROL
  1528. select OF_LIBFDT
  1529. select PINCTRL
  1530. select SPL_BOARD_INIT if SPL
  1531. select SPL_DM if SPL
  1532. select SPL_LIBCOMMON_SUPPORT if SPL
  1533. select SPL_LIBGENERIC_SUPPORT if SPL
  1534. select SPL_OF_CONTROL if SPL
  1535. select SPL_PINCTRL if SPL
  1536. select SUPPORT_SPL
  1537. imply CMD_DM
  1538. imply DISTRO_DEFAULTS
  1539. imply FAT_WRITE
  1540. help
  1541. Support for UniPhier SoC family developed by Socionext Inc.
  1542. (formerly, System LSI Business Division of Panasonic Corporation)
  1543. config ARCH_SYNQUACER
  1544. bool "Socionext SynQuacer SoCs"
  1545. select ARM64
  1546. select DM
  1547. select GIC_V3
  1548. select PSCI_RESET
  1549. select SYSRESET
  1550. select SYSRESET_PSCI
  1551. select OF_CONTROL
  1552. help
  1553. Support for SynQuacer SoC family developed by Socionext Inc.
  1554. This SoC is used on 96boards EE DeveloperBox.
  1555. config ARCH_STM32
  1556. bool "Support STMicroelectronics STM32 MCU with cortex M"
  1557. select CPU_V7M
  1558. select DM
  1559. select DM_SERIAL
  1560. select GPIO_EXTRA_HEADER
  1561. imply CMD_DM
  1562. config ARCH_STI
  1563. bool "Support STMicrolectronics SoCs"
  1564. select BLK
  1565. select CPU_V7A
  1566. select DM
  1567. select DM_MMC
  1568. select DM_RESET
  1569. select DM_SERIAL
  1570. imply CMD_DM
  1571. help
  1572. Support for STMicroelectronics STiH407/10 SoC family.
  1573. This SoC is used on Linaro 96Board STiH410-B2260
  1574. config ARCH_STM32MP
  1575. bool "Support STMicroelectronics STM32MP Socs with cortex A"
  1576. select ARCH_MISC_INIT
  1577. select ARCH_SUPPORT_TFABOOT
  1578. select BOARD_LATE_INIT
  1579. select CLK
  1580. select DM
  1581. select DM_GPIO
  1582. select DM_RESET
  1583. select DM_SERIAL
  1584. select GPIO_EXTRA_HEADER
  1585. select MISC
  1586. select OF_CONTROL
  1587. select OF_LIBFDT
  1588. select OF_SYSTEM_SETUP
  1589. select PINCTRL
  1590. select REGMAP
  1591. select SUPPORT_SPL
  1592. select SYSCON
  1593. select SYSRESET
  1594. select SYS_THUMB_BUILD
  1595. imply SPL_SYSRESET
  1596. imply CMD_DM
  1597. imply CMD_POWEROFF
  1598. imply OF_LIBFDT_OVERLAY
  1599. imply ENV_VARS_UBOOT_RUNTIME_CONFIG
  1600. imply USE_PREBOOT
  1601. help
  1602. Support for STM32MP SoC family developed by STMicroelectronics,
  1603. MPUs based on ARM cortex A core
  1604. U-BOOT is running in DDR, loaded by the First Stage BootLoader (FSBL).
  1605. FSBL can be TF-A: Trusted Firmware for Cortex A, for trusted boot
  1606. chain.
  1607. SPL is the unsecure FSBL for the basic boot chain.
  1608. config ARCH_ROCKCHIP
  1609. bool "Support Rockchip SoCs"
  1610. select BLK
  1611. select BINMAN if SPL_OPTEE
  1612. select DM
  1613. select DM_GPIO
  1614. select DM_I2C
  1615. select DM_MMC
  1616. select DM_PWM
  1617. select DM_REGULATOR
  1618. select DM_SERIAL
  1619. select DM_SPI
  1620. select DM_SPI_FLASH
  1621. select ENABLE_ARM_SOC_BOOT0_HOOK
  1622. select OF_CONTROL
  1623. select SPI
  1624. select SPL_DM if SPL
  1625. select SPL_DM_SPI if SPL
  1626. select SPL_DM_SPI_FLASH if SPL
  1627. select SYS_MALLOC_F
  1628. select SYS_THUMB_BUILD if !ARM64
  1629. imply ADC
  1630. imply CMD_DM
  1631. imply DEBUG_UART_BOARD_INIT
  1632. imply DISTRO_DEFAULTS
  1633. imply FAT_WRITE
  1634. imply SARADC_ROCKCHIP
  1635. imply SPL_SYSRESET
  1636. imply SPL_SYS_MALLOC_SIMPLE
  1637. imply SYS_NS16550
  1638. imply TPL_SYSRESET
  1639. imply USB_FUNCTION_FASTBOOT
  1640. config ARCH_OCTEONTX
  1641. bool "Support OcteonTX SoCs"
  1642. select CLK
  1643. select DM
  1644. select GPIO_EXTRA_HEADER
  1645. select ARM64
  1646. select OF_CONTROL
  1647. select OF_LIVE
  1648. select BOARD_LATE_INIT
  1649. select SYS_CACHE_SHIFT_7
  1650. config ARCH_OCTEONTX2
  1651. bool "Support OcteonTX2 SoCs"
  1652. select CLK
  1653. select DM
  1654. select GPIO_EXTRA_HEADER
  1655. select ARM64
  1656. select OF_CONTROL
  1657. select OF_LIVE
  1658. select BOARD_LATE_INIT
  1659. select SYS_CACHE_SHIFT_7
  1660. config TARGET_THUNDERX_88XX
  1661. bool "Support ThunderX 88xx"
  1662. select ARM64
  1663. select GPIO_EXTRA_HEADER
  1664. select OF_CONTROL
  1665. select PL01X_SERIAL
  1666. select SYS_CACHE_SHIFT_7
  1667. config ARCH_ASPEED
  1668. bool "Support Aspeed SoCs"
  1669. select DM
  1670. select OF_CONTROL
  1671. imply CMD_DM
  1672. config TARGET_DURIAN
  1673. bool "Support Phytium Durian Platform"
  1674. select ARM64
  1675. select GPIO_EXTRA_HEADER
  1676. help
  1677. Support for durian platform.
  1678. It has 2GB Sdram, uart and pcie.
  1679. config TARGET_PRESIDIO_ASIC
  1680. bool "Support Cortina Presidio ASIC Platform"
  1681. select ARM64
  1682. config TARGET_XENGUEST_ARM64
  1683. bool "Xen guest ARM64"
  1684. select ARM64
  1685. select XEN
  1686. select OF_CONTROL
  1687. select LINUX_KERNEL_IMAGE_HEADER
  1688. select XEN_SERIAL
  1689. select SSCANF
  1690. endchoice
  1691. config ARCH_SUPPORT_TFABOOT
  1692. bool
  1693. config TFABOOT
  1694. bool "Support for booting from TF-A"
  1695. depends on ARCH_SUPPORT_TFABOOT
  1696. default n
  1697. help
  1698. Some platforms support the setup of secure registers (for instance
  1699. for CPU errata handling) or provide secure services like PSCI.
  1700. Those services could also be provided by other firmware parts
  1701. like TF-A (Trusted Firmware for Cortex-A), in which case U-Boot
  1702. does not need to (and cannot) execute this code.
  1703. Enabling this option will make a U-Boot binary that is relying
  1704. on other firmware layers to provide secure functionality.
  1705. config TI_SECURE_DEVICE
  1706. bool "HS Device Type Support"
  1707. depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_K3
  1708. help
  1709. If a high secure (HS) device type is being used, this config
  1710. must be set. This option impacts various aspects of the
  1711. build system (to create signed boot images that can be
  1712. authenticated) and the code. See the doc/README.ti-secure
  1713. file for further details.
  1714. if AM43XX || AM33XX || OMAP54XX || ARCH_KEYSTONE
  1715. config ISW_ENTRY_ADDR
  1716. hex "Address in memory or XIP address of bootloader entry point"
  1717. default 0x402F4000 if AM43XX
  1718. default 0x402F0400 if AM33XX
  1719. default 0x40301350 if OMAP54XX
  1720. help
  1721. After any reset, the boot ROM searches the boot media for a valid
  1722. boot image. For non-XIP devices, the ROM then copies the image into
  1723. internal memory. For all boot modes, after the ROM processes the
  1724. boot image it eventually computes the entry point address depending
  1725. on the device type (secure/non-secure), boot media (xip/non-xip) and
  1726. image headers.
  1727. endif
  1728. source "arch/arm/mach-aspeed/Kconfig"
  1729. source "arch/arm/mach-at91/Kconfig"
  1730. source "arch/arm/mach-bcm283x/Kconfig"
  1731. source "arch/arm/mach-bcmstb/Kconfig"
  1732. source "arch/arm/mach-davinci/Kconfig"
  1733. source "arch/arm/mach-exynos/Kconfig"
  1734. source "arch/arm/mach-highbank/Kconfig"
  1735. source "arch/arm/mach-integrator/Kconfig"
  1736. source "arch/arm/mach-ipq40xx/Kconfig"
  1737. source "arch/arm/mach-k3/Kconfig"
  1738. source "arch/arm/mach-keystone/Kconfig"
  1739. source "arch/arm/mach-kirkwood/Kconfig"
  1740. source "arch/arm/mach-lpc32xx/Kconfig"
  1741. source "arch/arm/mach-mvebu/Kconfig"
  1742. source "arch/arm/mach-octeontx/Kconfig"
  1743. source "arch/arm/mach-octeontx2/Kconfig"
  1744. source "arch/arm/cpu/armv7/ls102xa/Kconfig"
  1745. source "arch/arm/mach-imx/mx2/Kconfig"
  1746. source "arch/arm/mach-imx/mx3/Kconfig"
  1747. source "arch/arm/mach-imx/mx5/Kconfig"
  1748. source "arch/arm/mach-imx/mx6/Kconfig"
  1749. source "arch/arm/mach-imx/mx7/Kconfig"
  1750. source "arch/arm/mach-imx/mx7ulp/Kconfig"
  1751. source "arch/arm/mach-imx/imx8/Kconfig"
  1752. source "arch/arm/mach-imx/imx8m/Kconfig"
  1753. source "arch/arm/mach-imx/imxrt/Kconfig"
  1754. source "arch/arm/mach-imx/mxs/Kconfig"
  1755. source "arch/arm/mach-omap2/Kconfig"
  1756. source "arch/arm/cpu/armv8/fsl-layerscape/Kconfig"
  1757. source "arch/arm/mach-orion5x/Kconfig"
  1758. source "arch/arm/mach-owl/Kconfig"
  1759. source "arch/arm/mach-rmobile/Kconfig"
  1760. source "arch/arm/mach-meson/Kconfig"
  1761. source "arch/arm/mach-mediatek/Kconfig"
  1762. source "arch/arm/mach-qemu/Kconfig"
  1763. source "arch/arm/mach-rockchip/Kconfig"
  1764. source "arch/arm/mach-s5pc1xx/Kconfig"
  1765. source "arch/arm/mach-snapdragon/Kconfig"
  1766. source "arch/arm/mach-socfpga/Kconfig"
  1767. source "arch/arm/mach-sti/Kconfig"
  1768. source "arch/arm/mach-stm32/Kconfig"
  1769. source "arch/arm/mach-stm32mp/Kconfig"
  1770. source "arch/arm/mach-sunxi/Kconfig"
  1771. source "arch/arm/mach-tegra/Kconfig"
  1772. source "arch/arm/mach-u8500/Kconfig"
  1773. source "arch/arm/mach-uniphier/Kconfig"
  1774. source "arch/arm/cpu/armv7/vf610/Kconfig"
  1775. source "arch/arm/mach-zynq/Kconfig"
  1776. source "arch/arm/mach-zynqmp/Kconfig"
  1777. source "arch/arm/mach-versal/Kconfig"
  1778. source "arch/arm/mach-zynqmp-r5/Kconfig"
  1779. source "arch/arm/cpu/armv7/Kconfig"
  1780. source "arch/arm/cpu/armv8/Kconfig"
  1781. source "arch/arm/mach-imx/Kconfig"
  1782. source "arch/arm/mach-nexell/Kconfig"
  1783. source "board/armltd/total_compute/Kconfig"
  1784. source "board/bosch/shc/Kconfig"
  1785. source "board/bosch/guardian/Kconfig"
  1786. source "board/CarMediaLab/flea3/Kconfig"
  1787. source "board/Marvell/aspenite/Kconfig"
  1788. source "board/Marvell/octeontx/Kconfig"
  1789. source "board/Marvell/octeontx2/Kconfig"
  1790. source "board/armltd/vexpress64/Kconfig"
  1791. source "board/cortina/presidio-asic/Kconfig"
  1792. source "board/broadcom/bcm963158/Kconfig"
  1793. source "board/broadcom/bcm968360bg/Kconfig"
  1794. source "board/broadcom/bcm968580xref/Kconfig"
  1795. source "board/broadcom/bcmns3/Kconfig"
  1796. source "board/cavium/thunderx/Kconfig"
  1797. source "board/eets/pdu001/Kconfig"
  1798. source "board/emulation/qemu-arm/Kconfig"
  1799. source "board/freescale/ls2080aqds/Kconfig"
  1800. source "board/freescale/ls2080ardb/Kconfig"
  1801. source "board/freescale/ls1088a/Kconfig"
  1802. source "board/freescale/ls1028a/Kconfig"
  1803. source "board/freescale/ls1021aqds/Kconfig"
  1804. source "board/freescale/ls1043aqds/Kconfig"
  1805. source "board/freescale/ls1021atwr/Kconfig"
  1806. source "board/freescale/ls1021atsn/Kconfig"
  1807. source "board/freescale/ls1021aiot/Kconfig"
  1808. source "board/freescale/ls1046aqds/Kconfig"
  1809. source "board/freescale/ls1043ardb/Kconfig"
  1810. source "board/freescale/ls1046ardb/Kconfig"
  1811. source "board/freescale/ls1046afrwy/Kconfig"
  1812. source "board/freescale/ls1012aqds/Kconfig"
  1813. source "board/freescale/ls1012ardb/Kconfig"
  1814. source "board/freescale/ls1012afrdm/Kconfig"
  1815. source "board/freescale/lx2160a/Kconfig"
  1816. source "board/grinn/chiliboard/Kconfig"
  1817. source "board/hisilicon/hikey/Kconfig"
  1818. source "board/hisilicon/hikey960/Kconfig"
  1819. source "board/hisilicon/poplar/Kconfig"
  1820. source "board/isee/igep003x/Kconfig"
  1821. source "board/kontron/sl28/Kconfig"
  1822. source "board/myir/mys_6ulx/Kconfig"
  1823. source "board/seeed/npi_imx6ull/Kconfig"
  1824. source "board/socionext/developerbox/Kconfig"
  1825. source "board/st/stv0991/Kconfig"
  1826. source "board/tcl/sl50/Kconfig"
  1827. source "board/toradex/colibri_pxa270/Kconfig"
  1828. source "board/variscite/dart_6ul/Kconfig"
  1829. source "board/vscom/baltos/Kconfig"
  1830. source "board/phytium/durian/Kconfig"
  1831. source "board/xen/xenguest_arm64/Kconfig"
  1832. source "board/keymile/Kconfig"
  1833. source "arch/arm/Kconfig.debug"
  1834. endmenu
  1835. config SPL_LDSCRIPT
  1836. default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if (ARCH_MX23 || ARCH_MX28) && !SPL_FRAMEWORK
  1837. default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
  1838. default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64