cfi_flash.c 64 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2002-2004
  4. * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
  5. *
  6. * Copyright (C) 2003 Arabella Software Ltd.
  7. * Yuli Barcohen <yuli@arabellasw.com>
  8. *
  9. * Copyright (C) 2004
  10. * Ed Okerson
  11. *
  12. * Copyright (C) 2006
  13. * Tolunay Orkun <listmember@orkun.us>
  14. */
  15. /* The DEBUG define must be before common to enable debugging */
  16. /* #define DEBUG */
  17. #include <common.h>
  18. #include <console.h>
  19. #include <dm.h>
  20. #include <env.h>
  21. #include <errno.h>
  22. #include <fdt_support.h>
  23. #include <flash.h>
  24. #include <irq_func.h>
  25. #include <asm/processor.h>
  26. #include <asm/io.h>
  27. #include <asm/byteorder.h>
  28. #include <asm/unaligned.h>
  29. #include <env_internal.h>
  30. #include <mtd/cfi_flash.h>
  31. #include <watchdog.h>
  32. /*
  33. * This file implements a Common Flash Interface (CFI) driver for
  34. * U-Boot.
  35. *
  36. * The width of the port and the width of the chips are determined at
  37. * initialization. These widths are used to calculate the address for
  38. * access CFI data structures.
  39. *
  40. * References
  41. * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  42. * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  43. * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  44. * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  45. * AMD CFI Specification, Release 2.0 December 1, 2001
  46. * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  47. * Device IDs, Publication Number 25538 Revision A, November 8, 2001
  48. *
  49. * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  50. * reading and writing ... (yes there is such a Hardware).
  51. */
  52. DECLARE_GLOBAL_DATA_PTR;
  53. static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  54. #ifdef CONFIG_FLASH_CFI_MTD
  55. static uint flash_verbose = 1;
  56. #else
  57. #define flash_verbose 1
  58. #endif
  59. flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
  60. /*
  61. * Check if chip width is defined. If not, start detecting with 8bit.
  62. */
  63. #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  64. #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
  65. #endif
  66. #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  67. #define __maybe_weak __weak
  68. #else
  69. #define __maybe_weak static
  70. #endif
  71. /*
  72. * 0xffff is an undefined value for the configuration register. When
  73. * this value is returned, the configuration register shall not be
  74. * written at all (default mode).
  75. */
  76. static u16 cfi_flash_config_reg(int i)
  77. {
  78. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  79. return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  80. #else
  81. return 0xffff;
  82. #endif
  83. }
  84. #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  85. int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  86. #else
  87. int cfi_flash_num_flash_banks;
  88. #endif
  89. #ifdef CONFIG_CFI_FLASH /* for driver model */
  90. static void cfi_flash_init_dm(void)
  91. {
  92. struct udevice *dev;
  93. cfi_flash_num_flash_banks = 0;
  94. /*
  95. * The uclass_first_device() will probe the first device and
  96. * uclass_next_device() will probe the rest if they exist. So
  97. * that cfi_flash_probe() will get called assigning the base
  98. * addresses that are available.
  99. */
  100. for (uclass_first_device(UCLASS_MTD, &dev);
  101. dev;
  102. uclass_next_device(&dev)) {
  103. }
  104. }
  105. phys_addr_t cfi_flash_bank_addr(int i)
  106. {
  107. return flash_info[i].base;
  108. }
  109. #else
  110. __weak phys_addr_t cfi_flash_bank_addr(int i)
  111. {
  112. return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
  113. }
  114. #endif
  115. __weak unsigned long cfi_flash_bank_size(int i)
  116. {
  117. #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
  118. return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
  119. #else
  120. return 0;
  121. #endif
  122. }
  123. __maybe_weak void flash_write8(u8 value, void *addr)
  124. {
  125. __raw_writeb(value, addr);
  126. }
  127. __maybe_weak void flash_write16(u16 value, void *addr)
  128. {
  129. __raw_writew(value, addr);
  130. }
  131. __maybe_weak void flash_write32(u32 value, void *addr)
  132. {
  133. __raw_writel(value, addr);
  134. }
  135. __maybe_weak void flash_write64(u64 value, void *addr)
  136. {
  137. /* No architectures currently implement __raw_writeq() */
  138. *(volatile u64 *)addr = value;
  139. }
  140. __maybe_weak u8 flash_read8(void *addr)
  141. {
  142. return __raw_readb(addr);
  143. }
  144. __maybe_weak u16 flash_read16(void *addr)
  145. {
  146. return __raw_readw(addr);
  147. }
  148. __maybe_weak u32 flash_read32(void *addr)
  149. {
  150. return __raw_readl(addr);
  151. }
  152. __maybe_weak u64 flash_read64(void *addr)
  153. {
  154. /* No architectures currently implement __raw_readq() */
  155. return *(volatile u64 *)addr;
  156. }
  157. /*-----------------------------------------------------------------------
  158. */
  159. #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || \
  160. (defined(CONFIG_SYS_MONITOR_BASE) && \
  161. (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE))
  162. static flash_info_t *flash_get_info(ulong base)
  163. {
  164. int i;
  165. flash_info_t *info;
  166. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  167. info = &flash_info[i];
  168. if (info->size && info->start[0] <= base &&
  169. base <= info->start[0] + info->size - 1)
  170. return info;
  171. }
  172. return NULL;
  173. }
  174. #endif
  175. unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
  176. {
  177. if (sect != (info->sector_count - 1))
  178. return info->start[sect + 1] - info->start[sect];
  179. else
  180. return info->start[0] + info->size - info->start[sect];
  181. }
  182. /*-----------------------------------------------------------------------
  183. * create an address based on the offset and the port width
  184. */
  185. static inline void *
  186. flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
  187. {
  188. unsigned int byte_offset = offset * info->portwidth;
  189. return (void *)(info->start[sect] + byte_offset);
  190. }
  191. static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
  192. unsigned int offset, void *addr)
  193. {
  194. }
  195. /*-----------------------------------------------------------------------
  196. * make a proper sized command based on the port and chip widths
  197. */
  198. static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
  199. {
  200. int i;
  201. int cword_offset;
  202. int cp_offset;
  203. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  204. u32 cmd_le = cpu_to_le32(cmd);
  205. #endif
  206. uchar val;
  207. uchar *cp = (uchar *) cmdbuf;
  208. for (i = info->portwidth; i > 0; i--) {
  209. cword_offset = (info->portwidth - i) % info->chipwidth;
  210. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  211. cp_offset = info->portwidth - i;
  212. val = *((uchar *)&cmd_le + cword_offset);
  213. #else
  214. cp_offset = i - 1;
  215. val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
  216. #endif
  217. cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
  218. }
  219. }
  220. #ifdef DEBUG
  221. /*-----------------------------------------------------------------------
  222. * Debug support
  223. */
  224. static void print_longlong(char *str, unsigned long long data)
  225. {
  226. int i;
  227. char *cp;
  228. cp = (char *)&data;
  229. for (i = 0; i < 8; i++)
  230. sprintf(&str[i * 2], "%2.2x", *cp++);
  231. }
  232. static void flash_printqry(struct cfi_qry *qry)
  233. {
  234. u8 *p = (u8 *)qry;
  235. int x, y;
  236. for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
  237. debug("%02x : ", x);
  238. for (y = 0; y < 16; y++)
  239. debug("%2.2x ", p[x + y]);
  240. debug(" ");
  241. for (y = 0; y < 16; y++) {
  242. unsigned char c = p[x + y];
  243. if (c >= 0x20 && c <= 0x7e)
  244. debug("%c", c);
  245. else
  246. debug(".");
  247. }
  248. debug("\n");
  249. }
  250. }
  251. #endif
  252. /*-----------------------------------------------------------------------
  253. * read a character at a port width address
  254. */
  255. static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
  256. {
  257. uchar *cp;
  258. uchar retval;
  259. cp = flash_map(info, 0, offset);
  260. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  261. retval = flash_read8(cp);
  262. #else
  263. retval = flash_read8(cp + info->portwidth - 1);
  264. #endif
  265. flash_unmap(info, 0, offset, cp);
  266. return retval;
  267. }
  268. /*-----------------------------------------------------------------------
  269. * read a word at a port width address, assume 16bit bus
  270. */
  271. static inline ushort flash_read_word(flash_info_t *info, uint offset)
  272. {
  273. ushort *addr, retval;
  274. addr = flash_map(info, 0, offset);
  275. retval = flash_read16(addr);
  276. flash_unmap(info, 0, offset, addr);
  277. return retval;
  278. }
  279. /*-----------------------------------------------------------------------
  280. * read a long word by picking the least significant byte of each maximum
  281. * port size word. Swap for ppc format.
  282. */
  283. static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
  284. uint offset)
  285. {
  286. uchar *addr;
  287. ulong retval;
  288. #ifdef DEBUG
  289. int x;
  290. #endif
  291. addr = flash_map(info, sect, offset);
  292. #ifdef DEBUG
  293. debug("long addr is at %p info->portwidth = %d\n", addr,
  294. info->portwidth);
  295. for (x = 0; x < 4 * info->portwidth; x++)
  296. debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
  297. #endif
  298. #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  299. retval = ((flash_read8(addr) << 16) |
  300. (flash_read8(addr + info->portwidth) << 24) |
  301. (flash_read8(addr + 2 * info->portwidth)) |
  302. (flash_read8(addr + 3 * info->portwidth) << 8));
  303. #else
  304. retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
  305. (flash_read8(addr + info->portwidth - 1) << 16) |
  306. (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
  307. (flash_read8(addr + 3 * info->portwidth - 1)));
  308. #endif
  309. flash_unmap(info, sect, offset, addr);
  310. return retval;
  311. }
  312. /*
  313. * Write a proper sized command to the correct address
  314. */
  315. static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
  316. uint offset, u32 cmd)
  317. {
  318. void *addr;
  319. cfiword_t cword;
  320. addr = flash_map(info, sect, offset);
  321. flash_make_cmd(info, cmd, &cword);
  322. switch (info->portwidth) {
  323. case FLASH_CFI_8BIT:
  324. debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
  325. cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  326. flash_write8(cword.w8, addr);
  327. break;
  328. case FLASH_CFI_16BIT:
  329. debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
  330. cmd, cword.w16,
  331. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  332. flash_write16(cword.w16, addr);
  333. break;
  334. case FLASH_CFI_32BIT:
  335. debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
  336. cmd, cword.w32,
  337. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  338. flash_write32(cword.w32, addr);
  339. break;
  340. case FLASH_CFI_64BIT:
  341. #ifdef DEBUG
  342. {
  343. char str[20];
  344. print_longlong(str, cword.w64);
  345. debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
  346. addr, cmd, str,
  347. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  348. }
  349. #endif
  350. flash_write64(cword.w64, addr);
  351. break;
  352. }
  353. /* Ensure all the instructions are fully finished */
  354. sync();
  355. flash_unmap(info, sect, offset, addr);
  356. }
  357. static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
  358. {
  359. flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
  360. flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
  361. }
  362. /*-----------------------------------------------------------------------
  363. */
  364. static int flash_isequal(flash_info_t *info, flash_sect_t sect, uint offset,
  365. uchar cmd)
  366. {
  367. void *addr;
  368. cfiword_t cword;
  369. int retval;
  370. addr = flash_map(info, sect, offset);
  371. flash_make_cmd(info, cmd, &cword);
  372. debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
  373. switch (info->portwidth) {
  374. case FLASH_CFI_8BIT:
  375. debug("is= %x %x\n", flash_read8(addr), cword.w8);
  376. retval = (flash_read8(addr) == cword.w8);
  377. break;
  378. case FLASH_CFI_16BIT:
  379. debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
  380. retval = (flash_read16(addr) == cword.w16);
  381. break;
  382. case FLASH_CFI_32BIT:
  383. debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
  384. retval = (flash_read32(addr) == cword.w32);
  385. break;
  386. case FLASH_CFI_64BIT:
  387. #ifdef DEBUG
  388. {
  389. char str1[20];
  390. char str2[20];
  391. print_longlong(str1, flash_read64(addr));
  392. print_longlong(str2, cword.w64);
  393. debug("is= %s %s\n", str1, str2);
  394. }
  395. #endif
  396. retval = (flash_read64(addr) == cword.w64);
  397. break;
  398. default:
  399. retval = 0;
  400. break;
  401. }
  402. flash_unmap(info, sect, offset, addr);
  403. return retval;
  404. }
  405. /*-----------------------------------------------------------------------
  406. */
  407. static int flash_isset(flash_info_t *info, flash_sect_t sect, uint offset,
  408. uchar cmd)
  409. {
  410. void *addr;
  411. cfiword_t cword;
  412. int retval;
  413. addr = flash_map(info, sect, offset);
  414. flash_make_cmd(info, cmd, &cword);
  415. switch (info->portwidth) {
  416. case FLASH_CFI_8BIT:
  417. retval = ((flash_read8(addr) & cword.w8) == cword.w8);
  418. break;
  419. case FLASH_CFI_16BIT:
  420. retval = ((flash_read16(addr) & cword.w16) == cword.w16);
  421. break;
  422. case FLASH_CFI_32BIT:
  423. retval = ((flash_read32(addr) & cword.w32) == cword.w32);
  424. break;
  425. case FLASH_CFI_64BIT:
  426. retval = ((flash_read64(addr) & cword.w64) == cword.w64);
  427. break;
  428. default:
  429. retval = 0;
  430. break;
  431. }
  432. flash_unmap(info, sect, offset, addr);
  433. return retval;
  434. }
  435. /*-----------------------------------------------------------------------
  436. */
  437. static int flash_toggle(flash_info_t *info, flash_sect_t sect, uint offset,
  438. uchar cmd)
  439. {
  440. u8 *addr;
  441. cfiword_t cword;
  442. int retval;
  443. addr = flash_map(info, sect, offset);
  444. flash_make_cmd(info, cmd, &cword);
  445. switch (info->portwidth) {
  446. case FLASH_CFI_8BIT:
  447. retval = flash_read8(addr) != flash_read8(addr);
  448. break;
  449. case FLASH_CFI_16BIT:
  450. retval = flash_read16(addr) != flash_read16(addr);
  451. break;
  452. case FLASH_CFI_32BIT:
  453. retval = flash_read32(addr) != flash_read32(addr);
  454. break;
  455. case FLASH_CFI_64BIT:
  456. retval = ((flash_read32(addr) != flash_read32(addr)) ||
  457. (flash_read32(addr + 4) != flash_read32(addr + 4)));
  458. break;
  459. default:
  460. retval = 0;
  461. break;
  462. }
  463. flash_unmap(info, sect, offset, addr);
  464. return retval;
  465. }
  466. /*
  467. * flash_is_busy - check to see if the flash is busy
  468. *
  469. * This routine checks the status of the chip and returns true if the
  470. * chip is busy.
  471. */
  472. static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
  473. {
  474. int retval;
  475. switch (info->vendor) {
  476. case CFI_CMDSET_INTEL_PROG_REGIONS:
  477. case CFI_CMDSET_INTEL_STANDARD:
  478. case CFI_CMDSET_INTEL_EXTENDED:
  479. retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
  480. break;
  481. case CFI_CMDSET_AMD_STANDARD:
  482. case CFI_CMDSET_AMD_EXTENDED:
  483. #ifdef CONFIG_FLASH_CFI_LEGACY
  484. case CFI_CMDSET_AMD_LEGACY:
  485. #endif
  486. if (info->sr_supported) {
  487. flash_write_cmd(info, sect, info->addr_unlock1,
  488. FLASH_CMD_READ_STATUS);
  489. retval = !flash_isset(info, sect, 0,
  490. FLASH_STATUS_DONE);
  491. } else {
  492. retval = flash_toggle(info, sect, 0,
  493. AMD_STATUS_TOGGLE);
  494. }
  495. break;
  496. default:
  497. retval = 0;
  498. }
  499. debug("%s: %d\n", __func__, retval);
  500. return retval;
  501. }
  502. /*-----------------------------------------------------------------------
  503. * wait for XSR.7 to be set. Time out with an error if it does not.
  504. * This routine does not set the flash to read-array mode.
  505. */
  506. static int flash_status_check(flash_info_t *info, flash_sect_t sector,
  507. ulong tout, char *prompt)
  508. {
  509. ulong start;
  510. #if CONFIG_SYS_HZ != 1000
  511. /* Avoid overflow for large HZ */
  512. if ((ulong)CONFIG_SYS_HZ > 100000)
  513. tout *= (ulong)CONFIG_SYS_HZ / 1000;
  514. else
  515. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  516. #endif
  517. /* Wait for command completion */
  518. #ifdef CONFIG_SYS_LOW_RES_TIMER
  519. reset_timer();
  520. #endif
  521. start = get_timer(0);
  522. WATCHDOG_RESET();
  523. while (flash_is_busy(info, sector)) {
  524. if (get_timer(start) > tout) {
  525. printf("Flash %s timeout at address %lx data %lx\n",
  526. prompt, info->start[sector],
  527. flash_read_long(info, sector, 0));
  528. flash_write_cmd(info, sector, 0, info->cmd_reset);
  529. udelay(1);
  530. return ERR_TIMEOUT;
  531. }
  532. udelay(1); /* also triggers watchdog */
  533. }
  534. return ERR_OK;
  535. }
  536. /*-----------------------------------------------------------------------
  537. * Wait for XSR.7 to be set, if it times out print an error, otherwise
  538. * do a full status check.
  539. *
  540. * This routine sets the flash to read-array mode.
  541. */
  542. static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
  543. ulong tout, char *prompt)
  544. {
  545. int retcode;
  546. retcode = flash_status_check(info, sector, tout, prompt);
  547. switch (info->vendor) {
  548. case CFI_CMDSET_INTEL_PROG_REGIONS:
  549. case CFI_CMDSET_INTEL_EXTENDED:
  550. case CFI_CMDSET_INTEL_STANDARD:
  551. if (retcode == ERR_OK &&
  552. !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
  553. retcode = ERR_INVAL;
  554. printf("Flash %s error at address %lx\n", prompt,
  555. info->start[sector]);
  556. if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
  557. FLASH_STATUS_PSLBS)) {
  558. puts("Command Sequence Error.\n");
  559. } else if (flash_isset(info, sector, 0,
  560. FLASH_STATUS_ECLBS)) {
  561. puts("Block Erase Error.\n");
  562. retcode = ERR_NOT_ERASED;
  563. } else if (flash_isset(info, sector, 0,
  564. FLASH_STATUS_PSLBS)) {
  565. puts("Locking Error\n");
  566. }
  567. if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
  568. puts("Block locked.\n");
  569. retcode = ERR_PROTECTED;
  570. }
  571. if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
  572. puts("Vpp Low Error.\n");
  573. }
  574. flash_write_cmd(info, sector, 0, info->cmd_reset);
  575. udelay(1);
  576. break;
  577. default:
  578. break;
  579. }
  580. return retcode;
  581. }
  582. static int use_flash_status_poll(flash_info_t *info)
  583. {
  584. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  585. if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
  586. info->vendor == CFI_CMDSET_AMD_STANDARD)
  587. return 1;
  588. #endif
  589. return 0;
  590. }
  591. static int flash_status_poll(flash_info_t *info, void *src, void *dst,
  592. ulong tout, char *prompt)
  593. {
  594. #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
  595. ulong start;
  596. int ready;
  597. #if CONFIG_SYS_HZ != 1000
  598. /* Avoid overflow for large HZ */
  599. if ((ulong)CONFIG_SYS_HZ > 100000)
  600. tout *= (ulong)CONFIG_SYS_HZ / 1000;
  601. else
  602. tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
  603. #endif
  604. /* Wait for command completion */
  605. #ifdef CONFIG_SYS_LOW_RES_TIMER
  606. reset_timer();
  607. #endif
  608. start = get_timer(0);
  609. WATCHDOG_RESET();
  610. while (1) {
  611. switch (info->portwidth) {
  612. case FLASH_CFI_8BIT:
  613. ready = flash_read8(dst) == flash_read8(src);
  614. break;
  615. case FLASH_CFI_16BIT:
  616. ready = flash_read16(dst) == flash_read16(src);
  617. break;
  618. case FLASH_CFI_32BIT:
  619. ready = flash_read32(dst) == flash_read32(src);
  620. break;
  621. case FLASH_CFI_64BIT:
  622. ready = flash_read64(dst) == flash_read64(src);
  623. break;
  624. default:
  625. ready = 0;
  626. break;
  627. }
  628. if (ready)
  629. break;
  630. if (get_timer(start) > tout) {
  631. printf("Flash %s timeout at address %lx data %lx\n",
  632. prompt, (ulong)dst, (ulong)flash_read8(dst));
  633. return ERR_TIMEOUT;
  634. }
  635. udelay(1); /* also triggers watchdog */
  636. }
  637. #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
  638. return ERR_OK;
  639. }
  640. /*-----------------------------------------------------------------------
  641. */
  642. static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
  643. {
  644. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  645. unsigned short w;
  646. unsigned int l;
  647. unsigned long long ll;
  648. #endif
  649. switch (info->portwidth) {
  650. case FLASH_CFI_8BIT:
  651. cword->w8 = c;
  652. break;
  653. case FLASH_CFI_16BIT:
  654. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  655. w = c;
  656. w <<= 8;
  657. cword->w16 = (cword->w16 >> 8) | w;
  658. #else
  659. cword->w16 = (cword->w16 << 8) | c;
  660. #endif
  661. break;
  662. case FLASH_CFI_32BIT:
  663. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  664. l = c;
  665. l <<= 24;
  666. cword->w32 = (cword->w32 >> 8) | l;
  667. #else
  668. cword->w32 = (cword->w32 << 8) | c;
  669. #endif
  670. break;
  671. case FLASH_CFI_64BIT:
  672. #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
  673. ll = c;
  674. ll <<= 56;
  675. cword->w64 = (cword->w64 >> 8) | ll;
  676. #else
  677. cword->w64 = (cword->w64 << 8) | c;
  678. #endif
  679. break;
  680. }
  681. }
  682. /*
  683. * Loop through the sector table starting from the previously found sector.
  684. * Searches forwards or backwards, dependent on the passed address.
  685. */
  686. static flash_sect_t find_sector(flash_info_t *info, ulong addr)
  687. {
  688. static flash_sect_t saved_sector; /* previously found sector */
  689. static flash_info_t *saved_info; /* previously used flash bank */
  690. flash_sect_t sector = saved_sector;
  691. if (info != saved_info || sector >= info->sector_count)
  692. sector = 0;
  693. while ((sector < info->sector_count - 1) &&
  694. (info->start[sector] < addr))
  695. sector++;
  696. while ((info->start[sector] > addr) && (sector > 0))
  697. /*
  698. * also decrements the sector in case of an overshot
  699. * in the first loop
  700. */
  701. sector--;
  702. saved_sector = sector;
  703. saved_info = info;
  704. return sector;
  705. }
  706. /*-----------------------------------------------------------------------
  707. */
  708. static int flash_write_cfiword(flash_info_t *info, ulong dest, cfiword_t cword)
  709. {
  710. void *dstaddr = (void *)dest;
  711. int flag;
  712. flash_sect_t sect = 0;
  713. char sect_found = 0;
  714. /* Check if Flash is (sufficiently) erased */
  715. switch (info->portwidth) {
  716. case FLASH_CFI_8BIT:
  717. flag = ((flash_read8(dstaddr) & cword.w8) == cword.w8);
  718. break;
  719. case FLASH_CFI_16BIT:
  720. flag = ((flash_read16(dstaddr) & cword.w16) == cword.w16);
  721. break;
  722. case FLASH_CFI_32BIT:
  723. flag = ((flash_read32(dstaddr) & cword.w32) == cword.w32);
  724. break;
  725. case FLASH_CFI_64BIT:
  726. flag = ((flash_read64(dstaddr) & cword.w64) == cword.w64);
  727. break;
  728. default:
  729. flag = 0;
  730. break;
  731. }
  732. if (!flag)
  733. return ERR_NOT_ERASED;
  734. /* Disable interrupts which might cause a timeout here */
  735. flag = disable_interrupts();
  736. switch (info->vendor) {
  737. case CFI_CMDSET_INTEL_PROG_REGIONS:
  738. case CFI_CMDSET_INTEL_EXTENDED:
  739. case CFI_CMDSET_INTEL_STANDARD:
  740. flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
  741. flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
  742. break;
  743. case CFI_CMDSET_AMD_EXTENDED:
  744. case CFI_CMDSET_AMD_STANDARD:
  745. sect = find_sector(info, dest);
  746. flash_unlock_seq(info, sect);
  747. flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_WRITE);
  748. sect_found = 1;
  749. break;
  750. #ifdef CONFIG_FLASH_CFI_LEGACY
  751. case CFI_CMDSET_AMD_LEGACY:
  752. sect = find_sector(info, dest);
  753. flash_unlock_seq(info, 0);
  754. flash_write_cmd(info, 0, info->addr_unlock1, AMD_CMD_WRITE);
  755. sect_found = 1;
  756. break;
  757. #endif
  758. }
  759. switch (info->portwidth) {
  760. case FLASH_CFI_8BIT:
  761. flash_write8(cword.w8, dstaddr);
  762. break;
  763. case FLASH_CFI_16BIT:
  764. flash_write16(cword.w16, dstaddr);
  765. break;
  766. case FLASH_CFI_32BIT:
  767. flash_write32(cword.w32, dstaddr);
  768. break;
  769. case FLASH_CFI_64BIT:
  770. flash_write64(cword.w64, dstaddr);
  771. break;
  772. }
  773. /* re-enable interrupts if necessary */
  774. if (flag)
  775. enable_interrupts();
  776. if (!sect_found)
  777. sect = find_sector(info, dest);
  778. if (use_flash_status_poll(info))
  779. return flash_status_poll(info, &cword, dstaddr,
  780. info->write_tout, "write");
  781. else
  782. return flash_full_status_check(info, sect,
  783. info->write_tout, "write");
  784. }
  785. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  786. static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
  787. int len)
  788. {
  789. flash_sect_t sector;
  790. int cnt;
  791. int retcode;
  792. u8 *src = cp;
  793. u8 *dst = (u8 *)dest;
  794. u8 *dst2 = dst;
  795. int flag = 1;
  796. uint offset = 0;
  797. unsigned int shift;
  798. uchar write_cmd;
  799. switch (info->portwidth) {
  800. case FLASH_CFI_8BIT:
  801. shift = 0;
  802. break;
  803. case FLASH_CFI_16BIT:
  804. shift = 1;
  805. break;
  806. case FLASH_CFI_32BIT:
  807. shift = 2;
  808. break;
  809. case FLASH_CFI_64BIT:
  810. shift = 3;
  811. break;
  812. default:
  813. retcode = ERR_INVAL;
  814. goto out_unmap;
  815. }
  816. cnt = len >> shift;
  817. while ((cnt-- > 0) && (flag == 1)) {
  818. switch (info->portwidth) {
  819. case FLASH_CFI_8BIT:
  820. flag = ((flash_read8(dst2) & flash_read8(src)) ==
  821. flash_read8(src));
  822. src += 1, dst2 += 1;
  823. break;
  824. case FLASH_CFI_16BIT:
  825. flag = ((flash_read16(dst2) & flash_read16(src)) ==
  826. flash_read16(src));
  827. src += 2, dst2 += 2;
  828. break;
  829. case FLASH_CFI_32BIT:
  830. flag = ((flash_read32(dst2) & flash_read32(src)) ==
  831. flash_read32(src));
  832. src += 4, dst2 += 4;
  833. break;
  834. case FLASH_CFI_64BIT:
  835. flag = ((flash_read64(dst2) & flash_read64(src)) ==
  836. flash_read64(src));
  837. src += 8, dst2 += 8;
  838. break;
  839. }
  840. }
  841. if (!flag) {
  842. retcode = ERR_NOT_ERASED;
  843. goto out_unmap;
  844. }
  845. src = cp;
  846. sector = find_sector(info, dest);
  847. switch (info->vendor) {
  848. case CFI_CMDSET_INTEL_PROG_REGIONS:
  849. case CFI_CMDSET_INTEL_STANDARD:
  850. case CFI_CMDSET_INTEL_EXTENDED:
  851. write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
  852. FLASH_CMD_WRITE_BUFFER_PROG :
  853. FLASH_CMD_WRITE_TO_BUFFER;
  854. flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  855. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
  856. flash_write_cmd(info, sector, 0, write_cmd);
  857. retcode = flash_status_check(info, sector,
  858. info->buffer_write_tout,
  859. "write to buffer");
  860. if (retcode == ERR_OK) {
  861. /* reduce the number of loops by the width of
  862. * the port
  863. */
  864. cnt = len >> shift;
  865. flash_write_cmd(info, sector, 0, cnt - 1);
  866. while (cnt-- > 0) {
  867. switch (info->portwidth) {
  868. case FLASH_CFI_8BIT:
  869. flash_write8(flash_read8(src), dst);
  870. src += 1, dst += 1;
  871. break;
  872. case FLASH_CFI_16BIT:
  873. flash_write16(flash_read16(src), dst);
  874. src += 2, dst += 2;
  875. break;
  876. case FLASH_CFI_32BIT:
  877. flash_write32(flash_read32(src), dst);
  878. src += 4, dst += 4;
  879. break;
  880. case FLASH_CFI_64BIT:
  881. flash_write64(flash_read64(src), dst);
  882. src += 8, dst += 8;
  883. break;
  884. default:
  885. retcode = ERR_INVAL;
  886. goto out_unmap;
  887. }
  888. }
  889. flash_write_cmd(info, sector, 0,
  890. FLASH_CMD_WRITE_BUFFER_CONFIRM);
  891. retcode = flash_full_status_check(
  892. info, sector, info->buffer_write_tout,
  893. "buffer write");
  894. }
  895. break;
  896. case CFI_CMDSET_AMD_STANDARD:
  897. case CFI_CMDSET_AMD_EXTENDED:
  898. flash_unlock_seq(info, sector);
  899. #ifdef CONFIG_FLASH_SPANSION_S29WS_N
  900. offset = ((unsigned long)dst - info->start[sector]) >> shift;
  901. #endif
  902. flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
  903. cnt = len >> shift;
  904. flash_write_cmd(info, sector, offset, cnt - 1);
  905. switch (info->portwidth) {
  906. case FLASH_CFI_8BIT:
  907. while (cnt-- > 0) {
  908. flash_write8(flash_read8(src), dst);
  909. src += 1, dst += 1;
  910. }
  911. break;
  912. case FLASH_CFI_16BIT:
  913. while (cnt-- > 0) {
  914. flash_write16(flash_read16(src), dst);
  915. src += 2, dst += 2;
  916. }
  917. break;
  918. case FLASH_CFI_32BIT:
  919. while (cnt-- > 0) {
  920. flash_write32(flash_read32(src), dst);
  921. src += 4, dst += 4;
  922. }
  923. break;
  924. case FLASH_CFI_64BIT:
  925. while (cnt-- > 0) {
  926. flash_write64(flash_read64(src), dst);
  927. src += 8, dst += 8;
  928. }
  929. break;
  930. default:
  931. retcode = ERR_INVAL;
  932. goto out_unmap;
  933. }
  934. flash_write_cmd(info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
  935. if (use_flash_status_poll(info))
  936. retcode = flash_status_poll(info, src - (1 << shift),
  937. dst - (1 << shift),
  938. info->buffer_write_tout,
  939. "buffer write");
  940. else
  941. retcode = flash_full_status_check(info, sector,
  942. info->buffer_write_tout,
  943. "buffer write");
  944. break;
  945. default:
  946. debug("Unknown Command Set\n");
  947. retcode = ERR_INVAL;
  948. break;
  949. }
  950. out_unmap:
  951. return retcode;
  952. }
  953. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  954. /*-----------------------------------------------------------------------
  955. */
  956. int flash_erase(flash_info_t *info, int s_first, int s_last)
  957. {
  958. int rcode = 0;
  959. int prot;
  960. flash_sect_t sect;
  961. int st;
  962. if (info->flash_id != FLASH_MAN_CFI) {
  963. puts("Can't erase unknown flash type - aborted\n");
  964. return 1;
  965. }
  966. if (s_first < 0 || s_first > s_last) {
  967. puts("- no sectors to erase\n");
  968. return 1;
  969. }
  970. prot = 0;
  971. for (sect = s_first; sect <= s_last; ++sect)
  972. if (info->protect[sect])
  973. prot++;
  974. if (prot) {
  975. printf("- Warning: %d protected sectors will not be erased!\n",
  976. prot);
  977. } else if (flash_verbose) {
  978. putc('\n');
  979. }
  980. for (sect = s_first; sect <= s_last; sect++) {
  981. if (ctrlc()) {
  982. printf("\n");
  983. return 1;
  984. }
  985. if (info->protect[sect] == 0) { /* not protected */
  986. #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
  987. int k;
  988. int size;
  989. int erased;
  990. u32 *flash;
  991. /*
  992. * Check if whole sector is erased
  993. */
  994. size = flash_sector_size(info, sect);
  995. erased = 1;
  996. flash = (u32 *)info->start[sect];
  997. /* divide by 4 for longword access */
  998. size = size >> 2;
  999. for (k = 0; k < size; k++) {
  1000. if (flash_read32(flash++) != 0xffffffff) {
  1001. erased = 0;
  1002. break;
  1003. }
  1004. }
  1005. if (erased) {
  1006. if (flash_verbose)
  1007. putc(',');
  1008. continue;
  1009. }
  1010. #endif
  1011. switch (info->vendor) {
  1012. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1013. case CFI_CMDSET_INTEL_STANDARD:
  1014. case CFI_CMDSET_INTEL_EXTENDED:
  1015. flash_write_cmd(info, sect, 0,
  1016. FLASH_CMD_CLEAR_STATUS);
  1017. flash_write_cmd(info, sect, 0,
  1018. FLASH_CMD_BLOCK_ERASE);
  1019. flash_write_cmd(info, sect, 0,
  1020. FLASH_CMD_ERASE_CONFIRM);
  1021. break;
  1022. case CFI_CMDSET_AMD_STANDARD:
  1023. case CFI_CMDSET_AMD_EXTENDED:
  1024. flash_unlock_seq(info, sect);
  1025. flash_write_cmd(info, sect,
  1026. info->addr_unlock1,
  1027. AMD_CMD_ERASE_START);
  1028. flash_unlock_seq(info, sect);
  1029. flash_write_cmd(info, sect, 0,
  1030. info->cmd_erase_sector);
  1031. break;
  1032. #ifdef CONFIG_FLASH_CFI_LEGACY
  1033. case CFI_CMDSET_AMD_LEGACY:
  1034. flash_unlock_seq(info, 0);
  1035. flash_write_cmd(info, 0, info->addr_unlock1,
  1036. AMD_CMD_ERASE_START);
  1037. flash_unlock_seq(info, 0);
  1038. flash_write_cmd(info, sect, 0,
  1039. AMD_CMD_ERASE_SECTOR);
  1040. break;
  1041. #endif
  1042. default:
  1043. debug("Unknown flash vendor %d\n",
  1044. info->vendor);
  1045. break;
  1046. }
  1047. if (use_flash_status_poll(info)) {
  1048. cfiword_t cword;
  1049. void *dest;
  1050. cword.w64 = 0xffffffffffffffffULL;
  1051. dest = flash_map(info, sect, 0);
  1052. st = flash_status_poll(info, &cword, dest,
  1053. info->erase_blk_tout,
  1054. "erase");
  1055. flash_unmap(info, sect, 0, dest);
  1056. } else {
  1057. st = flash_full_status_check(info, sect,
  1058. info->erase_blk_tout,
  1059. "erase");
  1060. }
  1061. if (st)
  1062. rcode = 1;
  1063. else if (flash_verbose)
  1064. putc('.');
  1065. }
  1066. }
  1067. if (flash_verbose)
  1068. puts(" done\n");
  1069. return rcode;
  1070. }
  1071. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1072. static int sector_erased(flash_info_t *info, int i)
  1073. {
  1074. int k;
  1075. int size;
  1076. u32 *flash;
  1077. /*
  1078. * Check if whole sector is erased
  1079. */
  1080. size = flash_sector_size(info, i);
  1081. flash = (u32 *)info->start[i];
  1082. /* divide by 4 for longword access */
  1083. size = size >> 2;
  1084. for (k = 0; k < size; k++) {
  1085. if (flash_read32(flash++) != 0xffffffff)
  1086. return 0; /* not erased */
  1087. }
  1088. return 1; /* erased */
  1089. }
  1090. #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
  1091. void flash_print_info(flash_info_t *info)
  1092. {
  1093. int i;
  1094. if (info->flash_id != FLASH_MAN_CFI) {
  1095. puts("missing or unknown FLASH type\n");
  1096. return;
  1097. }
  1098. printf("%s flash (%d x %d)",
  1099. info->name,
  1100. (info->portwidth << 3), (info->chipwidth << 3));
  1101. if (info->size < 1024 * 1024)
  1102. printf(" Size: %ld kB in %d Sectors\n",
  1103. info->size >> 10, info->sector_count);
  1104. else
  1105. printf(" Size: %ld MB in %d Sectors\n",
  1106. info->size >> 20, info->sector_count);
  1107. printf(" ");
  1108. switch (info->vendor) {
  1109. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1110. printf("Intel Prog Regions");
  1111. break;
  1112. case CFI_CMDSET_INTEL_STANDARD:
  1113. printf("Intel Standard");
  1114. break;
  1115. case CFI_CMDSET_INTEL_EXTENDED:
  1116. printf("Intel Extended");
  1117. break;
  1118. case CFI_CMDSET_AMD_STANDARD:
  1119. printf("AMD Standard");
  1120. break;
  1121. case CFI_CMDSET_AMD_EXTENDED:
  1122. printf("AMD Extended");
  1123. break;
  1124. #ifdef CONFIG_FLASH_CFI_LEGACY
  1125. case CFI_CMDSET_AMD_LEGACY:
  1126. printf("AMD Legacy");
  1127. break;
  1128. #endif
  1129. default:
  1130. printf("Unknown (%d)", info->vendor);
  1131. break;
  1132. }
  1133. printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
  1134. info->manufacturer_id);
  1135. printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1136. info->device_id);
  1137. if ((info->device_id & 0xff) == 0x7E) {
  1138. printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
  1139. info->device_id2);
  1140. }
  1141. if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
  1142. printf("\n Advanced Sector Protection (PPB) enabled");
  1143. printf("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
  1144. info->erase_blk_tout, info->write_tout);
  1145. if (info->buffer_size > 1) {
  1146. printf(" Buffer write timeout: %ld ms, ",
  1147. info->buffer_write_tout);
  1148. printf("buffer size: %d bytes\n", info->buffer_size);
  1149. }
  1150. puts("\n Sector Start Addresses:");
  1151. for (i = 0; i < info->sector_count; ++i) {
  1152. if (ctrlc())
  1153. break;
  1154. if ((i % 5) == 0)
  1155. putc('\n');
  1156. #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
  1157. /* print empty and read-only info */
  1158. printf(" %08lX %c %s ",
  1159. info->start[i],
  1160. sector_erased(info, i) ? 'E' : ' ',
  1161. info->protect[i] ? "RO" : " ");
  1162. #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
  1163. printf(" %08lX %s ",
  1164. info->start[i],
  1165. info->protect[i] ? "RO" : " ");
  1166. #endif
  1167. }
  1168. putc('\n');
  1169. }
  1170. /*-----------------------------------------------------------------------
  1171. * This is used in a few places in write_buf() to show programming
  1172. * progress. Making it a function is nasty because it needs to do side
  1173. * effect updates to digit and dots. Repeated code is nasty too, so
  1174. * we define it once here.
  1175. */
  1176. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1177. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
  1178. if (flash_verbose) { \
  1179. dots -= dots_sub; \
  1180. if (scale > 0 && dots <= 0) { \
  1181. if ((digit % 5) == 0) \
  1182. printf("%d", digit / 5); \
  1183. else \
  1184. putc('.'); \
  1185. digit--; \
  1186. dots += scale; \
  1187. } \
  1188. }
  1189. #else
  1190. #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
  1191. #endif
  1192. /*-----------------------------------------------------------------------
  1193. * Copy memory to flash, returns:
  1194. * 0 - OK
  1195. * 1 - write timeout
  1196. * 2 - Flash not erased
  1197. */
  1198. int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  1199. {
  1200. ulong wp;
  1201. uchar *p;
  1202. int aln;
  1203. cfiword_t cword;
  1204. int i, rc;
  1205. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1206. int buffered_size;
  1207. #endif
  1208. #ifdef CONFIG_FLASH_SHOW_PROGRESS
  1209. int digit = CONFIG_FLASH_SHOW_PROGRESS;
  1210. int scale = 0;
  1211. int dots = 0;
  1212. /*
  1213. * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
  1214. */
  1215. if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
  1216. scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
  1217. CONFIG_FLASH_SHOW_PROGRESS);
  1218. }
  1219. #endif
  1220. /* get lower aligned address */
  1221. wp = (addr & ~(info->portwidth - 1));
  1222. /* handle unaligned start */
  1223. aln = addr - wp;
  1224. if (aln != 0) {
  1225. cword.w32 = 0;
  1226. p = (uchar *)wp;
  1227. for (i = 0; i < aln; ++i)
  1228. flash_add_byte(info, &cword, flash_read8(p + i));
  1229. for (; (i < info->portwidth) && (cnt > 0); i++) {
  1230. flash_add_byte(info, &cword, *src++);
  1231. cnt--;
  1232. }
  1233. for (; (cnt == 0) && (i < info->portwidth); ++i)
  1234. flash_add_byte(info, &cword, flash_read8(p + i));
  1235. rc = flash_write_cfiword(info, wp, cword);
  1236. if (rc != 0)
  1237. return rc;
  1238. wp += i;
  1239. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1240. }
  1241. /* handle the aligned part */
  1242. #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
  1243. buffered_size = (info->portwidth / info->chipwidth);
  1244. buffered_size *= info->buffer_size;
  1245. while (cnt >= info->portwidth) {
  1246. /* prohibit buffer write when buffer_size is 1 */
  1247. if (info->buffer_size == 1) {
  1248. cword.w32 = 0;
  1249. for (i = 0; i < info->portwidth; i++)
  1250. flash_add_byte(info, &cword, *src++);
  1251. rc = flash_write_cfiword(info, wp, cword);
  1252. if (rc != 0)
  1253. return rc;
  1254. wp += info->portwidth;
  1255. cnt -= info->portwidth;
  1256. continue;
  1257. }
  1258. /* write buffer until next buffered_size aligned boundary */
  1259. i = buffered_size - (wp % buffered_size);
  1260. if (i > cnt)
  1261. i = cnt;
  1262. rc = flash_write_cfibuffer(info, wp, src, i);
  1263. if (rc != ERR_OK)
  1264. return rc;
  1265. i -= i & (info->portwidth - 1);
  1266. wp += i;
  1267. src += i;
  1268. cnt -= i;
  1269. FLASH_SHOW_PROGRESS(scale, dots, digit, i);
  1270. /* Only check every once in a while */
  1271. if ((cnt & 0xFFFF) < buffered_size && ctrlc())
  1272. return ERR_ABORTED;
  1273. }
  1274. #else
  1275. while (cnt >= info->portwidth) {
  1276. cword.w32 = 0;
  1277. for (i = 0; i < info->portwidth; i++)
  1278. flash_add_byte(info, &cword, *src++);
  1279. rc = flash_write_cfiword(info, wp, cword);
  1280. if (rc != 0)
  1281. return rc;
  1282. wp += info->portwidth;
  1283. cnt -= info->portwidth;
  1284. FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
  1285. /* Only check every once in a while */
  1286. if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
  1287. return ERR_ABORTED;
  1288. }
  1289. #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
  1290. if (cnt == 0)
  1291. return (0);
  1292. /*
  1293. * handle unaligned tail bytes
  1294. */
  1295. cword.w32 = 0;
  1296. p = (uchar *)wp;
  1297. for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
  1298. flash_add_byte(info, &cword, *src++);
  1299. --cnt;
  1300. }
  1301. for (; i < info->portwidth; ++i)
  1302. flash_add_byte(info, &cword, flash_read8(p + i));
  1303. return flash_write_cfiword(info, wp, cword);
  1304. }
  1305. static inline int manufact_match(flash_info_t *info, u32 manu)
  1306. {
  1307. return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
  1308. }
  1309. /*-----------------------------------------------------------------------
  1310. */
  1311. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1312. static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
  1313. {
  1314. if (manufact_match(info, INTEL_MANUFACT) &&
  1315. info->device_id == NUMONYX_256MBIT) {
  1316. /*
  1317. * see errata called
  1318. * "Numonyx Axcell P33/P30 Specification Update" :)
  1319. */
  1320. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
  1321. if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
  1322. prot)) {
  1323. /*
  1324. * cmd must come before FLASH_CMD_PROTECT + 20us
  1325. * Disable interrupts which might cause a timeout here.
  1326. */
  1327. int flag = disable_interrupts();
  1328. unsigned short cmd;
  1329. if (prot)
  1330. cmd = FLASH_CMD_PROTECT_SET;
  1331. else
  1332. cmd = FLASH_CMD_PROTECT_CLEAR;
  1333. flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
  1334. flash_write_cmd(info, sector, 0, cmd);
  1335. /* re-enable interrupts if necessary */
  1336. if (flag)
  1337. enable_interrupts();
  1338. }
  1339. return 1;
  1340. }
  1341. return 0;
  1342. }
  1343. int flash_real_protect(flash_info_t *info, long sector, int prot)
  1344. {
  1345. int retcode = 0;
  1346. switch (info->vendor) {
  1347. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1348. case CFI_CMDSET_INTEL_STANDARD:
  1349. case CFI_CMDSET_INTEL_EXTENDED:
  1350. if (!cfi_protect_bugfix(info, sector, prot)) {
  1351. flash_write_cmd(info, sector, 0,
  1352. FLASH_CMD_CLEAR_STATUS);
  1353. flash_write_cmd(info, sector, 0,
  1354. FLASH_CMD_PROTECT);
  1355. if (prot)
  1356. flash_write_cmd(info, sector, 0,
  1357. FLASH_CMD_PROTECT_SET);
  1358. else
  1359. flash_write_cmd(info, sector, 0,
  1360. FLASH_CMD_PROTECT_CLEAR);
  1361. }
  1362. break;
  1363. case CFI_CMDSET_AMD_EXTENDED:
  1364. case CFI_CMDSET_AMD_STANDARD:
  1365. /* U-Boot only checks the first byte */
  1366. if (manufact_match(info, ATM_MANUFACT)) {
  1367. if (prot) {
  1368. flash_unlock_seq(info, 0);
  1369. flash_write_cmd(info, 0,
  1370. info->addr_unlock1,
  1371. ATM_CMD_SOFTLOCK_START);
  1372. flash_unlock_seq(info, 0);
  1373. flash_write_cmd(info, sector, 0,
  1374. ATM_CMD_LOCK_SECT);
  1375. } else {
  1376. flash_write_cmd(info, 0,
  1377. info->addr_unlock1,
  1378. AMD_CMD_UNLOCK_START);
  1379. if (info->device_id == ATM_ID_BV6416)
  1380. flash_write_cmd(info, sector,
  1381. 0, ATM_CMD_UNLOCK_SECT);
  1382. }
  1383. }
  1384. if (info->legacy_unlock) {
  1385. int flag = disable_interrupts();
  1386. int lock_flag;
  1387. flash_unlock_seq(info, 0);
  1388. flash_write_cmd(info, 0, info->addr_unlock1,
  1389. AMD_CMD_SET_PPB_ENTRY);
  1390. lock_flag = flash_isset(info, sector, 0, 0x01);
  1391. if (prot) {
  1392. if (lock_flag) {
  1393. flash_write_cmd(info, sector, 0,
  1394. AMD_CMD_PPB_LOCK_BC1);
  1395. flash_write_cmd(info, sector, 0,
  1396. AMD_CMD_PPB_LOCK_BC2);
  1397. }
  1398. debug("sector %ld %slocked\n", sector,
  1399. lock_flag ? "" : "already ");
  1400. } else {
  1401. if (!lock_flag) {
  1402. debug("unlock %ld\n", sector);
  1403. flash_write_cmd(info, 0, 0,
  1404. AMD_CMD_PPB_UNLOCK_BC1);
  1405. flash_write_cmd(info, 0, 0,
  1406. AMD_CMD_PPB_UNLOCK_BC2);
  1407. }
  1408. debug("sector %ld %sunlocked\n", sector,
  1409. !lock_flag ? "" : "already ");
  1410. }
  1411. if (flag)
  1412. enable_interrupts();
  1413. if (flash_status_check(info, sector,
  1414. info->erase_blk_tout,
  1415. prot ? "protect" : "unprotect"))
  1416. printf("status check error\n");
  1417. flash_write_cmd(info, 0, 0,
  1418. AMD_CMD_SET_PPB_EXIT_BC1);
  1419. flash_write_cmd(info, 0, 0,
  1420. AMD_CMD_SET_PPB_EXIT_BC2);
  1421. }
  1422. break;
  1423. #ifdef CONFIG_FLASH_CFI_LEGACY
  1424. case CFI_CMDSET_AMD_LEGACY:
  1425. flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
  1426. flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
  1427. if (prot)
  1428. flash_write_cmd(info, sector, 0,
  1429. FLASH_CMD_PROTECT_SET);
  1430. else
  1431. flash_write_cmd(info, sector, 0,
  1432. FLASH_CMD_PROTECT_CLEAR);
  1433. #endif
  1434. };
  1435. /*
  1436. * Flash needs to be in status register read mode for
  1437. * flash_full_status_check() to work correctly
  1438. */
  1439. flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
  1440. retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
  1441. prot ? "protect" : "unprotect");
  1442. if (retcode == 0) {
  1443. info->protect[sector] = prot;
  1444. /*
  1445. * On some of Intel's flash chips (marked via legacy_unlock)
  1446. * unprotect unprotects all locking.
  1447. */
  1448. if (prot == 0 && info->legacy_unlock) {
  1449. flash_sect_t i;
  1450. for (i = 0; i < info->sector_count; i++) {
  1451. if (info->protect[i])
  1452. flash_real_protect(info, i, 1);
  1453. }
  1454. }
  1455. }
  1456. return retcode;
  1457. }
  1458. /*-----------------------------------------------------------------------
  1459. * flash_read_user_serial - read the OneTimeProgramming cells
  1460. */
  1461. void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
  1462. int len)
  1463. {
  1464. uchar *src;
  1465. uchar *dst;
  1466. dst = buffer;
  1467. src = flash_map(info, 0, FLASH_OFFSET_USER_PROTECTION);
  1468. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1469. memcpy(dst, src + offset, len);
  1470. flash_write_cmd(info, 0, 0, info->cmd_reset);
  1471. udelay(1);
  1472. flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
  1473. }
  1474. /*
  1475. * flash_read_factory_serial - read the device Id from the protection area
  1476. */
  1477. void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
  1478. int len)
  1479. {
  1480. uchar *src;
  1481. src = flash_map(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
  1482. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1483. memcpy(buffer, src + offset, len);
  1484. flash_write_cmd(info, 0, 0, info->cmd_reset);
  1485. udelay(1);
  1486. flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
  1487. }
  1488. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  1489. /*-----------------------------------------------------------------------
  1490. * Reverse the order of the erase regions in the CFI QRY structure.
  1491. * This is needed for chips that are either a) correctly detected as
  1492. * top-boot, or b) buggy.
  1493. */
  1494. static void cfi_reverse_geometry(struct cfi_qry *qry)
  1495. {
  1496. unsigned int i, j;
  1497. u32 tmp;
  1498. for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
  1499. tmp = get_unaligned(&qry->erase_region_info[i]);
  1500. put_unaligned(get_unaligned(&qry->erase_region_info[j]),
  1501. &qry->erase_region_info[i]);
  1502. put_unaligned(tmp, &qry->erase_region_info[j]);
  1503. }
  1504. }
  1505. /*-----------------------------------------------------------------------
  1506. * read jedec ids from device and set corresponding fields in info struct
  1507. *
  1508. * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
  1509. *
  1510. */
  1511. static void cmdset_intel_read_jedec_ids(flash_info_t *info)
  1512. {
  1513. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1514. udelay(1);
  1515. flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
  1516. udelay(1000); /* some flash are slow to respond */
  1517. info->manufacturer_id = flash_read_uchar(info,
  1518. FLASH_OFFSET_MANUFACTURER_ID);
  1519. info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
  1520. flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
  1521. flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
  1522. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1523. }
  1524. static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
  1525. {
  1526. info->cmd_reset = FLASH_CMD_RESET;
  1527. cmdset_intel_read_jedec_ids(info);
  1528. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1529. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1530. /* read legacy lock/unlock bit from intel flash */
  1531. if (info->ext_addr) {
  1532. info->legacy_unlock =
  1533. flash_read_uchar(info, info->ext_addr + 5) & 0x08;
  1534. }
  1535. #endif
  1536. return 0;
  1537. }
  1538. static void cmdset_amd_read_jedec_ids(flash_info_t *info)
  1539. {
  1540. ushort bank_id = 0;
  1541. uchar manu_id;
  1542. uchar feature;
  1543. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1544. flash_unlock_seq(info, 0);
  1545. flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
  1546. udelay(1000); /* some flash are slow to respond */
  1547. manu_id = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
  1548. /* JEDEC JEP106Z specifies ID codes up to bank 7 */
  1549. while (manu_id == FLASH_CONTINUATION_CODE && bank_id < 0x800) {
  1550. bank_id += 0x100;
  1551. manu_id = flash_read_uchar(info,
  1552. bank_id | FLASH_OFFSET_MANUFACTURER_ID);
  1553. }
  1554. info->manufacturer_id = manu_id;
  1555. debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
  1556. info->ext_addr, info->cfi_version);
  1557. if (info->ext_addr && info->cfi_version >= 0x3134) {
  1558. /* read software feature (at 0x53) */
  1559. feature = flash_read_uchar(info, info->ext_addr + 0x13);
  1560. debug("feature = 0x%x\n", feature);
  1561. info->sr_supported = feature & 0x1;
  1562. }
  1563. switch (info->chipwidth) {
  1564. case FLASH_CFI_8BIT:
  1565. info->device_id = flash_read_uchar(info,
  1566. FLASH_OFFSET_DEVICE_ID);
  1567. if (info->device_id == 0x7E) {
  1568. /* AMD 3-byte (expanded) device ids */
  1569. info->device_id2 = flash_read_uchar(info,
  1570. FLASH_OFFSET_DEVICE_ID2);
  1571. info->device_id2 <<= 8;
  1572. info->device_id2 |= flash_read_uchar(info,
  1573. FLASH_OFFSET_DEVICE_ID3);
  1574. }
  1575. break;
  1576. case FLASH_CFI_16BIT:
  1577. info->device_id = flash_read_word(info,
  1578. FLASH_OFFSET_DEVICE_ID);
  1579. if ((info->device_id & 0xff) == 0x7E) {
  1580. /* AMD 3-byte (expanded) device ids */
  1581. info->device_id2 = flash_read_uchar(info,
  1582. FLASH_OFFSET_DEVICE_ID2);
  1583. info->device_id2 <<= 8;
  1584. info->device_id2 |= flash_read_uchar(info,
  1585. FLASH_OFFSET_DEVICE_ID3);
  1586. }
  1587. break;
  1588. default:
  1589. break;
  1590. }
  1591. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1592. udelay(1);
  1593. }
  1594. static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
  1595. {
  1596. info->cmd_reset = AMD_CMD_RESET;
  1597. info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
  1598. cmdset_amd_read_jedec_ids(info);
  1599. flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
  1600. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1601. if (info->ext_addr) {
  1602. /* read sector protect/unprotect scheme (at 0x49) */
  1603. if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
  1604. info->legacy_unlock = 1;
  1605. }
  1606. #endif
  1607. return 0;
  1608. }
  1609. #ifdef CONFIG_FLASH_CFI_LEGACY
  1610. static void flash_read_jedec_ids(flash_info_t *info)
  1611. {
  1612. info->manufacturer_id = 0;
  1613. info->device_id = 0;
  1614. info->device_id2 = 0;
  1615. switch (info->vendor) {
  1616. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1617. case CFI_CMDSET_INTEL_STANDARD:
  1618. case CFI_CMDSET_INTEL_EXTENDED:
  1619. cmdset_intel_read_jedec_ids(info);
  1620. break;
  1621. case CFI_CMDSET_AMD_STANDARD:
  1622. case CFI_CMDSET_AMD_EXTENDED:
  1623. cmdset_amd_read_jedec_ids(info);
  1624. break;
  1625. default:
  1626. break;
  1627. }
  1628. }
  1629. /*-----------------------------------------------------------------------
  1630. * Call board code to request info about non-CFI flash.
  1631. * board_flash_get_legacy needs to fill in at least:
  1632. * info->portwidth, info->chipwidth and info->interface for Jedec probing.
  1633. */
  1634. static int flash_detect_legacy(phys_addr_t base, int banknum)
  1635. {
  1636. flash_info_t *info = &flash_info[banknum];
  1637. if (board_flash_get_legacy(base, banknum, info)) {
  1638. /* board code may have filled info completely. If not, we
  1639. * use JEDEC ID probing.
  1640. */
  1641. if (!info->vendor) {
  1642. int modes[] = {
  1643. CFI_CMDSET_AMD_STANDARD,
  1644. CFI_CMDSET_INTEL_STANDARD
  1645. };
  1646. int i;
  1647. for (i = 0; i < ARRAY_SIZE(modes); i++) {
  1648. info->vendor = modes[i];
  1649. info->start[0] =
  1650. (ulong)map_physmem(base,
  1651. info->portwidth,
  1652. MAP_NOCACHE);
  1653. if (info->portwidth == FLASH_CFI_8BIT &&
  1654. info->interface == FLASH_CFI_X8X16) {
  1655. info->addr_unlock1 = 0x2AAA;
  1656. info->addr_unlock2 = 0x5555;
  1657. } else {
  1658. info->addr_unlock1 = 0x5555;
  1659. info->addr_unlock2 = 0x2AAA;
  1660. }
  1661. flash_read_jedec_ids(info);
  1662. debug("JEDEC PROBE: ID %x %x %x\n",
  1663. info->manufacturer_id,
  1664. info->device_id,
  1665. info->device_id2);
  1666. if (jedec_flash_match(info, info->start[0]))
  1667. break;
  1668. unmap_physmem((void *)info->start[0],
  1669. info->portwidth);
  1670. }
  1671. }
  1672. switch (info->vendor) {
  1673. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1674. case CFI_CMDSET_INTEL_STANDARD:
  1675. case CFI_CMDSET_INTEL_EXTENDED:
  1676. info->cmd_reset = FLASH_CMD_RESET;
  1677. break;
  1678. case CFI_CMDSET_AMD_STANDARD:
  1679. case CFI_CMDSET_AMD_EXTENDED:
  1680. case CFI_CMDSET_AMD_LEGACY:
  1681. info->cmd_reset = AMD_CMD_RESET;
  1682. break;
  1683. }
  1684. info->flash_id = FLASH_MAN_CFI;
  1685. return 1;
  1686. }
  1687. return 0; /* use CFI */
  1688. }
  1689. #else
  1690. static inline int flash_detect_legacy(phys_addr_t base, int banknum)
  1691. {
  1692. return 0; /* use CFI */
  1693. }
  1694. #endif
  1695. /*-----------------------------------------------------------------------
  1696. * detect if flash is compatible with the Common Flash Interface (CFI)
  1697. * http://www.jedec.org/download/search/jesd68.pdf
  1698. */
  1699. static void flash_read_cfi(flash_info_t *info, void *buf, unsigned int start,
  1700. size_t len)
  1701. {
  1702. u8 *p = buf;
  1703. unsigned int i;
  1704. for (i = 0; i < len; i++)
  1705. p[i] = flash_read_uchar(info, start + i);
  1706. }
  1707. static void __flash_cmd_reset(flash_info_t *info)
  1708. {
  1709. /*
  1710. * We do not yet know what kind of commandset to use, so we issue
  1711. * the reset command in both Intel and AMD variants, in the hope
  1712. * that AMD flash roms ignore the Intel command.
  1713. */
  1714. flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
  1715. udelay(1);
  1716. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1717. }
  1718. void flash_cmd_reset(flash_info_t *info)
  1719. __attribute__((weak, alias("__flash_cmd_reset")));
  1720. static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
  1721. {
  1722. int cfi_offset;
  1723. /* Issue FLASH reset command */
  1724. flash_cmd_reset(info);
  1725. for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
  1726. cfi_offset++) {
  1727. flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
  1728. FLASH_CMD_CFI);
  1729. if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
  1730. flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
  1731. flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
  1732. flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
  1733. sizeof(struct cfi_qry));
  1734. info->interface = le16_to_cpu(qry->interface_desc);
  1735. info->cfi_offset = flash_offset_cfi[cfi_offset];
  1736. debug("device interface is %d\n",
  1737. info->interface);
  1738. debug("found port %d chip %d ",
  1739. info->portwidth, info->chipwidth);
  1740. debug("port %d bits chip %d bits\n",
  1741. info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1742. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1743. /* calculate command offsets as in the Linux driver */
  1744. info->addr_unlock1 = 0x555;
  1745. info->addr_unlock2 = 0x2aa;
  1746. /*
  1747. * modify the unlock address if we are
  1748. * in compatibility mode
  1749. */
  1750. if (/* x8/x16 in x8 mode */
  1751. (info->chipwidth == FLASH_CFI_BY8 &&
  1752. info->interface == FLASH_CFI_X8X16) ||
  1753. /* x16/x32 in x16 mode */
  1754. (info->chipwidth == FLASH_CFI_BY16 &&
  1755. info->interface == FLASH_CFI_X16X32)) {
  1756. info->addr_unlock1 = 0xaaa;
  1757. info->addr_unlock2 = 0x555;
  1758. }
  1759. info->name = "CFI conformant";
  1760. return 1;
  1761. }
  1762. }
  1763. return 0;
  1764. }
  1765. static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
  1766. {
  1767. debug("flash detect cfi\n");
  1768. for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
  1769. info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
  1770. for (info->chipwidth = FLASH_CFI_BY8;
  1771. info->chipwidth <= info->portwidth;
  1772. info->chipwidth <<= 1)
  1773. if (__flash_detect_cfi(info, qry))
  1774. return 1;
  1775. }
  1776. debug("not found\n");
  1777. return 0;
  1778. }
  1779. /*
  1780. * Manufacturer-specific quirks. Add workarounds for geometry
  1781. * reversal, etc. here.
  1782. */
  1783. static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
  1784. {
  1785. /* check if flash geometry needs reversal */
  1786. if (qry->num_erase_regions > 1) {
  1787. /* reverse geometry if top boot part */
  1788. if (info->cfi_version < 0x3131) {
  1789. /* CFI < 1.1, try to guess from device id */
  1790. if ((info->device_id & 0x80) != 0)
  1791. cfi_reverse_geometry(qry);
  1792. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1793. /* CFI >= 1.1, deduct from top/bottom flag */
  1794. /* note: ext_addr is valid since cfi_version > 0 */
  1795. cfi_reverse_geometry(qry);
  1796. }
  1797. }
  1798. }
  1799. static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
  1800. {
  1801. int reverse_geometry = 0;
  1802. /* Check the "top boot" bit in the PRI */
  1803. if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
  1804. reverse_geometry = 1;
  1805. /* AT49BV6416(T) list the erase regions in the wrong order.
  1806. * However, the device ID is identical with the non-broken
  1807. * AT49BV642D they differ in the high byte.
  1808. */
  1809. if (info->device_id == 0xd6 || info->device_id == 0xd2)
  1810. reverse_geometry = !reverse_geometry;
  1811. if (reverse_geometry)
  1812. cfi_reverse_geometry(qry);
  1813. }
  1814. static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
  1815. {
  1816. /* check if flash geometry needs reversal */
  1817. if (qry->num_erase_regions > 1) {
  1818. /* reverse geometry if top boot part */
  1819. if (info->cfi_version < 0x3131) {
  1820. /* CFI < 1.1, guess by device id */
  1821. if (info->device_id == 0x22CA || /* M29W320DT */
  1822. info->device_id == 0x2256 || /* M29W320ET */
  1823. info->device_id == 0x22D7) { /* M29W800DT */
  1824. cfi_reverse_geometry(qry);
  1825. }
  1826. } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
  1827. /* CFI >= 1.1, deduct from top/bottom flag */
  1828. /* note: ext_addr is valid since cfi_version > 0 */
  1829. cfi_reverse_geometry(qry);
  1830. }
  1831. }
  1832. }
  1833. static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
  1834. {
  1835. /*
  1836. * SST, for many recent nor parallel flashes, says they are
  1837. * CFI-conformant. This is not true, since qry struct.
  1838. * reports a std. AMD command set (0x0002), while SST allows to
  1839. * erase two different sector sizes for the same memory.
  1840. * 64KB sector (SST call it block) needs 0x30 to be erased.
  1841. * 4KB sector (SST call it sector) needs 0x50 to be erased.
  1842. * Since CFI query detect the 4KB number of sectors, users expects
  1843. * a sector granularity of 4KB, and it is here set.
  1844. */
  1845. if (info->device_id == 0x5D23 || /* SST39VF3201B */
  1846. info->device_id == 0x5C23) { /* SST39VF3202B */
  1847. /* set sector granularity to 4KB */
  1848. info->cmd_erase_sector = 0x50;
  1849. }
  1850. }
  1851. static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
  1852. {
  1853. /*
  1854. * The M29EW devices seem to report the CFI information wrong
  1855. * when it's in 8 bit mode.
  1856. * There's an app note from Numonyx on this issue.
  1857. * So adjust the buffer size for M29EW while operating in 8-bit mode
  1858. */
  1859. if (qry->max_buf_write_size > 0x8 &&
  1860. info->device_id == 0x7E &&
  1861. (info->device_id2 == 0x2201 ||
  1862. info->device_id2 == 0x2301 ||
  1863. info->device_id2 == 0x2801 ||
  1864. info->device_id2 == 0x4801)) {
  1865. debug("Adjusted buffer size on Numonyx flash");
  1866. debug(" M29EW family in 8 bit mode\n");
  1867. qry->max_buf_write_size = 0x8;
  1868. }
  1869. }
  1870. /*
  1871. * The following code cannot be run from FLASH!
  1872. *
  1873. */
  1874. ulong flash_get_size(phys_addr_t base, int banknum)
  1875. {
  1876. flash_info_t *info = &flash_info[banknum];
  1877. int i, j;
  1878. flash_sect_t sect_cnt;
  1879. phys_addr_t sector;
  1880. unsigned long tmp;
  1881. int size_ratio;
  1882. uchar num_erase_regions;
  1883. int erase_region_size;
  1884. int erase_region_count;
  1885. struct cfi_qry qry;
  1886. unsigned long max_size;
  1887. memset(&qry, 0, sizeof(qry));
  1888. info->ext_addr = 0;
  1889. info->cfi_version = 0;
  1890. #ifdef CONFIG_SYS_FLASH_PROTECTION
  1891. info->legacy_unlock = 0;
  1892. #endif
  1893. info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
  1894. if (flash_detect_cfi(info, &qry)) {
  1895. info->vendor = le16_to_cpu(get_unaligned(&qry.p_id));
  1896. info->ext_addr = le16_to_cpu(get_unaligned(&qry.p_adr));
  1897. num_erase_regions = qry.num_erase_regions;
  1898. if (info->ext_addr) {
  1899. info->cfi_version = (ushort)flash_read_uchar(info,
  1900. info->ext_addr + 3) << 8;
  1901. info->cfi_version |= (ushort)flash_read_uchar(info,
  1902. info->ext_addr + 4);
  1903. }
  1904. #ifdef DEBUG
  1905. flash_printqry(&qry);
  1906. #endif
  1907. switch (info->vendor) {
  1908. case CFI_CMDSET_INTEL_PROG_REGIONS:
  1909. case CFI_CMDSET_INTEL_STANDARD:
  1910. case CFI_CMDSET_INTEL_EXTENDED:
  1911. cmdset_intel_init(info, &qry);
  1912. break;
  1913. case CFI_CMDSET_AMD_STANDARD:
  1914. case CFI_CMDSET_AMD_EXTENDED:
  1915. cmdset_amd_init(info, &qry);
  1916. break;
  1917. default:
  1918. printf("CFI: Unknown command set 0x%x\n",
  1919. info->vendor);
  1920. /*
  1921. * Unfortunately, this means we don't know how
  1922. * to get the chip back to Read mode. Might
  1923. * as well try an Intel-style reset...
  1924. */
  1925. flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
  1926. return 0;
  1927. }
  1928. /* Do manufacturer-specific fixups */
  1929. switch (info->manufacturer_id) {
  1930. case 0x0001: /* AMD */
  1931. case 0x0037: /* AMIC */
  1932. flash_fixup_amd(info, &qry);
  1933. break;
  1934. case 0x001f:
  1935. flash_fixup_atmel(info, &qry);
  1936. break;
  1937. case 0x0020:
  1938. flash_fixup_stm(info, &qry);
  1939. break;
  1940. case 0x00bf: /* SST */
  1941. flash_fixup_sst(info, &qry);
  1942. break;
  1943. case 0x0089: /* Numonyx */
  1944. flash_fixup_num(info, &qry);
  1945. break;
  1946. }
  1947. debug("manufacturer is %d\n", info->vendor);
  1948. debug("manufacturer id is 0x%x\n", info->manufacturer_id);
  1949. debug("device id is 0x%x\n", info->device_id);
  1950. debug("device id2 is 0x%x\n", info->device_id2);
  1951. debug("cfi version is 0x%04x\n", info->cfi_version);
  1952. size_ratio = info->portwidth / info->chipwidth;
  1953. /* if the chip is x8/x16 reduce the ratio by half */
  1954. if (info->interface == FLASH_CFI_X8X16 &&
  1955. info->chipwidth == FLASH_CFI_BY8) {
  1956. size_ratio >>= 1;
  1957. }
  1958. debug("size_ratio %d port %d bits chip %d bits\n",
  1959. size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
  1960. info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
  1961. info->size = 1 << qry.dev_size;
  1962. /* multiply the size by the number of chips */
  1963. info->size *= size_ratio;
  1964. max_size = cfi_flash_bank_size(banknum);
  1965. if (max_size && info->size > max_size) {
  1966. debug("[truncated from %ldMiB]", info->size >> 20);
  1967. info->size = max_size;
  1968. }
  1969. debug("found %d erase regions\n", num_erase_regions);
  1970. sect_cnt = 0;
  1971. sector = base;
  1972. for (i = 0; i < num_erase_regions; i++) {
  1973. if (i > NUM_ERASE_REGIONS) {
  1974. printf("%d erase regions found, only %d used\n",
  1975. num_erase_regions, NUM_ERASE_REGIONS);
  1976. break;
  1977. }
  1978. tmp = le32_to_cpu(get_unaligned(
  1979. &qry.erase_region_info[i]));
  1980. debug("erase region %u: 0x%08lx\n", i, tmp);
  1981. erase_region_count = (tmp & 0xffff) + 1;
  1982. tmp >>= 16;
  1983. erase_region_size =
  1984. (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
  1985. debug("erase_region_count = %d ", erase_region_count);
  1986. debug("erase_region_size = %d\n", erase_region_size);
  1987. for (j = 0; j < erase_region_count; j++) {
  1988. if (sector - base >= info->size)
  1989. break;
  1990. if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
  1991. printf("ERROR: too many flash sectors\n");
  1992. break;
  1993. }
  1994. info->start[sect_cnt] =
  1995. (ulong)map_physmem(sector,
  1996. info->portwidth,
  1997. MAP_NOCACHE);
  1998. sector += (erase_region_size * size_ratio);
  1999. /*
  2000. * Only read protection status from
  2001. * supported devices (intel...)
  2002. */
  2003. switch (info->vendor) {
  2004. case CFI_CMDSET_INTEL_PROG_REGIONS:
  2005. case CFI_CMDSET_INTEL_EXTENDED:
  2006. case CFI_CMDSET_INTEL_STANDARD:
  2007. /*
  2008. * Set flash to read-id mode. Otherwise
  2009. * reading protected status is not
  2010. * guaranteed.
  2011. */
  2012. flash_write_cmd(info, sect_cnt, 0,
  2013. FLASH_CMD_READ_ID);
  2014. info->protect[sect_cnt] =
  2015. flash_isset(info, sect_cnt,
  2016. FLASH_OFFSET_PROTECT,
  2017. FLASH_STATUS_PROTECT);
  2018. flash_write_cmd(info, sect_cnt, 0,
  2019. FLASH_CMD_RESET);
  2020. break;
  2021. case CFI_CMDSET_AMD_EXTENDED:
  2022. case CFI_CMDSET_AMD_STANDARD:
  2023. if (!info->legacy_unlock) {
  2024. /* default: not protected */
  2025. info->protect[sect_cnt] = 0;
  2026. break;
  2027. }
  2028. /* Read protection (PPB) from sector */
  2029. flash_write_cmd(info, 0, 0,
  2030. info->cmd_reset);
  2031. flash_unlock_seq(info, 0);
  2032. flash_write_cmd(info, 0,
  2033. info->addr_unlock1,
  2034. FLASH_CMD_READ_ID);
  2035. info->protect[sect_cnt] =
  2036. flash_isset(
  2037. info, sect_cnt,
  2038. FLASH_OFFSET_PROTECT,
  2039. FLASH_STATUS_PROTECT);
  2040. break;
  2041. default:
  2042. /* default: not protected */
  2043. info->protect[sect_cnt] = 0;
  2044. }
  2045. sect_cnt++;
  2046. }
  2047. }
  2048. info->sector_count = sect_cnt;
  2049. info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
  2050. tmp = 1 << qry.block_erase_timeout_typ;
  2051. info->erase_blk_tout = tmp *
  2052. (1 << qry.block_erase_timeout_max);
  2053. tmp = (1 << qry.buf_write_timeout_typ) *
  2054. (1 << qry.buf_write_timeout_max);
  2055. /* round up when converting to ms */
  2056. info->buffer_write_tout = (tmp + 999) / 1000;
  2057. tmp = (1 << qry.word_write_timeout_typ) *
  2058. (1 << qry.word_write_timeout_max);
  2059. /* round up when converting to ms */
  2060. info->write_tout = (tmp + 999) / 1000;
  2061. info->flash_id = FLASH_MAN_CFI;
  2062. if (info->interface == FLASH_CFI_X8X16 &&
  2063. info->chipwidth == FLASH_CFI_BY8) {
  2064. /* XXX - Need to test on x8/x16 in parallel. */
  2065. info->portwidth >>= 1;
  2066. }
  2067. flash_write_cmd(info, 0, 0, info->cmd_reset);
  2068. }
  2069. return (info->size);
  2070. }
  2071. #ifdef CONFIG_FLASH_CFI_MTD
  2072. void flash_set_verbose(uint v)
  2073. {
  2074. flash_verbose = v;
  2075. }
  2076. #endif
  2077. static void cfi_flash_set_config_reg(u32 base, u16 val)
  2078. {
  2079. #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  2080. /*
  2081. * Only set this config register if really defined
  2082. * to a valid value (0xffff is invalid)
  2083. */
  2084. if (val == 0xffff)
  2085. return;
  2086. /*
  2087. * Set configuration register. Data is "encrypted" in the 16 lower
  2088. * address bits.
  2089. */
  2090. flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
  2091. flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
  2092. /*
  2093. * Finally issue reset-command to bring device back to
  2094. * read-array mode
  2095. */
  2096. flash_write16(FLASH_CMD_RESET, (void *)base);
  2097. #endif
  2098. }
  2099. /*-----------------------------------------------------------------------
  2100. */
  2101. static void flash_protect_default(void)
  2102. {
  2103. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  2104. int i;
  2105. struct apl_s {
  2106. ulong start;
  2107. ulong size;
  2108. } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
  2109. #endif
  2110. /* Monitor protection ON by default */
  2111. #if defined(CONFIG_SYS_MONITOR_BASE) && \
  2112. (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
  2113. (!defined(CONFIG_MONITOR_IS_IN_RAM))
  2114. flash_protect(FLAG_PROTECT_SET,
  2115. CONFIG_SYS_MONITOR_BASE,
  2116. CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
  2117. flash_get_info(CONFIG_SYS_MONITOR_BASE));
  2118. #endif
  2119. /* Environment protection ON by default */
  2120. #ifdef CONFIG_ENV_IS_IN_FLASH
  2121. flash_protect(FLAG_PROTECT_SET,
  2122. CONFIG_ENV_ADDR,
  2123. CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
  2124. flash_get_info(CONFIG_ENV_ADDR));
  2125. #endif
  2126. /* Redundant environment protection ON by default */
  2127. #ifdef CONFIG_ENV_ADDR_REDUND
  2128. flash_protect(FLAG_PROTECT_SET,
  2129. CONFIG_ENV_ADDR_REDUND,
  2130. CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
  2131. flash_get_info(CONFIG_ENV_ADDR_REDUND));
  2132. #endif
  2133. #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
  2134. for (i = 0; i < ARRAY_SIZE(apl); i++) {
  2135. debug("autoprotecting from %08lx to %08lx\n",
  2136. apl[i].start, apl[i].start + apl[i].size - 1);
  2137. flash_protect(FLAG_PROTECT_SET,
  2138. apl[i].start,
  2139. apl[i].start + apl[i].size - 1,
  2140. flash_get_info(apl[i].start));
  2141. }
  2142. #endif
  2143. }
  2144. unsigned long flash_init(void)
  2145. {
  2146. unsigned long size = 0;
  2147. int i;
  2148. #ifdef CONFIG_SYS_FLASH_PROTECTION
  2149. /* read environment from EEPROM */
  2150. char s[64];
  2151. env_get_f("unlock", s, sizeof(s));
  2152. #endif
  2153. #ifdef CONFIG_CFI_FLASH /* for driver model */
  2154. cfi_flash_init_dm();
  2155. #endif
  2156. /* Init: no FLASHes known */
  2157. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
  2158. flash_info[i].flash_id = FLASH_UNKNOWN;
  2159. /* Optionally write flash configuration register */
  2160. cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
  2161. cfi_flash_config_reg(i));
  2162. if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
  2163. flash_get_size(cfi_flash_bank_addr(i), i);
  2164. size += flash_info[i].size;
  2165. if (flash_info[i].flash_id == FLASH_UNKNOWN) {
  2166. #ifndef CONFIG_SYS_FLASH_QUIET_TEST
  2167. printf("## Unknown flash on Bank %d ", i + 1);
  2168. printf("- Size = 0x%08lx = %ld MB\n",
  2169. flash_info[i].size,
  2170. flash_info[i].size >> 20);
  2171. #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
  2172. }
  2173. #ifdef CONFIG_SYS_FLASH_PROTECTION
  2174. else if (strcmp(s, "yes") == 0) {
  2175. /*
  2176. * Only the U-Boot image and it's environment
  2177. * is protected, all other sectors are
  2178. * unprotected (unlocked) if flash hardware
  2179. * protection is used (CONFIG_SYS_FLASH_PROTECTION)
  2180. * and the environment variable "unlock" is
  2181. * set to "yes".
  2182. */
  2183. if (flash_info[i].legacy_unlock) {
  2184. int k;
  2185. /*
  2186. * Disable legacy_unlock temporarily,
  2187. * since flash_real_protect would
  2188. * relock all other sectors again
  2189. * otherwise.
  2190. */
  2191. flash_info[i].legacy_unlock = 0;
  2192. /*
  2193. * Legacy unlocking (e.g. Intel J3) ->
  2194. * unlock only one sector. This will
  2195. * unlock all sectors.
  2196. */
  2197. flash_real_protect(&flash_info[i], 0, 0);
  2198. flash_info[i].legacy_unlock = 1;
  2199. /*
  2200. * Manually mark other sectors as
  2201. * unlocked (unprotected)
  2202. */
  2203. for (k = 1; k < flash_info[i].sector_count; k++)
  2204. flash_info[i].protect[k] = 0;
  2205. } else {
  2206. /*
  2207. * No legancy unlocking -> unlock all sectors
  2208. */
  2209. flash_protect(FLAG_PROTECT_CLEAR,
  2210. flash_info[i].start[0],
  2211. flash_info[i].start[0]
  2212. + flash_info[i].size - 1,
  2213. &flash_info[i]);
  2214. }
  2215. }
  2216. #endif /* CONFIG_SYS_FLASH_PROTECTION */
  2217. }
  2218. flash_protect_default();
  2219. #ifdef CONFIG_FLASH_CFI_MTD
  2220. cfi_mtd_init();
  2221. #endif
  2222. return (size);
  2223. }
  2224. #ifdef CONFIG_CFI_FLASH /* for driver model */
  2225. static int cfi_flash_probe(struct udevice *dev)
  2226. {
  2227. const fdt32_t *cell;
  2228. int addrc, sizec;
  2229. int len, idx;
  2230. addrc = dev_read_addr_cells(dev);
  2231. sizec = dev_read_size_cells(dev);
  2232. /* decode regs; there may be multiple reg tuples. */
  2233. cell = dev_read_prop(dev, "reg", &len);
  2234. if (!cell)
  2235. return -ENOENT;
  2236. idx = 0;
  2237. len /= sizeof(fdt32_t);
  2238. while (idx < len) {
  2239. phys_addr_t addr;
  2240. addr = dev_translate_address(dev, cell + idx);
  2241. flash_info[cfi_flash_num_flash_banks].dev = dev;
  2242. flash_info[cfi_flash_num_flash_banks].base = addr;
  2243. cfi_flash_num_flash_banks++;
  2244. idx += addrc + sizec;
  2245. }
  2246. gd->bd->bi_flashstart = flash_info[0].base;
  2247. return 0;
  2248. }
  2249. static const struct udevice_id cfi_flash_ids[] = {
  2250. { .compatible = "cfi-flash" },
  2251. { .compatible = "jedec-flash" },
  2252. {}
  2253. };
  2254. U_BOOT_DRIVER(cfi_flash) = {
  2255. .name = "cfi_flash",
  2256. .id = UCLASS_MTD,
  2257. .of_match = cfi_flash_ids,
  2258. .probe = cfi_flash_probe,
  2259. };
  2260. #endif /* CONFIG_CFI_FLASH */