flash.c 7.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2000-2003
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. */
  6. #include <common.h>
  7. #include <console.h>
  8. #include <cpu_func.h>
  9. #include <flash.h>
  10. #include <irq_func.h>
  11. #include <uuid.h>
  12. #define PHYS_FLASH_1 CONFIG_SYS_FLASH_BASE
  13. #define FLASH_BANK_SIZE 0x200000
  14. flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
  15. void flash_print_info(flash_info_t *info)
  16. {
  17. int i;
  18. switch (info->flash_id & FLASH_VENDMASK) {
  19. case (AMD_MANUFACT & FLASH_VENDMASK):
  20. printf ("AMD: ");
  21. break;
  22. default:
  23. printf ("Unknown Vendor ");
  24. break;
  25. }
  26. switch (info->flash_id & FLASH_TYPEMASK) {
  27. case (AMD_ID_PL160CB & FLASH_TYPEMASK):
  28. printf ("AM29PL160CB (16Mbit)\n");
  29. break;
  30. default:
  31. printf ("Unknown Chip Type\n");
  32. goto Done;
  33. break;
  34. }
  35. printf (" Size: %ld MB in %d Sectors\n",
  36. info->size >> 20, info->sector_count);
  37. printf (" Sector Start Addresses:");
  38. for (i = 0; i < info->sector_count; i++) {
  39. if ((i % 5) == 0) {
  40. printf ("\n ");
  41. }
  42. printf (" %08lX%s", info->start[i],
  43. info->protect[i] ? " (RO)" : " ");
  44. }
  45. printf ("\n");
  46. Done:
  47. return;
  48. }
  49. unsigned long flash_init(void)
  50. {
  51. int i, j;
  52. ulong size = 0;
  53. for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
  54. ulong flashbase = 0;
  55. flash_info[i].flash_id =
  56. (AMD_MANUFACT & FLASH_VENDMASK) |
  57. (AMD_ID_PL160CB & FLASH_TYPEMASK);
  58. flash_info[i].size = FLASH_BANK_SIZE;
  59. flash_info[i].sector_count = CONFIG_SYS_MAX_FLASH_SECT;
  60. memset (flash_info[i].protect, 0, CONFIG_SYS_MAX_FLASH_SECT);
  61. if (i == 0)
  62. flashbase = PHYS_FLASH_1;
  63. else
  64. panic ("configured to many flash banks!\n");
  65. for (j = 0; j < flash_info[i].sector_count; j++) {
  66. if (j == 0) {
  67. /* 1st is 16 KiB */
  68. flash_info[i].start[j] = flashbase;
  69. }
  70. if ((j >= 1) && (j <= 2)) {
  71. /* 2nd and 3rd are 8 KiB */
  72. flash_info[i].start[j] =
  73. flashbase + 0x4000 + 0x2000 * (j - 1);
  74. }
  75. if (j == 3) {
  76. /* 4th is 224 KiB */
  77. flash_info[i].start[j] = flashbase + 0x8000;
  78. }
  79. if ((j >= 4) && (j <= 10)) {
  80. /* rest is 256 KiB */
  81. flash_info[i].start[j] =
  82. flashbase + 0x40000 + 0x40000 * (j -
  83. 4);
  84. }
  85. }
  86. size += flash_info[i].size;
  87. }
  88. flash_protect(FLAG_PROTECT_SET,
  89. CONFIG_SYS_FLASH_BASE,
  90. CONFIG_SYS_FLASH_BASE + 0x3ffff, &flash_info[0]);
  91. return size;
  92. }
  93. #define CMD_READ_ARRAY 0x00F0
  94. #define CMD_UNLOCK1 0x00AA
  95. #define CMD_UNLOCK2 0x0055
  96. #define CMD_ERASE_SETUP 0x0080
  97. #define CMD_ERASE_CONFIRM 0x0030
  98. #define CMD_PROGRAM 0x00A0
  99. #define CMD_UNLOCK_BYPASS 0x0020
  100. #define MEM_FLASH_ADDR1 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x00000555<<1)))
  101. #define MEM_FLASH_ADDR2 (*(volatile u16 *)(CONFIG_SYS_FLASH_BASE + (0x000002AA<<1)))
  102. #define BIT_ERASE_DONE 0x0080
  103. #define BIT_RDY_MASK 0x0080
  104. #define BIT_PROGRAM_ERROR 0x0020
  105. #define BIT_TIMEOUT 0x80000000 /* our flag */
  106. #define READY 1
  107. #define ERR 2
  108. #define TMO 4
  109. int flash_erase(flash_info_t *info, int s_first, int s_last)
  110. {
  111. ulong result;
  112. int iflag, cflag, prot, sect;
  113. int rc = ERR_OK;
  114. int chip1;
  115. ulong start;
  116. /* first look for protection bits */
  117. if (info->flash_id == FLASH_UNKNOWN)
  118. return ERR_UNKNOWN_FLASH_TYPE;
  119. if ((s_first < 0) || (s_first > s_last)) {
  120. return ERR_INVAL;
  121. }
  122. if ((info->flash_id & FLASH_VENDMASK) !=
  123. (AMD_MANUFACT & FLASH_VENDMASK)) {
  124. return ERR_UNKNOWN_FLASH_VENDOR;
  125. }
  126. prot = 0;
  127. for (sect = s_first; sect <= s_last; ++sect) {
  128. if (info->protect[sect]) {
  129. prot++;
  130. }
  131. }
  132. if (prot)
  133. return ERR_PROTECTED;
  134. /*
  135. * Disable interrupts which might cause a timeout
  136. * here. Remember that our exception vectors are
  137. * at address 0 in the flash, and we don't want a
  138. * (ticker) exception to happen while the flash
  139. * chip is in programming mode.
  140. */
  141. cflag = icache_status();
  142. icache_disable();
  143. iflag = disable_interrupts();
  144. printf ("\n");
  145. /* Start erase on unprotected sectors */
  146. for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
  147. printf ("Erasing sector %2d ... ", sect);
  148. /* arm simple, non interrupt dependent timer */
  149. start = get_timer(0);
  150. if (info->protect[sect] == 0) { /* not protected */
  151. volatile u16 *addr =
  152. (volatile u16 *) (info->start[sect]);
  153. MEM_FLASH_ADDR1 = CMD_UNLOCK1;
  154. MEM_FLASH_ADDR2 = CMD_UNLOCK2;
  155. MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
  156. MEM_FLASH_ADDR1 = CMD_UNLOCK1;
  157. MEM_FLASH_ADDR2 = CMD_UNLOCK2;
  158. *addr = CMD_ERASE_CONFIRM;
  159. /* wait until flash is ready */
  160. chip1 = 0;
  161. do {
  162. result = *addr;
  163. /* check timeout */
  164. if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
  165. MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
  166. chip1 = TMO;
  167. break;
  168. }
  169. if (!chip1
  170. && (result & 0xFFFF) & BIT_ERASE_DONE)
  171. chip1 = READY;
  172. } while (!chip1);
  173. MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
  174. if (chip1 == ERR) {
  175. rc = ERR_PROG_ERROR;
  176. goto outahere;
  177. }
  178. if (chip1 == TMO) {
  179. rc = ERR_TIMEOUT;
  180. goto outahere;
  181. }
  182. printf ("ok.\n");
  183. } else { /* it was protected */
  184. printf ("protected!\n");
  185. }
  186. }
  187. if (ctrlc ())
  188. printf ("User Interrupt!\n");
  189. outahere:
  190. /* allow flash to settle - wait 10 ms */
  191. udelay (10000);
  192. if (iflag)
  193. enable_interrupts();
  194. if (cflag)
  195. icache_enable();
  196. return rc;
  197. }
  198. static int write_word(flash_info_t *info, ulong dest, ulong data)
  199. {
  200. volatile u16 *addr = (volatile u16 *) dest;
  201. ulong result;
  202. int rc = ERR_OK;
  203. int cflag, iflag;
  204. int chip1;
  205. ulong start;
  206. /*
  207. * Check if Flash is (sufficiently) erased
  208. */
  209. result = *addr;
  210. if ((result & data) != data)
  211. return ERR_NOT_ERASED;
  212. /*
  213. * Disable interrupts which might cause a timeout
  214. * here. Remember that our exception vectors are
  215. * at address 0 in the flash, and we don't want a
  216. * (ticker) exception to happen while the flash
  217. * chip is in programming mode.
  218. */
  219. cflag = icache_status();
  220. icache_disable();
  221. iflag = disable_interrupts();
  222. MEM_FLASH_ADDR1 = CMD_UNLOCK1;
  223. MEM_FLASH_ADDR2 = CMD_UNLOCK2;
  224. MEM_FLASH_ADDR1 = CMD_PROGRAM;
  225. *addr = data;
  226. /* arm simple, non interrupt dependent timer */
  227. start = get_timer(0);
  228. /* wait until flash is ready */
  229. chip1 = 0;
  230. do {
  231. result = *addr;
  232. /* check timeout */
  233. if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
  234. chip1 = ERR | TMO;
  235. break;
  236. }
  237. if (!chip1 && ((result & 0x80) == (data & 0x80)))
  238. chip1 = READY;
  239. } while (!chip1);
  240. *addr = CMD_READ_ARRAY;
  241. if (chip1 == ERR || *addr != data)
  242. rc = ERR_PROG_ERROR;
  243. if (iflag)
  244. enable_interrupts();
  245. if (cflag)
  246. icache_enable();
  247. return rc;
  248. }
  249. int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
  250. {
  251. ulong wp, data;
  252. int rc;
  253. if (addr & 1) {
  254. printf ("unaligned destination not supported\n");
  255. return ERR_ALIGN;
  256. }
  257. #if 0
  258. if (cnt & 1) {
  259. printf ("odd transfer sizes not supported\n");
  260. return ERR_ALIGN;
  261. }
  262. #endif
  263. wp = addr;
  264. if (addr & 1) {
  265. data = (*((volatile u8 *) addr) << 8) | *((volatile u8 *)
  266. src);
  267. if ((rc = write_word (info, wp - 1, data)) != 0) {
  268. return (rc);
  269. }
  270. src += 1;
  271. wp += 1;
  272. cnt -= 1;
  273. }
  274. while (cnt >= 2) {
  275. data = *((volatile u16 *) src);
  276. if ((rc = write_word (info, wp, data)) != 0) {
  277. return (rc);
  278. }
  279. src += 2;
  280. wp += 2;
  281. cnt -= 2;
  282. }
  283. if (cnt == 1) {
  284. data = (*((volatile u8 *) src) << 8) |
  285. *((volatile u8 *) (wp + 1));
  286. if ((rc = write_word (info, wp, data)) != 0) {
  287. return (rc);
  288. }
  289. src += 1;
  290. wp += 1;
  291. cnt -= 1;
  292. }
  293. return ERR_OK;
  294. }