at91_i2c.c 6.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Atmel I2C driver.
  4. *
  5. * (C) Copyright 2016 Songjun Wu <songjun.wu@atmel.com>
  6. */
  7. #include <malloc.h>
  8. #include <asm/global_data.h>
  9. #include <asm/io.h>
  10. #include <common.h>
  11. #include <clk.h>
  12. #include <dm.h>
  13. #include <errno.h>
  14. #include <fdtdec.h>
  15. #include <i2c.h>
  16. #include <linux/bitops.h>
  17. #include <mach/clk.h>
  18. #include "at91_i2c.h"
  19. DECLARE_GLOBAL_DATA_PTR;
  20. #define I2C_TIMEOUT_MS 100
  21. static int at91_wait_for_xfer(struct at91_i2c_bus *bus, u32 status)
  22. {
  23. struct at91_i2c_regs *reg = bus->regs;
  24. ulong start_time = get_timer(0);
  25. u32 sr;
  26. bus->status = 0;
  27. do {
  28. sr = readl(&reg->sr);
  29. bus->status |= sr;
  30. if (sr & TWI_SR_NACK)
  31. return -EREMOTEIO;
  32. else if (sr & status)
  33. return 0;
  34. } while (get_timer(start_time) < I2C_TIMEOUT_MS);
  35. return -ETIMEDOUT;
  36. }
  37. static int at91_i2c_xfer_msg(struct at91_i2c_bus *bus, struct i2c_msg *msg)
  38. {
  39. struct at91_i2c_regs *reg = bus->regs;
  40. bool is_read = msg->flags & I2C_M_RD;
  41. u32 i;
  42. int ret = 0;
  43. /* if there is no message to send/receive, just exit quietly */
  44. if (msg->len == 0)
  45. return ret;
  46. readl(&reg->sr);
  47. if (is_read) {
  48. writel(TWI_CR_START, &reg->cr);
  49. for (i = 0; !ret && i < (msg->len - 1); i++) {
  50. ret = at91_wait_for_xfer(bus, TWI_SR_RXRDY);
  51. msg->buf[i] = readl(&reg->rhr);
  52. }
  53. if (ret)
  54. goto error;
  55. writel(TWI_CR_STOP, &reg->cr);
  56. ret = at91_wait_for_xfer(bus, TWI_SR_RXRDY);
  57. if (ret)
  58. goto error;
  59. msg->buf[i] = readl(&reg->rhr);
  60. } else {
  61. writel(msg->buf[0], &reg->thr);
  62. ret = at91_wait_for_xfer(bus, TWI_SR_TXRDY);
  63. for (i = 1; !ret && (i < msg->len); i++) {
  64. writel(msg->buf[i], &reg->thr);
  65. ret = at91_wait_for_xfer(bus, TWI_SR_TXRDY);
  66. }
  67. if (ret)
  68. goto error;
  69. writel(TWI_CR_STOP, &reg->cr);
  70. }
  71. if (!ret)
  72. ret = at91_wait_for_xfer(bus, TWI_SR_TXCOMP);
  73. if (ret)
  74. goto error;
  75. if (bus->status & (TWI_SR_OVRE | TWI_SR_UNRE | TWI_SR_LOCK)) {
  76. ret = -EIO;
  77. goto error;
  78. }
  79. return 0;
  80. error:
  81. if (bus->status & TWI_SR_LOCK)
  82. writel(TWI_CR_LOCKCLR, &reg->cr);
  83. return ret;
  84. }
  85. static int at91_i2c_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
  86. {
  87. struct at91_i2c_bus *bus = dev_get_priv(dev);
  88. struct at91_i2c_regs *reg = bus->regs;
  89. struct i2c_msg *m_start = msg;
  90. bool is_read;
  91. u32 int_addr_flag = 0;
  92. int ret = 0;
  93. if (nmsgs == 2) {
  94. int internal_address = 0;
  95. int i;
  96. /* 1st msg is put into the internal address, start with 2nd */
  97. m_start = &msg[1];
  98. /* the max length of internal address is 3 bytes */
  99. if (msg->len > 3)
  100. return -EFAULT;
  101. for (i = 0; i < msg->len; ++i) {
  102. const unsigned addr = msg->buf[msg->len - 1 - i];
  103. internal_address |= addr << (8 * i);
  104. int_addr_flag += TWI_MMR_IADRSZ_1;
  105. }
  106. writel(internal_address, &reg->iadr);
  107. }
  108. is_read = m_start->flags & I2C_M_RD;
  109. writel((m_start->addr << 16) | int_addr_flag |
  110. (is_read ? TWI_MMR_MREAD : 0), &reg->mmr);
  111. ret = at91_i2c_xfer_msg(bus, m_start);
  112. return ret;
  113. }
  114. /*
  115. * Calculate symmetric clock as stated in datasheet:
  116. * twi_clk = F_MAIN / (2 * (cdiv * (1 << ckdiv) + offset))
  117. */
  118. static void at91_calc_i2c_clock(struct udevice *dev, int i2c_clk)
  119. {
  120. struct at91_i2c_bus *bus = dev_get_priv(dev);
  121. const struct at91_i2c_pdata *pdata = bus->pdata;
  122. int offset = pdata->clk_offset;
  123. int max_ckdiv = pdata->clk_max_div;
  124. int ckdiv, cdiv, div;
  125. unsigned long src_rate;
  126. src_rate = bus->bus_clk_rate;
  127. div = max(0, (int)DIV_ROUND_UP(src_rate, 2 * i2c_clk) - offset);
  128. ckdiv = fls(div >> 8);
  129. cdiv = div >> ckdiv;
  130. if (ckdiv > max_ckdiv) {
  131. ckdiv = max_ckdiv;
  132. cdiv = 255;
  133. }
  134. bus->speed = DIV_ROUND_UP(src_rate,
  135. (cdiv * (1 << ckdiv) + offset) * 2);
  136. bus->cwgr_val = (ckdiv << 16) | (cdiv << 8) | cdiv;
  137. }
  138. static int at91_i2c_enable_clk(struct udevice *dev)
  139. {
  140. struct at91_i2c_bus *bus = dev_get_priv(dev);
  141. struct clk clk;
  142. ulong clk_rate;
  143. int ret;
  144. ret = clk_get_by_index(dev, 0, &clk);
  145. if (ret)
  146. return -EINVAL;
  147. ret = clk_enable(&clk);
  148. if (ret)
  149. return ret;
  150. clk_rate = clk_get_rate(&clk);
  151. if (!clk_rate)
  152. return -EINVAL;
  153. bus->bus_clk_rate = clk_rate;
  154. clk_free(&clk);
  155. return 0;
  156. }
  157. static int at91_i2c_set_bus_speed(struct udevice *dev, unsigned int speed)
  158. {
  159. struct at91_i2c_bus *bus = dev_get_priv(dev);
  160. at91_calc_i2c_clock(dev, speed);
  161. writel(bus->cwgr_val, &bus->regs->cwgr);
  162. return 0;
  163. }
  164. int at91_i2c_get_bus_speed(struct udevice *dev)
  165. {
  166. struct at91_i2c_bus *bus = dev_get_priv(dev);
  167. return bus->speed;
  168. }
  169. static int at91_i2c_of_to_plat(struct udevice *dev)
  170. {
  171. const void *blob = gd->fdt_blob;
  172. struct at91_i2c_bus *bus = dev_get_priv(dev);
  173. int node = dev_of_offset(dev);
  174. bus->regs = dev_read_addr_ptr(dev);
  175. bus->pdata = (struct at91_i2c_pdata *)dev_get_driver_data(dev);
  176. bus->clock_frequency = fdtdec_get_int(blob, node,
  177. "clock-frequency", 100000);
  178. return 0;
  179. }
  180. static const struct dm_i2c_ops at91_i2c_ops = {
  181. .xfer = at91_i2c_xfer,
  182. .set_bus_speed = at91_i2c_set_bus_speed,
  183. .get_bus_speed = at91_i2c_get_bus_speed,
  184. };
  185. static int at91_i2c_probe(struct udevice *dev)
  186. {
  187. struct at91_i2c_bus *bus = dev_get_priv(dev);
  188. struct at91_i2c_regs *reg = bus->regs;
  189. int ret;
  190. ret = at91_i2c_enable_clk(dev);
  191. if (ret)
  192. return ret;
  193. writel(TWI_CR_SWRST, &reg->cr);
  194. at91_calc_i2c_clock(dev, bus->clock_frequency);
  195. writel(bus->cwgr_val, &reg->cwgr);
  196. writel(TWI_CR_MSEN, &reg->cr);
  197. writel(TWI_CR_SVDIS, &reg->cr);
  198. return 0;
  199. }
  200. static const struct at91_i2c_pdata at91rm9200_config = {
  201. .clk_max_div = 5,
  202. .clk_offset = 3,
  203. };
  204. static const struct at91_i2c_pdata at91sam9261_config = {
  205. .clk_max_div = 5,
  206. .clk_offset = 4,
  207. };
  208. static const struct at91_i2c_pdata at91sam9260_config = {
  209. .clk_max_div = 7,
  210. .clk_offset = 4,
  211. };
  212. static const struct at91_i2c_pdata at91sam9g20_config = {
  213. .clk_max_div = 7,
  214. .clk_offset = 4,
  215. };
  216. static const struct at91_i2c_pdata at91sam9g10_config = {
  217. .clk_max_div = 7,
  218. .clk_offset = 4,
  219. };
  220. static const struct at91_i2c_pdata at91sam9x5_config = {
  221. .clk_max_div = 7,
  222. .clk_offset = 4,
  223. };
  224. static const struct at91_i2c_pdata sama5d4_config = {
  225. .clk_max_div = 7,
  226. .clk_offset = 4,
  227. };
  228. static const struct at91_i2c_pdata sama5d2_config = {
  229. .clk_max_div = 7,
  230. .clk_offset = 3,
  231. };
  232. static const struct udevice_id at91_i2c_ids[] = {
  233. { .compatible = "atmel,at91rm9200-i2c", .data = (long)&at91rm9200_config },
  234. { .compatible = "atmel,at91sam9260-i2c", .data = (long)&at91sam9260_config },
  235. { .compatible = "atmel,at91sam9261-i2c", .data = (long)&at91sam9261_config },
  236. { .compatible = "atmel,at91sam9g20-i2c", .data = (long)&at91sam9g20_config },
  237. { .compatible = "atmel,at91sam9g10-i2c", .data = (long)&at91sam9g10_config },
  238. { .compatible = "atmel,at91sam9x5-i2c", .data = (long)&at91sam9x5_config },
  239. { .compatible = "atmel,sama5d4-i2c", .data = (long)&sama5d4_config },
  240. { .compatible = "atmel,sama5d2-i2c", .data = (long)&sama5d2_config },
  241. { }
  242. };
  243. U_BOOT_DRIVER(i2c_at91) = {
  244. .name = "i2c_at91",
  245. .id = UCLASS_I2C,
  246. .of_match = at91_i2c_ids,
  247. .probe = at91_i2c_probe,
  248. .of_to_plat = at91_i2c_of_to_plat,
  249. .per_child_auto = sizeof(struct dm_i2c_chip),
  250. .priv_auto = sizeof(struct at91_i2c_bus),
  251. .ops = &at91_i2c_ops,
  252. };