msm_gpio.c 3.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Qualcomm GPIO driver
  4. *
  5. * (C) Copyright 2015 Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
  6. */
  7. #include <common.h>
  8. #include <dm.h>
  9. #include <errno.h>
  10. #include <asm/global_data.h>
  11. #include <asm/gpio.h>
  12. #include <asm/io.h>
  13. DECLARE_GLOBAL_DATA_PTR;
  14. /* Register offsets */
  15. #define GPIO_CONFIG_OFF(no) ((no) * 0x1000)
  16. #define GPIO_IN_OUT_OFF(no) ((no) * 0x1000 + 0x4)
  17. /* OE */
  18. #define GPIO_OE_DISABLE (0x0 << 9)
  19. #define GPIO_OE_ENABLE (0x1 << 9)
  20. #define GPIO_OE_MASK (0x1 << 9)
  21. /* GPIO_IN_OUT register shifts. */
  22. #define GPIO_IN 0
  23. #define GPIO_OUT 1
  24. struct msm_gpio_bank {
  25. phys_addr_t base;
  26. };
  27. static int msm_gpio_direction_input(struct udevice *dev, unsigned int gpio)
  28. {
  29. struct msm_gpio_bank *priv = dev_get_priv(dev);
  30. phys_addr_t reg = priv->base + GPIO_CONFIG_OFF(gpio);
  31. /* Disable OE bit */
  32. clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_DISABLE);
  33. return 0;
  34. }
  35. static int msm_gpio_set_value(struct udevice *dev, unsigned gpio, int value)
  36. {
  37. struct msm_gpio_bank *priv = dev_get_priv(dev);
  38. value = !!value;
  39. /* set value */
  40. writel(value << GPIO_OUT, priv->base + GPIO_IN_OUT_OFF(gpio));
  41. return 0;
  42. }
  43. static int msm_gpio_direction_output(struct udevice *dev, unsigned gpio,
  44. int value)
  45. {
  46. struct msm_gpio_bank *priv = dev_get_priv(dev);
  47. phys_addr_t reg = priv->base + GPIO_CONFIG_OFF(gpio);
  48. value = !!value;
  49. /* set value */
  50. writel(value << GPIO_OUT, priv->base + GPIO_IN_OUT_OFF(gpio));
  51. /* switch direction */
  52. clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_ENABLE);
  53. return 0;
  54. }
  55. static int msm_gpio_get_value(struct udevice *dev, unsigned gpio)
  56. {
  57. struct msm_gpio_bank *priv = dev_get_priv(dev);
  58. return !!(readl(priv->base + GPIO_IN_OUT_OFF(gpio)) >> GPIO_IN);
  59. }
  60. static int msm_gpio_get_function(struct udevice *dev, unsigned offset)
  61. {
  62. struct msm_gpio_bank *priv = dev_get_priv(dev);
  63. if (readl(priv->base + GPIO_CONFIG_OFF(offset)) & GPIO_OE_ENABLE)
  64. return GPIOF_OUTPUT;
  65. return GPIOF_INPUT;
  66. }
  67. static const struct dm_gpio_ops gpio_msm_ops = {
  68. .direction_input = msm_gpio_direction_input,
  69. .direction_output = msm_gpio_direction_output,
  70. .get_value = msm_gpio_get_value,
  71. .set_value = msm_gpio_set_value,
  72. .get_function = msm_gpio_get_function,
  73. };
  74. static int msm_gpio_probe(struct udevice *dev)
  75. {
  76. struct msm_gpio_bank *priv = dev_get_priv(dev);
  77. priv->base = dev_read_addr(dev);
  78. return priv->base == FDT_ADDR_T_NONE ? -EINVAL : 0;
  79. }
  80. static int msm_gpio_of_to_plat(struct udevice *dev)
  81. {
  82. struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
  83. uc_priv->gpio_count = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
  84. "gpio-count", 0);
  85. uc_priv->bank_name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev),
  86. "gpio-bank-name", NULL);
  87. if (uc_priv->bank_name == NULL)
  88. uc_priv->bank_name = "soc";
  89. return 0;
  90. }
  91. static const struct udevice_id msm_gpio_ids[] = {
  92. { .compatible = "qcom,msm8916-pinctrl" },
  93. { .compatible = "qcom,apq8016-pinctrl" },
  94. { .compatible = "qcom,ipq4019-pinctrl" },
  95. { }
  96. };
  97. U_BOOT_DRIVER(gpio_msm) = {
  98. .name = "gpio_msm",
  99. .id = UCLASS_GPIO,
  100. .of_match = msm_gpio_ids,
  101. .of_to_plat = msm_gpio_of_to_plat,
  102. .probe = msm_gpio_probe,
  103. .ops = &gpio_msm_ops,
  104. .priv_auto = sizeof(struct msm_gpio_bank),
  105. };