sbi.h 4.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158
  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2015 Regents of the University of California
  4. * Copyright (c) 2020 Western Digital Corporation or its affiliates.
  5. *
  6. * Taken from Linux arch/riscv/include/asm/sbi.h
  7. */
  8. #ifndef _ASM_RISCV_SBI_H
  9. #define _ASM_RISCV_SBI_H
  10. #include <linux/types.h>
  11. enum sbi_ext_id {
  12. SBI_EXT_0_1_SET_TIMER = 0x0,
  13. SBI_EXT_0_1_CONSOLE_PUTCHAR = 0x1,
  14. SBI_EXT_0_1_CONSOLE_GETCHAR = 0x2,
  15. SBI_EXT_0_1_CLEAR_IPI = 0x3,
  16. SBI_EXT_0_1_SEND_IPI = 0x4,
  17. SBI_EXT_0_1_REMOTE_FENCE_I = 0x5,
  18. SBI_EXT_0_1_REMOTE_SFENCE_VMA = 0x6,
  19. SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID = 0x7,
  20. SBI_EXT_0_1_SHUTDOWN = 0x8,
  21. SBI_EXT_BASE = 0x10,
  22. SBI_EXT_TIME = 0x54494D45,
  23. SBI_EXT_IPI = 0x735049,
  24. SBI_EXT_RFENCE = 0x52464E43,
  25. SBI_EXT_HSM = 0x48534D,
  26. SBI_EXT_SRST = 0x53525354,
  27. };
  28. enum sbi_ext_base_fid {
  29. SBI_EXT_BASE_GET_SPEC_VERSION = 0,
  30. SBI_EXT_BASE_GET_IMP_ID,
  31. SBI_EXT_BASE_GET_IMP_VERSION,
  32. SBI_EXT_BASE_PROBE_EXT,
  33. SBI_EXT_BASE_GET_MVENDORID,
  34. SBI_EXT_BASE_GET_MARCHID,
  35. SBI_EXT_BASE_GET_MIMPID,
  36. };
  37. enum sbi_ext_time_fid {
  38. SBI_EXT_TIME_SET_TIMER = 0,
  39. };
  40. enum sbi_ext_ipi_fid {
  41. SBI_EXT_IPI_SEND_IPI = 0,
  42. };
  43. enum sbi_ext_rfence_fid {
  44. SBI_EXT_RFENCE_REMOTE_FENCE_I = 0,
  45. SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
  46. SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
  47. SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID,
  48. SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
  49. SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID,
  50. SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
  51. };
  52. enum sbi_ext_hsm_fid {
  53. SBI_EXT_HSM_HART_START = 0,
  54. SBI_EXT_HSM_HART_STOP,
  55. SBI_EXT_HSM_HART_STATUS,
  56. SBI_EXT_HSM_HART_SUSPEND,
  57. };
  58. enum sbi_hsm_hart_status {
  59. SBI_HSM_HART_STATUS_STARTED = 0,
  60. SBI_HSM_HART_STATUS_STOPPED,
  61. SBI_HSM_HART_STATUS_START_PENDING,
  62. SBI_HSM_HART_STATUS_STOP_PENDING,
  63. SBI_HSM_HART_STATUS_SUSPEND_PENDING,
  64. SBI_HSM_HART_STATUS_RESUME_PENDING,
  65. };
  66. enum sbi_ext_srst_fid {
  67. SBI_EXT_SRST_RESET = 0,
  68. };
  69. enum sbi_srst_reset_type {
  70. SBI_SRST_RESET_TYPE_SHUTDOWN = 0,
  71. SBI_SRST_RESET_TYPE_COLD_REBOOT,
  72. SBI_SRST_RESET_TYPE_WARM_REBOOT,
  73. };
  74. enum sbi_srst_reset_reason {
  75. SBI_SRST_RESET_REASON_NONE = 0,
  76. SBI_SRST_RESET_REASON_SYS_FAILURE,
  77. };
  78. #ifdef CONFIG_SBI_V01
  79. #define SBI_EXT_SET_TIMER SBI_EXT_0_1_SET_TIMER
  80. #define SBI_FID_SET_TIMER 0
  81. #define SBI_EXT_SEND_IPI SBI_EXT_0_1_SEND_IPI
  82. #define SBI_FID_SEND_IPI 0
  83. #define SBI_EXT_REMOTE_FENCE_I SBI_EXT_0_1_REMOTE_FENCE_I
  84. #define SBI_FID_REMOTE_FENCE_I 0
  85. #define SBI_EXT_REMOTE_SFENCE_VMA SBI_EXT_0_1_REMOTE_SFENCE_VMA
  86. #define SBI_FID_REMOTE_SFENCE_VMA 0
  87. #define SBI_EXT_REMOTE_SFENCE_VMA_ASID SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID
  88. #define SBI_FID_REMOTE_SFENCE_VMA_ASID 0
  89. #else
  90. #define SBI_EXT_SET_TIMER SBI_EXT_TIME
  91. #define SBI_FID_SET_TIMER SBI_EXT_TIME_SET_TIMER
  92. #define SBI_EXT_SEND_IPI SBI_EXT_IPI
  93. #define SBI_FID_SEND_IPI SBI_EXT_IPI_SEND_IPI
  94. #define SBI_EXT_REMOTE_FENCE_I SBI_EXT_RFENCE
  95. #define SBI_FID_REMOTE_FENCE_I SBI_EXT_RFENCE_REMOTE_FENCE_I
  96. #define SBI_EXT_REMOTE_SFENCE_VMA SBI_EXT_RFENCE
  97. #define SBI_FID_REMOTE_SFENCE_VMA SBI_EXT_RFENCE_REMOTE_SFENCE_VMA
  98. #define SBI_EXT_REMOTE_SFENCE_VMA_ASID SBI_EXT_RFENCE
  99. #define SBI_FID_REMOTE_SFENCE_VMA_ASID SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID
  100. #endif
  101. #define SBI_SPEC_VERSION_MAJOR_SHIFT 24
  102. #define SBI_SPEC_VERSION_MAJOR_MASK 0x7f
  103. #define SBI_SPEC_VERSION_MINOR_MASK 0xffffff
  104. /* SBI return error codes */
  105. #define SBI_SUCCESS 0
  106. #define SBI_ERR_FAILURE -1
  107. #define SBI_ERR_NOT_SUPPORTED -2
  108. #define SBI_ERR_INVALID_PARAM -3
  109. #define SBI_ERR_DENIED -4
  110. #define SBI_ERR_INVALID_ADDRESS -5
  111. struct sbiret {
  112. long error;
  113. long value;
  114. };
  115. struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
  116. unsigned long arg1, unsigned long arg2,
  117. unsigned long arg3, unsigned long arg4,
  118. unsigned long arg5);
  119. #ifdef CONFIG_SBI_V01
  120. void sbi_console_putchar(int ch);
  121. int sbi_console_getchar(void);
  122. void sbi_clear_ipi(void);
  123. void sbi_shutdown(void);
  124. void sbi_send_ipi(const unsigned long *hart_mask);
  125. void sbi_remote_fence_i(const unsigned long *hart_mask);
  126. void sbi_remote_sfence_vma(const unsigned long *hart_mask,
  127. unsigned long start,
  128. unsigned long size);
  129. void sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
  130. unsigned long start,
  131. unsigned long size,
  132. unsigned long asid);
  133. #endif
  134. void sbi_set_timer(uint64_t stime_value);
  135. long sbi_get_spec_version(void);
  136. int sbi_get_impl_id(void);
  137. int sbi_probe_extension(int ext);
  138. void sbi_srst_reset(unsigned long type, unsigned long reason);
  139. #endif