io.h 12 KB

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  1. /* SPDX-License-Identifier: GPL-2.0 */
  2. /*
  3. * Copyright (C) 2017 Andes Technology Corporation
  4. * Rick Chen, Andes Technology Corporation <rick@andestech.com>
  5. *
  6. */
  7. #ifndef __ASM_RISCV_IO_H
  8. #define __ASM_RISCV_IO_H
  9. #ifdef __KERNEL__
  10. #include <linux/types.h>
  11. #include <asm/barrier.h>
  12. #include <asm/byteorder.h>
  13. static inline void sync(void)
  14. {
  15. }
  16. #ifdef CONFIG_ARCH_MAP_SYSMEM
  17. static inline void *map_sysmem(phys_addr_t paddr, unsigned long len)
  18. {
  19. if (paddr < PHYS_SDRAM_0_SIZE + PHYS_SDRAM_1_SIZE)
  20. paddr = paddr | 0x40000000;
  21. return (void *)(uintptr_t)paddr;
  22. }
  23. static inline void *unmap_sysmem(const void *vaddr)
  24. {
  25. phys_addr_t paddr = (phys_addr_t)vaddr;
  26. paddr = paddr & ~0x40000000;
  27. return (void *)(uintptr_t)paddr;
  28. }
  29. static inline phys_addr_t map_to_sysmem(const void *ptr)
  30. {
  31. return (phys_addr_t)(uintptr_t)ptr;
  32. }
  33. #endif
  34. /*
  35. * Generic virtual read/write. Note that we don't support half-word
  36. * read/writes. We define __arch_*[bl] here, and leave __arch_*w
  37. * to the architecture specific code.
  38. */
  39. #define __arch_getb(a) (*(unsigned char *)(a))
  40. #define __arch_getw(a) (*(unsigned short *)(a))
  41. #define __arch_getl(a) (*(unsigned int *)(a))
  42. #define __arch_getq(a) (*(unsigned long long *)(a))
  43. #define __arch_putb(v, a) (*(unsigned char *)(a) = (v))
  44. #define __arch_putw(v, a) (*(unsigned short *)(a) = (v))
  45. #define __arch_putl(v, a) (*(unsigned int *)(a) = (v))
  46. #define __arch_putq(v, a) (*(unsigned long long *)(a) = (v))
  47. #define __raw_writeb(v, a) __arch_putb(v, a)
  48. #define __raw_writew(v, a) __arch_putw(v, a)
  49. #define __raw_writel(v, a) __arch_putl(v, a)
  50. #define __raw_writeq(v, a) __arch_putq(v, a)
  51. #define __raw_readb(a) __arch_getb(a)
  52. #define __raw_readw(a) __arch_getw(a)
  53. #define __raw_readl(a) __arch_getl(a)
  54. #define __raw_readq(a) __arch_getq(a)
  55. #define dmb() mb()
  56. #define __iormb() rmb()
  57. #define __iowmb() wmb()
  58. static inline void writeb(u8 val, volatile void __iomem *addr)
  59. {
  60. __iowmb();
  61. __arch_putb(val, addr);
  62. }
  63. static inline void writew(u16 val, volatile void __iomem *addr)
  64. {
  65. __iowmb();
  66. __arch_putw(val, addr);
  67. }
  68. static inline void writel(u32 val, volatile void __iomem *addr)
  69. {
  70. __iowmb();
  71. __arch_putl(val, addr);
  72. }
  73. static inline void writeq(u64 val, volatile void __iomem *addr)
  74. {
  75. __iowmb();
  76. __arch_putq(val, addr);
  77. }
  78. static inline u8 readb(const volatile void __iomem *addr)
  79. {
  80. u8 val;
  81. val = __arch_getb(addr);
  82. __iormb();
  83. return val;
  84. }
  85. static inline u16 readw(const volatile void __iomem *addr)
  86. {
  87. u16 val;
  88. val = __arch_getw(addr);
  89. __iormb();
  90. return val;
  91. }
  92. static inline u32 readl(const volatile void __iomem *addr)
  93. {
  94. u32 val;
  95. val = __arch_getl(addr);
  96. __iormb();
  97. return val;
  98. }
  99. static inline u64 readq(const volatile void __iomem *addr)
  100. {
  101. u64 val;
  102. val = __arch_getq(addr);
  103. __iormb();
  104. return val;
  105. }
  106. /*
  107. * The compiler seems to be incapable of optimising constants
  108. * properly. Spell it out to the compiler in some cases.
  109. * These are only valid for small values of "off" (< 1<<12)
  110. */
  111. #define __raw_base_writeb(val, base, off) __arch_base_putb(val, base, off)
  112. #define __raw_base_writew(val, base, off) __arch_base_putw(val, base, off)
  113. #define __raw_base_writel(val, base, off) __arch_base_putl(val, base, off)
  114. #define __raw_base_readb(base, off) __arch_base_getb(base, off)
  115. #define __raw_base_readw(base, off) __arch_base_getw(base, off)
  116. #define __raw_base_readl(base, off) __arch_base_getl(base, off)
  117. #define out_arch(type, endian, a, v) __raw_write##type(cpu_to_##endian(v), a)
  118. #define in_arch(type, endian, a) endian##_to_cpu(__raw_read##type(a))
  119. #define out_le32(a, v) out_arch(l, le32, a, v)
  120. #define out_le16(a, v) out_arch(w, le16, a, v)
  121. #define in_le32(a) in_arch(l, le32, a)
  122. #define in_le16(a) in_arch(w, le16, a)
  123. #define out_be32(a, v) out_arch(l, be32, a, v)
  124. #define out_be16(a, v) out_arch(w, be16, a, v)
  125. #define in_be32(a) in_arch(l, be32, a)
  126. #define in_be16(a) in_arch(w, be16, a)
  127. #define out_8(a, v) __raw_writeb(v, a)
  128. #define in_8(a) __raw_readb(a)
  129. /*
  130. * Clear and set bits in one shot. These macros can be used to clear and
  131. * set multiple bits in a register using a single call. These macros can
  132. * also be used to set a multiple-bit bit pattern using a mask, by
  133. * specifying the mask in the 'clear' parameter and the new bit pattern
  134. * in the 'set' parameter.
  135. */
  136. #define clrbits(type, addr, clear) \
  137. out_##type((addr), in_##type(addr) & ~(clear))
  138. #define setbits(type, addr, set) \
  139. out_##type((addr), in_##type(addr) | (set))
  140. #define clrsetbits(type, addr, clear, set) \
  141. out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
  142. #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
  143. #define setbits_be32(addr, set) setbits(be32, addr, set)
  144. #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
  145. #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
  146. #define setbits_le32(addr, set) setbits(le32, addr, set)
  147. #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
  148. #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
  149. #define setbits_be16(addr, set) setbits(be16, addr, set)
  150. #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
  151. #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
  152. #define setbits_le16(addr, set) setbits(le16, addr, set)
  153. #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
  154. #define clrbits_8(addr, clear) clrbits(8, addr, clear)
  155. #define setbits_8(addr, set) setbits(8, addr, set)
  156. #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
  157. /*
  158. * Now, pick up the machine-defined IO definitions
  159. * #include <asm/arch/io.h>
  160. */
  161. /*
  162. * IO port access primitives
  163. * -------------------------
  164. *
  165. * The NDS32 doesn't have special IO access instructions just like ARM;
  166. * all IO is memory mapped.
  167. * Note that these are defined to perform little endian accesses
  168. * only. Their primary purpose is to access PCI and ISA peripherals.
  169. *
  170. * Note that for a big endian machine, this implies that the following
  171. * big endian mode connectivity is in place, as described by numerious
  172. * ARM documents:
  173. *
  174. * PCI: D0-D7 D8-D15 D16-D23 D24-D31
  175. * ARM: D24-D31 D16-D23 D8-D15 D0-D7
  176. *
  177. * The machine specific io.h include defines __io to translate an "IO"
  178. * address to a memory address.
  179. *
  180. * Note that we prevent GCC re-ordering or caching values in expressions
  181. * by introducing sequence points into the in*() definitions. Note that
  182. * __raw_* do not guarantee this behaviour.
  183. *
  184. * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
  185. */
  186. #ifdef __io
  187. #define outb(v, p) __raw_writeb(v, __io(p))
  188. #define outw(v, p) __raw_writew(cpu_to_le16(v), __io(p))
  189. #define outl(v, p) __raw_writel(cpu_to_le32(v), __io(p))
  190. #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
  191. #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
  192. #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
  193. #define outsb(p, d, l) writesb(__io(p), d, l)
  194. #define outsw(p, d, l) writesw(__io(p), d, l)
  195. #define outsl(p, d, l) writesl(__io(p), d, l)
  196. #define insb(p, d, l) readsb(__io(p), d, l)
  197. #define insw(p, d, l) readsw(__io(p), d, l)
  198. #define insl(p, d, l) readsl(__io(p), d, l)
  199. static inline void readsb(unsigned int *addr, void *data, int bytelen)
  200. {
  201. unsigned char *ptr;
  202. unsigned char *ptr2;
  203. ptr = (unsigned char *)addr;
  204. ptr2 = (unsigned char *)data;
  205. while (bytelen) {
  206. *ptr2 = *ptr;
  207. ptr2++;
  208. bytelen--;
  209. }
  210. }
  211. static inline void readsw(unsigned int *addr, void *data, int wordlen)
  212. {
  213. unsigned short *ptr;
  214. unsigned short *ptr2;
  215. ptr = (unsigned short *)addr;
  216. ptr2 = (unsigned short *)data;
  217. while (wordlen) {
  218. *ptr2 = *ptr;
  219. ptr2++;
  220. wordlen--;
  221. }
  222. }
  223. static inline void readsl(unsigned int *addr, void *data, int longlen)
  224. {
  225. unsigned int *ptr;
  226. unsigned int *ptr2;
  227. ptr = (unsigned int *)addr;
  228. ptr2 = (unsigned int *)data;
  229. while (longlen) {
  230. *ptr2 = *ptr;
  231. ptr2++;
  232. longlen--;
  233. }
  234. }
  235. static inline void writesb(unsigned int *addr, const void *data, int bytelen)
  236. {
  237. unsigned char *ptr;
  238. unsigned char *ptr2;
  239. ptr = (unsigned char *)addr;
  240. ptr2 = (unsigned char *)data;
  241. while (bytelen) {
  242. *ptr = *ptr2;
  243. ptr2++;
  244. bytelen--;
  245. }
  246. }
  247. static inline void writesw(unsigned int *addr, const void *data, int wordlen)
  248. {
  249. unsigned short *ptr;
  250. unsigned short *ptr2;
  251. ptr = (unsigned short *)addr;
  252. ptr2 = (unsigned short *)data;
  253. while (wordlen) {
  254. *ptr = *ptr2;
  255. ptr2++;
  256. wordlen--;
  257. }
  258. }
  259. static inline void writesl(unsigned int *addr, const void *data, int longlen)
  260. {
  261. unsigned int *ptr;
  262. unsigned int *ptr2;
  263. ptr = (unsigned int *)addr;
  264. ptr2 = (unsigned int *)data;
  265. while (longlen) {
  266. *ptr = *ptr2;
  267. ptr2++;
  268. longlen--;
  269. }
  270. }
  271. #endif
  272. #define outb_p(val, port) outb((val), (port))
  273. #define outw_p(val, port) outw((val), (port))
  274. #define outl_p(val, port) outl((val), (port))
  275. #define inb_p(port) inb((port))
  276. #define inw_p(port) inw((port))
  277. #define inl_p(port) inl((port))
  278. #define outsb_p(port, from, len) outsb(port, from, len)
  279. #define outsw_p(port, from, len) outsw(port, from, len)
  280. #define outsl_p(port, from, len) outsl(port, from, len)
  281. #define insb_p(port, to, len) insb(port, to, len)
  282. #define insw_p(port, to, len) insw(port, to, len)
  283. #define insl_p(port, to, len) insl(port, to, len)
  284. /*
  285. * DMA-consistent mapping functions. These allocate/free a region of
  286. * uncached, unwrite-buffered mapped memory space for use with DMA
  287. * devices. This is the "generic" version. The PCI specific version
  288. * is in pci.h
  289. */
  290. /*
  291. * String version of IO memory access ops:
  292. */
  293. /*
  294. * If this architecture has PCI memory IO, then define the read/write
  295. * macros. These should only be used with the cookie passed from
  296. * ioremap.
  297. */
  298. #ifdef __mem_pci
  299. #define readb(c) ({ unsigned int __v = \
  300. __raw_readb(__mem_pci(c)); __v; })
  301. #define readw(c) ({ unsigned int __v = \
  302. le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
  303. #define readl(c) ({ unsigned int __v = \
  304. le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
  305. #define writeb(v, c) __raw_writeb(v, __mem_pci(c))
  306. #define writew(v, c) __raw_writew(cpu_to_le16(v), __mem_pci(c))
  307. #define writel(v, c) __raw_writel(cpu_to_le32(v), __mem_pci(c))
  308. #define memset_io(c, v, l) _memset_io(__mem_pci(c), (v), (l))
  309. #define memcpy_fromio(a, c, l) _memcpy_fromio((a), __mem_pci(c), (l))
  310. #define memcpy_toio(c, a, l) _memcpy_toio(__mem_pci(c), (a), (l))
  311. #define eth_io_copy_and_sum(s, c, l, b) \
  312. eth_copy_and_sum((s), __mem_pci(c), (l), (b))
  313. static inline int check_signature(ulong io_addr, const uchar *s, int len)
  314. {
  315. int retval = 0;
  316. do {
  317. if (readb(io_addr) != *s)
  318. goto out;
  319. io_addr++;
  320. s++;
  321. len--;
  322. } while (len);
  323. retval = 1;
  324. out:
  325. return retval;
  326. }
  327. #endif /* __mem_pci */
  328. /*
  329. * If this architecture has ISA IO, then define the isa_read/isa_write
  330. * macros.
  331. */
  332. #ifdef __mem_isa
  333. #define isa_readb(addr) __raw_readb(__mem_isa(addr))
  334. #define isa_readw(addr) __raw_readw(__mem_isa(addr))
  335. #define isa_readl(addr) __raw_readl(__mem_isa(addr))
  336. #define isa_writeb(val, addr) __raw_writeb(val, __mem_isa(addr))
  337. #define isa_writew(val, addr) __raw_writew(val, __mem_isa(addr))
  338. #define isa_writel(val, addr) __raw_writel(val, __mem_isa(addr))
  339. #define isa_memset_io(a, b, c) _memset_io(__mem_isa(a), (b), (c))
  340. #define isa_memcpy_fromio(a, b, c) _memcpy_fromio((a), __mem_isa(b), (c))
  341. #define isa_memcpy_toio(a, b, c) _memcpy_toio(__mem_isa((a)), (b), (c))
  342. #define isa_eth_io_copy_and_sum(a, b, c, d) \
  343. eth_copy_and_sum((a), __mem_isa(b), (c), (d))
  344. static inline int
  345. isa_check_signature(ulong io_addr, const uchar *s, int len)
  346. {
  347. int retval = 0;
  348. do {
  349. if (isa_readb(io_addr) != *s)
  350. goto out;
  351. io_addr++;
  352. s++;
  353. len--;
  354. } while (len);
  355. retval = 1;
  356. out:
  357. return retval;
  358. }
  359. #else /* __mem_isa */
  360. #define isa_readb(addr) (__readwrite_bug("isa_readb"), 0)
  361. #define isa_readw(addr) (__readwrite_bug("isa_readw"), 0)
  362. #define isa_readl(addr) (__readwrite_bug("isa_readl"), 0)
  363. #define isa_writeb(val, addr) __readwrite_bug("isa_writeb")
  364. #define isa_writew(val, addr) __readwrite_bug("isa_writew")
  365. #define isa_writel(val, addr) __readwrite_bug("isa_writel")
  366. #define isa_memset_io(a, b, c) __readwrite_bug("isa_memset_io")
  367. #define isa_memcpy_fromio(a, b, c) __readwrite_bug("isa_memcpy_fromio")
  368. #define isa_memcpy_toio(a, b, c) __readwrite_bug("isa_memcpy_toio")
  369. #define isa_eth_io_copy_and_sum(a, b, c, d) \
  370. __readwrite_bug("isa_eth_io_copy_and_sum")
  371. #define isa_check_signature(io, sig, len) (0)
  372. #endif /* __mem_isa */
  373. #endif /* __KERNEL__ */
  374. #include <asm-generic/io.h>
  375. #endif /* __ASM_RISCV_IO_H */