Kconfig 6.1 KB

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  1. if ARCH_STM32MP
  2. config SPL
  3. select SPL_BOARD_INIT
  4. select SPL_CLK
  5. select SPL_DM
  6. select SPL_DM_SEQ_ALIAS
  7. select SPL_DRIVERS_MISC
  8. select SPL_FRAMEWORK
  9. select SPL_GPIO
  10. select SPL_LIBCOMMON_SUPPORT
  11. select SPL_LIBGENERIC_SUPPORT
  12. select SPL_OF_CONTROL
  13. select SPL_OF_TRANSLATE
  14. select SPL_PINCTRL
  15. select SPL_REGMAP
  16. select SPL_DM_RESET
  17. select SPL_SERIAL_SUPPORT
  18. select SPL_SYSCON
  19. select SPL_WATCHDOG if WATCHDOG
  20. imply BOOTSTAGE_STASH if SPL_BOOTSTAGE
  21. imply SPL_BOOTSTAGE if BOOTSTAGE
  22. imply SPL_DISPLAY_PRINT
  23. imply SPL_LIBDISK_SUPPORT
  24. imply SPL_SPI_LOAD if SPL_SPI_SUPPORT
  25. config SYS_SOC
  26. default "stm32mp"
  27. config SYS_MALLOC_LEN
  28. default 0x2000000
  29. config ENV_SIZE
  30. default 0x2000
  31. config STM32MP15x
  32. bool "Support STMicroelectronics STM32MP15x Soc"
  33. select ARCH_SUPPORT_PSCI if !TFABOOT
  34. select ARM_SMCCC if TFABOOT
  35. select CPU_V7A
  36. select CPU_V7_HAS_NONSEC if !TFABOOT
  37. select CPU_V7_HAS_VIRT
  38. select OF_BOARD_SETUP
  39. select PINCTRL_STM32
  40. select STM32_RCC
  41. select STM32_RESET
  42. select STM32_SERIAL
  43. select SYS_ARCH_TIMER
  44. imply CMD_NVEDIT_INFO
  45. imply SYSRESET_PSCI if TFABOOT
  46. imply SYSRESET_SYSCON if !TFABOOT
  47. help
  48. support of STMicroelectronics SOC STM32MP15x family
  49. STM32MP157, STM32MP153 or STM32MP151
  50. STMicroelectronics MPU with core ARMv7
  51. dual core A7 for STM32MP157/3, monocore for STM32MP151
  52. target all the STMicroelectronics board with SOC STM32MP1 family
  53. config STM32MP15x_STM32IMAGE
  54. bool "Support STM32 image for generated U-Boot image"
  55. depends on STM32MP15x && TFABOOT
  56. help
  57. Support of STM32 image generation for SOC STM32MP15x
  58. for TF-A boot when FIP container is not used
  59. choice
  60. prompt "STM32MP15x board select"
  61. optional
  62. config TARGET_ST_STM32MP15x
  63. bool "STMicroelectronics STM32MP15x boards"
  64. select STM32MP15x
  65. imply BOOTCOUNT_LIMIT
  66. imply BOOTSTAGE
  67. imply CMD_BOOTCOUNT
  68. imply CMD_BOOTSTAGE
  69. imply CMD_CLS if CMD_BMP
  70. imply DISABLE_CONSOLE
  71. imply PRE_CONSOLE_BUFFER
  72. imply SILENT_CONSOLE
  73. help
  74. target the STMicroelectronics board with SOC STM32MP15x
  75. managed by board/st/stm32mp1:
  76. Evalulation board (EV1) or Discovery board (DK1 and DK2).
  77. The difference between board are managed with devicetree
  78. config TARGET_MICROGEA_STM32MP1
  79. bool "Engicam MicroGEA STM32MP1 SOM"
  80. select STM32MP15x
  81. imply BOOTCOUNT_LIMIT
  82. imply BOOTSTAGE
  83. imply CMD_BOOTCOUNT
  84. imply CMD_BOOTSTAGE
  85. imply CMD_CLS if CMD_BMP
  86. imply DISABLE_CONSOLE
  87. imply PRE_CONSOLE_BUFFER
  88. imply SILENT_CONSOLE
  89. help
  90. MicroGEA STM32MP1 is a STM32MP157A based Micro SOM.
  91. MicroGEA STM32MP1 MicroDev 2.0:
  92. * MicroDev 2.0 is a general purpose miniature carrier board with CAN,
  93. LTE and LVDS panel interfaces.
  94. * MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
  95. for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.
  96. MicroGEA STM32MP1 MicroDev 2.0 7" OF:
  97. * 7" OF is a capacitive touch 7" Open Frame panel solutions with LVDS
  98. panel and toucscreen.
  99. * MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
  100. pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0 7"
  101. Open Frame Solution board.
  102. config TARGET_ICORE_STM32MP1
  103. bool "Engicam i.Core STM32MP1 SOM"
  104. select STM32MP15x
  105. imply BOOTCOUNT_LIMIT
  106. imply BOOTSTAGE
  107. imply CMD_BOOTCOUNT
  108. imply CMD_BOOTSTAGE
  109. imply CMD_CLS if CMD_BMP
  110. imply DISABLE_CONSOLE
  111. imply PRE_CONSOLE_BUFFER
  112. imply SILENT_CONSOLE
  113. help
  114. i.Core STM32MP1 is an EDIMM SOM based on STM32MP157A.
  115. i.Core STM32MP1 EDIMM2.2:
  116. * EDIMM2.2 is a Form Factor Capacitive Evaluation Board.
  117. * i.Core STM32MP1 needs to mount on top of EDIMM2.2 for
  118. creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.
  119. i.Core STM32MP1 C.TOUCH 2.0
  120. * C.TOUCH 2.0 is a general purpose Carrier board.
  121. * i.Core STM32MP1 needs to mount on top of this Carrier board
  122. for creating complete i.Core STM32MP1 C.TOUCH 2.0 board.
  123. config TARGET_DH_STM32MP1_PDK2
  124. bool "DH STM32MP1 PDK2"
  125. select STM32MP15x
  126. imply BOOTCOUNT_LIMIT
  127. imply CMD_BOOTCOUNT
  128. help
  129. Target the DH PDK2 development kit with STM32MP15x SoM.
  130. endchoice
  131. config SYS_TEXT_BASE
  132. default 0xC0100000
  133. config NR_DRAM_BANKS
  134. default 1
  135. config DDR_CACHEABLE_SIZE
  136. hex "Size of the DDR marked cacheable in pre-reloc stage"
  137. default 0x10000000 if TFABOOT
  138. default 0x40000000
  139. help
  140. Define the size of the DDR marked as cacheable in U-Boot
  141. pre-reloc stage.
  142. This option can be useful to avoid speculatif access
  143. to secured area of DDR used by TF-A or OP-TEE before U-Boot
  144. initialization.
  145. The areas marked "no-map" in device tree should be located
  146. before this limit: STM32_DDR_BASE + DDR_CACHEABLE_SIZE.
  147. config SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2
  148. hex "Partition on MMC2 to use to load U-Boot from"
  149. depends on SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
  150. default 1
  151. help
  152. Partition on the second MMC to load U-Boot from when the MMC is being
  153. used in raw mode
  154. config STM32_ETZPC
  155. bool "STM32 Extended TrustZone Protection"
  156. depends on STM32MP15x
  157. default y
  158. help
  159. Say y to enable STM32 Extended TrustZone Protection
  160. config STM32_ECDSA_VERIFY
  161. bool "STM32 ECDSA verification via the ROM API"
  162. depends on SPL_ECDSA_VERIFY
  163. default y
  164. help
  165. Say y to enable the uclass driver for ECDSA verification using the
  166. ROM API provided on STM32MP.
  167. The ROM API is only available during SPL for now.
  168. config CMD_STM32KEY
  169. bool "command stm32key to fuse public key hash"
  170. help
  171. fuse public key hash in corresponding fuse used to authenticate
  172. binary.
  173. This command is used to evaluate the secure boot on stm32mp SOC,
  174. it is deactivated by default in real products.
  175. config PRE_CON_BUF_ADDR
  176. default 0xC02FF000
  177. config PRE_CON_BUF_SZ
  178. default 4096
  179. config BOOTSTAGE_STASH_ADDR
  180. default 0xC3000000
  181. if BOOTCOUNT_LIMIT
  182. config SYS_BOOTCOUNT_SINGLEWORD
  183. default y
  184. # TAMP_BOOTCOUNT = TAMP_BACKUP_REGISTER(21)
  185. config SYS_BOOTCOUNT_ADDR
  186. default 0x5C00A154
  187. endif
  188. if DEBUG_UART
  189. config DEBUG_UART_BOARD_INIT
  190. default y
  191. # debug on UART4 by default
  192. config DEBUG_UART_BASE
  193. default 0x40010000
  194. # clock source is HSI on reset
  195. config DEBUG_UART_CLOCK
  196. default 64000000
  197. endif
  198. source "arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig"
  199. source "board/dhelectronics/dh_stm32mp1/Kconfig"
  200. source "board/engicam/stm32mp1/Kconfig"
  201. source "board/st/stm32mp1/Kconfig"
  202. endif