board_f.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (c) 2011 The Chromium OS Authors.
  4. * (C) Copyright 2002-2006
  5. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  6. *
  7. * (C) Copyright 2002
  8. * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  9. * Marius Groeger <mgroeger@sysgo.de>
  10. */
  11. #include <common.h>
  12. #include <bloblist.h>
  13. #include <console.h>
  14. #include <cpu.h>
  15. #include <dm.h>
  16. #include <env.h>
  17. #include <env_internal.h>
  18. #include <fdtdec.h>
  19. #include <fs.h>
  20. #include <i2c.h>
  21. #include <initcall.h>
  22. #include <lcd.h>
  23. #include <malloc.h>
  24. #include <mapmem.h>
  25. #include <os.h>
  26. #include <post.h>
  27. #include <relocate.h>
  28. #include <serial.h>
  29. #ifdef CONFIG_SPL
  30. #include <spl.h>
  31. #endif
  32. #include <status_led.h>
  33. #include <sysreset.h>
  34. #include <timer.h>
  35. #include <trace.h>
  36. #include <video.h>
  37. #include <watchdog.h>
  38. #ifdef CONFIG_MACH_TYPE
  39. #include <asm/mach-types.h>
  40. #endif
  41. #if defined(CONFIG_MP) && defined(CONFIG_PPC)
  42. #include <asm/mp.h>
  43. #endif
  44. #include <asm/io.h>
  45. #include <asm/sections.h>
  46. #include <dm/root.h>
  47. #include <linux/errno.h>
  48. /*
  49. * Pointer to initial global data area
  50. *
  51. * Here we initialize it if needed.
  52. */
  53. #ifdef XTRN_DECLARE_GLOBAL_DATA_PTR
  54. #undef XTRN_DECLARE_GLOBAL_DATA_PTR
  55. #define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
  56. DECLARE_GLOBAL_DATA_PTR = (gd_t *)(CONFIG_SYS_INIT_GD_ADDR);
  57. #else
  58. DECLARE_GLOBAL_DATA_PTR;
  59. #endif
  60. /*
  61. * TODO(sjg@chromium.org): IMO this code should be
  62. * refactored to a single function, something like:
  63. *
  64. * void led_set_state(enum led_colour_t colour, int on);
  65. */
  66. /************************************************************************
  67. * Coloured LED functionality
  68. ************************************************************************
  69. * May be supplied by boards if desired
  70. */
  71. __weak void coloured_LED_init(void) {}
  72. __weak void red_led_on(void) {}
  73. __weak void red_led_off(void) {}
  74. __weak void green_led_on(void) {}
  75. __weak void green_led_off(void) {}
  76. __weak void yellow_led_on(void) {}
  77. __weak void yellow_led_off(void) {}
  78. __weak void blue_led_on(void) {}
  79. __weak void blue_led_off(void) {}
  80. /*
  81. * Why is gd allocated a register? Prior to reloc it might be better to
  82. * just pass it around to each function in this file?
  83. *
  84. * After reloc one could argue that it is hardly used and doesn't need
  85. * to be in a register. Or if it is it should perhaps hold pointers to all
  86. * global data for all modules, so that post-reloc we can avoid the massive
  87. * literal pool we get on ARM. Or perhaps just encourage each module to use
  88. * a structure...
  89. */
  90. #if defined(CONFIG_WATCHDOG) || defined(CONFIG_HW_WATCHDOG)
  91. static int init_func_watchdog_init(void)
  92. {
  93. # if defined(CONFIG_HW_WATCHDOG) && \
  94. (defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \
  95. defined(CONFIG_SH) || \
  96. defined(CONFIG_DESIGNWARE_WATCHDOG) || \
  97. defined(CONFIG_IMX_WATCHDOG))
  98. hw_watchdog_init();
  99. puts(" Watchdog enabled\n");
  100. # endif
  101. WATCHDOG_RESET();
  102. return 0;
  103. }
  104. int init_func_watchdog_reset(void)
  105. {
  106. WATCHDOG_RESET();
  107. return 0;
  108. }
  109. #endif /* CONFIG_WATCHDOG */
  110. __weak void board_add_ram_info(int use_default)
  111. {
  112. /* please define platform specific board_add_ram_info() */
  113. }
  114. static int init_baud_rate(void)
  115. {
  116. gd->baudrate = env_get_ulong("baudrate", 10, CONFIG_BAUDRATE);
  117. return 0;
  118. }
  119. static int display_text_info(void)
  120. {
  121. #if !defined(CONFIG_SANDBOX) && !defined(CONFIG_EFI_APP)
  122. ulong bss_start, bss_end, text_base;
  123. bss_start = (ulong)&__bss_start;
  124. bss_end = (ulong)&__bss_end;
  125. #ifdef CONFIG_SYS_TEXT_BASE
  126. text_base = CONFIG_SYS_TEXT_BASE;
  127. #else
  128. text_base = CONFIG_SYS_MONITOR_BASE;
  129. #endif
  130. debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n",
  131. text_base, bss_start, bss_end);
  132. #endif
  133. return 0;
  134. }
  135. #ifdef CONFIG_SYSRESET
  136. static int print_resetinfo(void)
  137. {
  138. struct udevice *dev;
  139. char status[256];
  140. int ret;
  141. ret = uclass_first_device_err(UCLASS_SYSRESET, &dev);
  142. if (ret) {
  143. debug("%s: No sysreset device found (error: %d)\n",
  144. __func__, ret);
  145. /* Not all boards have sysreset drivers available during early
  146. * boot, so don't fail if one can't be found.
  147. */
  148. return 0;
  149. }
  150. if (!sysreset_get_status(dev, status, sizeof(status)))
  151. printf("%s", status);
  152. return 0;
  153. }
  154. #endif
  155. #if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
  156. static int print_cpuinfo(void)
  157. {
  158. struct udevice *dev;
  159. char desc[512];
  160. int ret;
  161. ret = uclass_first_device_err(UCLASS_CPU, &dev);
  162. if (ret) {
  163. debug("%s: Could not get CPU device (err = %d)\n",
  164. __func__, ret);
  165. return ret;
  166. }
  167. ret = cpu_get_desc(dev, desc, sizeof(desc));
  168. if (ret) {
  169. debug("%s: Could not get CPU description (err = %d)\n",
  170. dev->name, ret);
  171. return ret;
  172. }
  173. printf("CPU: %s\n", desc);
  174. return 0;
  175. }
  176. #endif
  177. static int announce_dram_init(void)
  178. {
  179. puts("DRAM: ");
  180. return 0;
  181. }
  182. static int show_dram_config(void)
  183. {
  184. unsigned long long size;
  185. #ifdef CONFIG_NR_DRAM_BANKS
  186. int i;
  187. debug("\nRAM Configuration:\n");
  188. for (i = size = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
  189. size += gd->bd->bi_dram[i].size;
  190. debug("Bank #%d: %llx ", i,
  191. (unsigned long long)(gd->bd->bi_dram[i].start));
  192. #ifdef DEBUG
  193. print_size(gd->bd->bi_dram[i].size, "\n");
  194. #endif
  195. }
  196. debug("\nDRAM: ");
  197. #else
  198. size = gd->ram_size;
  199. #endif
  200. print_size(size, "");
  201. board_add_ram_info(0);
  202. putc('\n');
  203. return 0;
  204. }
  205. __weak int dram_init_banksize(void)
  206. {
  207. #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE)
  208. gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
  209. gd->bd->bi_dram[0].size = get_effective_memsize();
  210. #endif
  211. return 0;
  212. }
  213. #if defined(CONFIG_SYS_I2C)
  214. static int init_func_i2c(void)
  215. {
  216. puts("I2C: ");
  217. #ifdef CONFIG_SYS_I2C
  218. i2c_init_all();
  219. #else
  220. i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
  221. #endif
  222. puts("ready\n");
  223. return 0;
  224. }
  225. #endif
  226. #if defined(CONFIG_VID)
  227. __weak int init_func_vid(void)
  228. {
  229. return 0;
  230. }
  231. #endif
  232. static int setup_mon_len(void)
  233. {
  234. #if defined(__ARM__) || defined(__MICROBLAZE__)
  235. gd->mon_len = (ulong)&__bss_end - (ulong)_start;
  236. #elif defined(CONFIG_SANDBOX) || defined(CONFIG_EFI_APP)
  237. gd->mon_len = (ulong)&_end - (ulong)_init;
  238. #elif defined(CONFIG_NIOS2) || defined(CONFIG_XTENSA)
  239. gd->mon_len = CONFIG_SYS_MONITOR_LEN;
  240. #elif defined(CONFIG_NDS32) || defined(CONFIG_SH) || defined(CONFIG_RISCV)
  241. gd->mon_len = (ulong)(&__bss_end) - (ulong)(&_start);
  242. #elif defined(CONFIG_SYS_MONITOR_BASE)
  243. /* TODO: use (ulong)&__bss_end - (ulong)&__text_start; ? */
  244. gd->mon_len = (ulong)&__bss_end - CONFIG_SYS_MONITOR_BASE;
  245. #endif
  246. return 0;
  247. }
  248. static int setup_spl_handoff(void)
  249. {
  250. #if CONFIG_IS_ENABLED(HANDOFF)
  251. gd->spl_handoff = bloblist_find(BLOBLISTT_SPL_HANDOFF,
  252. sizeof(struct spl_handoff));
  253. debug("Found SPL hand-off info %p\n", gd->spl_handoff);
  254. #endif
  255. return 0;
  256. }
  257. __weak int arch_cpu_init(void)
  258. {
  259. return 0;
  260. }
  261. __weak int mach_cpu_init(void)
  262. {
  263. return 0;
  264. }
  265. /* Get the top of usable RAM */
  266. __weak ulong board_get_usable_ram_top(ulong total_size)
  267. {
  268. #ifdef CONFIG_SYS_SDRAM_BASE
  269. /*
  270. * Detect whether we have so much RAM that it goes past the end of our
  271. * 32-bit address space. If so, clip the usable RAM so it doesn't.
  272. */
  273. if (gd->ram_top < CONFIG_SYS_SDRAM_BASE)
  274. /*
  275. * Will wrap back to top of 32-bit space when reservations
  276. * are made.
  277. */
  278. return 0;
  279. #endif
  280. return gd->ram_top;
  281. }
  282. static int setup_dest_addr(void)
  283. {
  284. debug("Monitor len: %08lX\n", gd->mon_len);
  285. /*
  286. * Ram is setup, size stored in gd !!
  287. */
  288. debug("Ram size: %08lX\n", (ulong)gd->ram_size);
  289. #if defined(CONFIG_SYS_MEM_TOP_HIDE)
  290. /*
  291. * Subtract specified amount of memory to hide so that it won't
  292. * get "touched" at all by U-Boot. By fixing up gd->ram_size
  293. * the Linux kernel should now get passed the now "corrected"
  294. * memory size and won't touch it either. This should work
  295. * for arch/ppc and arch/powerpc. Only Linux board ports in
  296. * arch/powerpc with bootwrapper support, that recalculate the
  297. * memory size from the SDRAM controller setup will have to
  298. * get fixed.
  299. */
  300. gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
  301. #endif
  302. #ifdef CONFIG_SYS_SDRAM_BASE
  303. gd->ram_base = CONFIG_SYS_SDRAM_BASE;
  304. #endif
  305. gd->ram_top = gd->ram_base + get_effective_memsize();
  306. gd->ram_top = board_get_usable_ram_top(gd->mon_len);
  307. gd->relocaddr = gd->ram_top;
  308. debug("Ram top: %08lX\n", (ulong)gd->ram_top);
  309. #if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
  310. /*
  311. * We need to make sure the location we intend to put secondary core
  312. * boot code is reserved and not used by any part of u-boot
  313. */
  314. if (gd->relocaddr > determine_mp_bootpg(NULL)) {
  315. gd->relocaddr = determine_mp_bootpg(NULL);
  316. debug("Reserving MP boot page to %08lx\n", gd->relocaddr);
  317. }
  318. #endif
  319. return 0;
  320. }
  321. #ifdef CONFIG_PRAM
  322. /* reserve protected RAM */
  323. static int reserve_pram(void)
  324. {
  325. ulong reg;
  326. reg = env_get_ulong("pram", 10, CONFIG_PRAM);
  327. gd->relocaddr -= (reg << 10); /* size is in kB */
  328. debug("Reserving %ldk for protected RAM at %08lx\n", reg,
  329. gd->relocaddr);
  330. return 0;
  331. }
  332. #endif /* CONFIG_PRAM */
  333. /* Round memory pointer down to next 4 kB limit */
  334. static int reserve_round_4k(void)
  335. {
  336. gd->relocaddr &= ~(4096 - 1);
  337. return 0;
  338. }
  339. #ifdef CONFIG_ARM
  340. __weak int reserve_mmu(void)
  341. {
  342. #if !(CONFIG_IS_ENABLED(SYS_ICACHE_OFF) && CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
  343. /* reserve TLB table */
  344. gd->arch.tlb_size = PGTABLE_SIZE;
  345. gd->relocaddr -= gd->arch.tlb_size;
  346. /* round down to next 64 kB limit */
  347. gd->relocaddr &= ~(0x10000 - 1);
  348. gd->arch.tlb_addr = gd->relocaddr;
  349. debug("TLB table from %08lx to %08lx\n", gd->arch.tlb_addr,
  350. gd->arch.tlb_addr + gd->arch.tlb_size);
  351. #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
  352. /*
  353. * Record allocated tlb_addr in case gd->tlb_addr to be overwritten
  354. * with location within secure ram.
  355. */
  356. gd->arch.tlb_allocated = gd->arch.tlb_addr;
  357. #endif
  358. #endif
  359. return 0;
  360. }
  361. #endif
  362. static int reserve_video(void)
  363. {
  364. #ifdef CONFIG_DM_VIDEO
  365. ulong addr;
  366. int ret;
  367. addr = gd->relocaddr;
  368. ret = video_reserve(&addr);
  369. if (ret)
  370. return ret;
  371. gd->relocaddr = addr;
  372. #elif defined(CONFIG_LCD)
  373. # ifdef CONFIG_FB_ADDR
  374. gd->fb_base = CONFIG_FB_ADDR;
  375. # else
  376. /* reserve memory for LCD display (always full pages) */
  377. gd->relocaddr = lcd_setmem(gd->relocaddr);
  378. gd->fb_base = gd->relocaddr;
  379. # endif /* CONFIG_FB_ADDR */
  380. #endif
  381. return 0;
  382. }
  383. static int reserve_trace(void)
  384. {
  385. #ifdef CONFIG_TRACE
  386. gd->relocaddr -= CONFIG_TRACE_BUFFER_SIZE;
  387. gd->trace_buff = map_sysmem(gd->relocaddr, CONFIG_TRACE_BUFFER_SIZE);
  388. debug("Reserving %luk for trace data at: %08lx\n",
  389. (unsigned long)CONFIG_TRACE_BUFFER_SIZE >> 10, gd->relocaddr);
  390. #endif
  391. return 0;
  392. }
  393. static int reserve_uboot(void)
  394. {
  395. if (!(gd->flags & GD_FLG_SKIP_RELOC)) {
  396. /*
  397. * reserve memory for U-Boot code, data & bss
  398. * round down to next 4 kB limit
  399. */
  400. gd->relocaddr -= gd->mon_len;
  401. gd->relocaddr &= ~(4096 - 1);
  402. #if defined(CONFIG_E500) || defined(CONFIG_MIPS)
  403. /* round down to next 64 kB limit so that IVPR stays aligned */
  404. gd->relocaddr &= ~(65536 - 1);
  405. #endif
  406. debug("Reserving %ldk for U-Boot at: %08lx\n",
  407. gd->mon_len >> 10, gd->relocaddr);
  408. }
  409. gd->start_addr_sp = gd->relocaddr;
  410. return 0;
  411. }
  412. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  413. static int reserve_noncached(void)
  414. {
  415. /*
  416. * The value of gd->start_addr_sp must match the value of malloc_start
  417. * calculated in boatrd_f.c:initr_malloc(), which is passed to
  418. * board_r.c:mem_malloc_init() and then used by
  419. * cache.c:noncached_init()
  420. *
  421. * These calculations must match the code in cache.c:noncached_init()
  422. */
  423. gd->start_addr_sp = ALIGN(gd->start_addr_sp, MMU_SECTION_SIZE) -
  424. MMU_SECTION_SIZE;
  425. gd->start_addr_sp -= ALIGN(CONFIG_SYS_NONCACHED_MEMORY,
  426. MMU_SECTION_SIZE);
  427. debug("Reserving %dM for noncached_alloc() at: %08lx\n",
  428. CONFIG_SYS_NONCACHED_MEMORY >> 20, gd->start_addr_sp);
  429. return 0;
  430. }
  431. #endif
  432. /* reserve memory for malloc() area */
  433. static int reserve_malloc(void)
  434. {
  435. gd->start_addr_sp = gd->start_addr_sp - TOTAL_MALLOC_LEN;
  436. debug("Reserving %dk for malloc() at: %08lx\n",
  437. TOTAL_MALLOC_LEN >> 10, gd->start_addr_sp);
  438. #ifdef CONFIG_SYS_NONCACHED_MEMORY
  439. reserve_noncached();
  440. #endif
  441. return 0;
  442. }
  443. /* (permanently) allocate a Board Info struct */
  444. static int reserve_board(void)
  445. {
  446. if (!gd->bd) {
  447. gd->start_addr_sp -= sizeof(bd_t);
  448. gd->bd = (bd_t *)map_sysmem(gd->start_addr_sp, sizeof(bd_t));
  449. memset(gd->bd, '\0', sizeof(bd_t));
  450. debug("Reserving %zu Bytes for Board Info at: %08lx\n",
  451. sizeof(bd_t), gd->start_addr_sp);
  452. }
  453. return 0;
  454. }
  455. static int setup_machine(void)
  456. {
  457. #ifdef CONFIG_MACH_TYPE
  458. gd->bd->bi_arch_number = CONFIG_MACH_TYPE; /* board id for Linux */
  459. #endif
  460. return 0;
  461. }
  462. static int reserve_global_data(void)
  463. {
  464. gd->start_addr_sp -= sizeof(gd_t);
  465. gd->new_gd = (gd_t *)map_sysmem(gd->start_addr_sp, sizeof(gd_t));
  466. debug("Reserving %zu Bytes for Global Data at: %08lx\n",
  467. sizeof(gd_t), gd->start_addr_sp);
  468. return 0;
  469. }
  470. static int reserve_fdt(void)
  471. {
  472. #ifndef CONFIG_OF_EMBED
  473. /*
  474. * If the device tree is sitting immediately above our image then we
  475. * must relocate it. If it is embedded in the data section, then it
  476. * will be relocated with other data.
  477. */
  478. if (gd->fdt_blob) {
  479. gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32);
  480. gd->start_addr_sp -= gd->fdt_size;
  481. gd->new_fdt = map_sysmem(gd->start_addr_sp, gd->fdt_size);
  482. debug("Reserving %lu Bytes for FDT at: %08lx\n",
  483. gd->fdt_size, gd->start_addr_sp);
  484. }
  485. #endif
  486. return 0;
  487. }
  488. static int reserve_bootstage(void)
  489. {
  490. #ifdef CONFIG_BOOTSTAGE
  491. int size = bootstage_get_size();
  492. gd->start_addr_sp -= size;
  493. gd->new_bootstage = map_sysmem(gd->start_addr_sp, size);
  494. debug("Reserving %#x Bytes for bootstage at: %08lx\n", size,
  495. gd->start_addr_sp);
  496. #endif
  497. return 0;
  498. }
  499. __weak int arch_reserve_stacks(void)
  500. {
  501. return 0;
  502. }
  503. static int reserve_stacks(void)
  504. {
  505. /* make stack pointer 16-byte aligned */
  506. gd->start_addr_sp -= 16;
  507. gd->start_addr_sp &= ~0xf;
  508. /*
  509. * let the architecture-specific code tailor gd->start_addr_sp and
  510. * gd->irq_sp
  511. */
  512. return arch_reserve_stacks();
  513. }
  514. static int reserve_bloblist(void)
  515. {
  516. #ifdef CONFIG_BLOBLIST
  517. gd->start_addr_sp &= ~0xf;
  518. gd->start_addr_sp -= CONFIG_BLOBLIST_SIZE;
  519. gd->new_bloblist = map_sysmem(gd->start_addr_sp, CONFIG_BLOBLIST_SIZE);
  520. #endif
  521. return 0;
  522. }
  523. static int display_new_sp(void)
  524. {
  525. debug("New Stack Pointer is: %08lx\n", gd->start_addr_sp);
  526. return 0;
  527. }
  528. #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
  529. defined(CONFIG_SH)
  530. static int setup_board_part1(void)
  531. {
  532. bd_t *bd = gd->bd;
  533. /*
  534. * Save local variables to board info struct
  535. */
  536. bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
  537. bd->bi_memsize = gd->ram_size; /* size in bytes */
  538. #ifdef CONFIG_SYS_SRAM_BASE
  539. bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
  540. bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
  541. #endif
  542. #if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
  543. bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
  544. #endif
  545. #if defined(CONFIG_M68K)
  546. bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
  547. #endif
  548. #if defined(CONFIG_MPC83xx)
  549. bd->bi_immrbar = CONFIG_SYS_IMMR;
  550. #endif
  551. return 0;
  552. }
  553. #endif
  554. #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
  555. static int setup_board_part2(void)
  556. {
  557. bd_t *bd = gd->bd;
  558. bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
  559. bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
  560. #if defined(CONFIG_CPM2)
  561. bd->bi_cpmfreq = gd->arch.cpm_clk;
  562. bd->bi_brgfreq = gd->arch.brg_clk;
  563. bd->bi_sccfreq = gd->arch.scc_clk;
  564. bd->bi_vco = gd->arch.vco_out;
  565. #endif /* CONFIG_CPM2 */
  566. #if defined(CONFIG_M68K) && defined(CONFIG_PCI)
  567. bd->bi_pcifreq = gd->pci_clk;
  568. #endif
  569. #if defined(CONFIG_EXTRA_CLOCK)
  570. bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
  571. bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
  572. bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
  573. #endif
  574. return 0;
  575. }
  576. #endif
  577. #ifdef CONFIG_POST
  578. static int init_post(void)
  579. {
  580. post_bootmode_init();
  581. post_run(NULL, POST_ROM | post_bootmode_get(0));
  582. return 0;
  583. }
  584. #endif
  585. static int reloc_fdt(void)
  586. {
  587. #ifndef CONFIG_OF_EMBED
  588. if (gd->flags & GD_FLG_SKIP_RELOC)
  589. return 0;
  590. if (gd->new_fdt) {
  591. memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size);
  592. gd->fdt_blob = gd->new_fdt;
  593. }
  594. #endif
  595. return 0;
  596. }
  597. static int reloc_bootstage(void)
  598. {
  599. #ifdef CONFIG_BOOTSTAGE
  600. if (gd->flags & GD_FLG_SKIP_RELOC)
  601. return 0;
  602. if (gd->new_bootstage) {
  603. int size = bootstage_get_size();
  604. debug("Copying bootstage from %p to %p, size %x\n",
  605. gd->bootstage, gd->new_bootstage, size);
  606. memcpy(gd->new_bootstage, gd->bootstage, size);
  607. gd->bootstage = gd->new_bootstage;
  608. bootstage_relocate();
  609. }
  610. #endif
  611. return 0;
  612. }
  613. static int reloc_bloblist(void)
  614. {
  615. #ifdef CONFIG_BLOBLIST
  616. if (gd->flags & GD_FLG_SKIP_RELOC)
  617. return 0;
  618. if (gd->new_bloblist) {
  619. int size = CONFIG_BLOBLIST_SIZE;
  620. debug("Copying bloblist from %p to %p, size %x\n",
  621. gd->bloblist, gd->new_bloblist, size);
  622. memcpy(gd->new_bloblist, gd->bloblist, size);
  623. gd->bloblist = gd->new_bloblist;
  624. }
  625. #endif
  626. return 0;
  627. }
  628. static int setup_reloc(void)
  629. {
  630. if (gd->flags & GD_FLG_SKIP_RELOC) {
  631. debug("Skipping relocation due to flag\n");
  632. return 0;
  633. }
  634. #ifdef CONFIG_SYS_TEXT_BASE
  635. #ifdef ARM
  636. gd->reloc_off = gd->relocaddr - (unsigned long)__image_copy_start;
  637. #elif defined(CONFIG_M68K)
  638. /*
  639. * On all ColdFire arch cpu, monitor code starts always
  640. * just after the default vector table location, so at 0x400
  641. */
  642. gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400);
  643. #elif !defined(CONFIG_SANDBOX)
  644. gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE;
  645. #endif
  646. #endif
  647. memcpy(gd->new_gd, (char *)gd, sizeof(gd_t));
  648. debug("Relocation Offset is: %08lx\n", gd->reloc_off);
  649. debug("Relocating to %08lx, new gd at %08lx, sp at %08lx\n",
  650. gd->relocaddr, (ulong)map_to_sysmem(gd->new_gd),
  651. gd->start_addr_sp);
  652. return 0;
  653. }
  654. #ifdef CONFIG_OF_BOARD_FIXUP
  655. static int fix_fdt(void)
  656. {
  657. return board_fix_fdt((void *)gd->fdt_blob);
  658. }
  659. #endif
  660. /* ARM calls relocate_code from its crt0.S */
  661. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  662. !CONFIG_IS_ENABLED(X86_64)
  663. static int jump_to_copy(void)
  664. {
  665. if (gd->flags & GD_FLG_SKIP_RELOC)
  666. return 0;
  667. /*
  668. * x86 is special, but in a nice way. It uses a trampoline which
  669. * enables the dcache if possible.
  670. *
  671. * For now, other archs use relocate_code(), which is implemented
  672. * similarly for all archs. When we do generic relocation, hopefully
  673. * we can make all archs enable the dcache prior to relocation.
  674. */
  675. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  676. /*
  677. * SDRAM and console are now initialised. The final stack can now
  678. * be setup in SDRAM. Code execution will continue in Flash, but
  679. * with the stack in SDRAM and Global Data in temporary memory
  680. * (CPU cache)
  681. */
  682. arch_setup_gd(gd->new_gd);
  683. board_init_f_r_trampoline(gd->start_addr_sp);
  684. #else
  685. relocate_code(gd->start_addr_sp, gd->new_gd, gd->relocaddr);
  686. #endif
  687. return 0;
  688. }
  689. #endif
  690. /* Record the board_init_f() bootstage (after arch_cpu_init()) */
  691. static int initf_bootstage(void)
  692. {
  693. bool from_spl = IS_ENABLED(CONFIG_SPL_BOOTSTAGE) &&
  694. IS_ENABLED(CONFIG_BOOTSTAGE_STASH);
  695. int ret;
  696. ret = bootstage_init(!from_spl);
  697. if (ret)
  698. return ret;
  699. if (from_spl) {
  700. const void *stash = map_sysmem(CONFIG_BOOTSTAGE_STASH_ADDR,
  701. CONFIG_BOOTSTAGE_STASH_SIZE);
  702. ret = bootstage_unstash(stash, CONFIG_BOOTSTAGE_STASH_SIZE);
  703. if (ret && ret != -ENOENT) {
  704. debug("Failed to unstash bootstage: err=%d\n", ret);
  705. return ret;
  706. }
  707. }
  708. bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_F, "board_init_f");
  709. return 0;
  710. }
  711. static int initf_console_record(void)
  712. {
  713. #if defined(CONFIG_CONSOLE_RECORD) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  714. return console_record_init();
  715. #else
  716. return 0;
  717. #endif
  718. }
  719. static int initf_dm(void)
  720. {
  721. #if defined(CONFIG_DM) && CONFIG_VAL(SYS_MALLOC_F_LEN)
  722. int ret;
  723. bootstage_start(BOOTSTATE_ID_ACCUM_DM_F, "dm_f");
  724. ret = dm_init_and_scan(true);
  725. bootstage_accum(BOOTSTATE_ID_ACCUM_DM_F);
  726. if (ret)
  727. return ret;
  728. #endif
  729. #ifdef CONFIG_TIMER_EARLY
  730. ret = dm_timer_init();
  731. if (ret)
  732. return ret;
  733. #endif
  734. return 0;
  735. }
  736. /* Architecture-specific memory reservation */
  737. __weak int reserve_arch(void)
  738. {
  739. return 0;
  740. }
  741. __weak int arch_cpu_init_dm(void)
  742. {
  743. return 0;
  744. }
  745. static const init_fnc_t init_sequence_f[] = {
  746. setup_mon_len,
  747. #ifdef CONFIG_OF_CONTROL
  748. fdtdec_setup,
  749. #endif
  750. #ifdef CONFIG_TRACE_EARLY
  751. trace_early_init,
  752. #endif
  753. initf_malloc,
  754. log_init,
  755. initf_bootstage, /* uses its own timer, so does not need DM */
  756. #ifdef CONFIG_BLOBLIST
  757. bloblist_init,
  758. #endif
  759. setup_spl_handoff,
  760. initf_console_record,
  761. #if defined(CONFIG_HAVE_FSP)
  762. arch_fsp_init,
  763. #endif
  764. arch_cpu_init, /* basic arch cpu dependent setup */
  765. mach_cpu_init, /* SoC/machine dependent CPU setup */
  766. initf_dm,
  767. arch_cpu_init_dm,
  768. #if defined(CONFIG_BOARD_EARLY_INIT_F)
  769. board_early_init_f,
  770. #endif
  771. #if defined(CONFIG_PPC) || defined(CONFIG_SYS_FSL_CLK) || defined(CONFIG_M68K)
  772. /* get CPU and bus clocks according to the environment variable */
  773. get_clocks, /* get CPU and bus clocks (etc.) */
  774. #endif
  775. #if !defined(CONFIG_M68K)
  776. timer_init, /* initialize timer */
  777. #endif
  778. #if defined(CONFIG_BOARD_POSTCLK_INIT)
  779. board_postclk_init,
  780. #endif
  781. env_init, /* initialize environment */
  782. init_baud_rate, /* initialze baudrate settings */
  783. serial_init, /* serial communications setup */
  784. console_init_f, /* stage 1 init of console */
  785. display_options, /* say that we are here */
  786. display_text_info, /* show debugging info if required */
  787. #if defined(CONFIG_PPC) || defined(CONFIG_SH) || defined(CONFIG_X86)
  788. checkcpu,
  789. #endif
  790. #if defined(CONFIG_SYSRESET)
  791. print_resetinfo,
  792. #endif
  793. #if defined(CONFIG_DISPLAY_CPUINFO)
  794. print_cpuinfo, /* display cpu info (and speed) */
  795. #endif
  796. #if defined(CONFIG_DTB_RESELECT)
  797. embedded_dtb_select,
  798. #endif
  799. #if defined(CONFIG_DISPLAY_BOARDINFO)
  800. show_board_info,
  801. #endif
  802. INIT_FUNC_WATCHDOG_INIT
  803. #if defined(CONFIG_MISC_INIT_F)
  804. misc_init_f,
  805. #endif
  806. INIT_FUNC_WATCHDOG_RESET
  807. #if defined(CONFIG_SYS_I2C)
  808. init_func_i2c,
  809. #endif
  810. #if defined(CONFIG_VID) && !defined(CONFIG_SPL)
  811. init_func_vid,
  812. #endif
  813. announce_dram_init,
  814. dram_init, /* configure available RAM banks */
  815. #ifdef CONFIG_POST
  816. post_init_f,
  817. #endif
  818. INIT_FUNC_WATCHDOG_RESET
  819. #if defined(CONFIG_SYS_DRAM_TEST)
  820. testdram,
  821. #endif /* CONFIG_SYS_DRAM_TEST */
  822. INIT_FUNC_WATCHDOG_RESET
  823. #ifdef CONFIG_POST
  824. init_post,
  825. #endif
  826. INIT_FUNC_WATCHDOG_RESET
  827. /*
  828. * Now that we have DRAM mapped and working, we can
  829. * relocate the code and continue running from DRAM.
  830. *
  831. * Reserve memory at end of RAM for (top down in that order):
  832. * - area that won't get touched by U-Boot and Linux (optional)
  833. * - kernel log buffer
  834. * - protected RAM
  835. * - LCD framebuffer
  836. * - monitor code
  837. * - board info struct
  838. */
  839. setup_dest_addr,
  840. #ifdef CONFIG_PRAM
  841. reserve_pram,
  842. #endif
  843. reserve_round_4k,
  844. #ifdef CONFIG_ARM
  845. reserve_mmu,
  846. #endif
  847. reserve_video,
  848. reserve_trace,
  849. reserve_uboot,
  850. reserve_malloc,
  851. reserve_board,
  852. setup_machine,
  853. reserve_global_data,
  854. reserve_fdt,
  855. reserve_bootstage,
  856. reserve_bloblist,
  857. reserve_arch,
  858. reserve_stacks,
  859. dram_init_banksize,
  860. show_dram_config,
  861. #if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
  862. defined(CONFIG_SH)
  863. setup_board_part1,
  864. #endif
  865. #if defined(CONFIG_PPC) || defined(CONFIG_M68K)
  866. INIT_FUNC_WATCHDOG_RESET
  867. setup_board_part2,
  868. #endif
  869. display_new_sp,
  870. #ifdef CONFIG_OF_BOARD_FIXUP
  871. fix_fdt,
  872. #endif
  873. INIT_FUNC_WATCHDOG_RESET
  874. reloc_fdt,
  875. reloc_bootstage,
  876. reloc_bloblist,
  877. setup_reloc,
  878. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  879. copy_uboot_to_ram,
  880. do_elf_reloc_fixups,
  881. clear_bss,
  882. #endif
  883. #if defined(CONFIG_XTENSA)
  884. clear_bss,
  885. #endif
  886. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  887. !CONFIG_IS_ENABLED(X86_64)
  888. jump_to_copy,
  889. #endif
  890. NULL,
  891. };
  892. void board_init_f(ulong boot_flags)
  893. {
  894. gd->flags = boot_flags;
  895. gd->have_console = 0;
  896. if (initcall_run_list(init_sequence_f))
  897. hang();
  898. #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) && \
  899. !defined(CONFIG_EFI_APP) && !CONFIG_IS_ENABLED(X86_64) && \
  900. !defined(CONFIG_ARC)
  901. /* NOTREACHED - jump_to_copy() does not return */
  902. hang();
  903. #endif
  904. }
  905. #if defined(CONFIG_X86) || defined(CONFIG_ARC)
  906. /*
  907. * For now this code is only used on x86.
  908. *
  909. * init_sequence_f_r is the list of init functions which are run when
  910. * U-Boot is executing from Flash with a semi-limited 'C' environment.
  911. * The following limitations must be considered when implementing an
  912. * '_f_r' function:
  913. * - 'static' variables are read-only
  914. * - Global Data (gd->xxx) is read/write
  915. *
  916. * The '_f_r' sequence must, as a minimum, copy U-Boot to RAM (if
  917. * supported). It _should_, if possible, copy global data to RAM and
  918. * initialise the CPU caches (to speed up the relocation process)
  919. *
  920. * NOTE: At present only x86 uses this route, but it is intended that
  921. * all archs will move to this when generic relocation is implemented.
  922. */
  923. static const init_fnc_t init_sequence_f_r[] = {
  924. #if !CONFIG_IS_ENABLED(X86_64)
  925. init_cache_f_r,
  926. #endif
  927. NULL,
  928. };
  929. void board_init_f_r(void)
  930. {
  931. if (initcall_run_list(init_sequence_f_r))
  932. hang();
  933. /*
  934. * The pre-relocation drivers may be using memory that has now gone
  935. * away. Mark serial as unavailable - this will fall back to the debug
  936. * UART if available.
  937. *
  938. * Do the same with log drivers since the memory may not be available.
  939. */
  940. gd->flags &= ~(GD_FLG_SERIAL_READY | GD_FLG_LOG_READY);
  941. #ifdef CONFIG_TIMER
  942. gd->timer = NULL;
  943. #endif
  944. /*
  945. * U-Boot has been copied into SDRAM, the BSS has been cleared etc.
  946. * Transfer execution from Flash to RAM by calculating the address
  947. * of the in-RAM copy of board_init_r() and calling it
  948. */
  949. (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr);
  950. /* NOTREACHED - board_init_r() does not return */
  951. hang();
  952. }
  953. #endif /* CONFIG_X86 */