cache.h 1.5 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2019 Intel Corporation <www.intel.com>
  4. */
  5. #ifndef __CACHE_H
  6. #define __CACHE_H
  7. struct udevice;
  8. /*
  9. * Structure for the cache controller
  10. */
  11. struct cache_info {
  12. phys_addr_t base; /* Base physical address of cache device. */
  13. };
  14. struct cache_ops {
  15. /**
  16. * get_info() - Get basic cache info
  17. *
  18. * @dev: Device to check (UCLASS_CACHE)
  19. * @info: Place to put info
  20. * @return 0 if OK, -ve on error
  21. */
  22. int (*get_info)(struct udevice *dev, struct cache_info *info);
  23. /**
  24. * enable() - Enable cache
  25. *
  26. * @dev: Device to check (UCLASS_CACHE)
  27. * @return 0 if OK, -ve on error
  28. */
  29. int (*enable)(struct udevice *dev);
  30. /**
  31. * disable() - Flush and disable cache
  32. *
  33. * @dev: Device to check (UCLASS_CACHE)
  34. * @return 0 if OK, -ve on error
  35. */
  36. int (*disable)(struct udevice *dev);
  37. };
  38. #define cache_get_ops(dev) ((struct cache_ops *)(dev)->driver->ops)
  39. /**
  40. * cache_get_info() - Get information about a cache controller
  41. *
  42. * @dev: Device to check (UCLASS_CACHE)
  43. * @info: Returns cache info
  44. * @return 0 if OK, -ve on error
  45. */
  46. int cache_get_info(struct udevice *dev, struct cache_info *info);
  47. /**
  48. * cache_enable() - Enable cache
  49. *
  50. * @dev: Device to check (UCLASS_CACHE)
  51. * @return 0 if OK, -ve on error
  52. */
  53. int cache_enable(struct udevice *dev);
  54. /**
  55. * cache_disable() - Flush and disable cache
  56. *
  57. * @dev: Device to check (UCLASS_CACHE)
  58. * @return 0 if OK, -ve on error
  59. */
  60. int cache_disable(struct udevice *dev);
  61. #endif