spr_nand.c 3.7 KB

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  1. /*
  2. * (C) Copyright 2009
  3. * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <nand.h>
  25. #include <linux/mtd/nand_ecc.h>
  26. #include <asm/io.h>
  27. #include <asm/arch/hardware.h>
  28. #include <asm/arch/spr_nand.h>
  29. static struct fsmc_regs *const fsmc_regs_p =
  30. (struct fsmc_regs *)CONFIG_SPEAR_FSMCBASE;
  31. static struct nand_ecclayout spear_nand_ecclayout = {
  32. .eccbytes = 24,
  33. .eccpos = {2, 3, 4, 18, 19, 20, 34, 35, 36, 50, 51, 52,
  34. 66, 67, 68, 82, 83, 84, 98, 99, 100, 114, 115, 116},
  35. .oobfree = {
  36. {.offset = 8, .length = 8},
  37. {.offset = 24, .length = 8},
  38. {.offset = 40, .length = 8},
  39. {.offset = 56, .length = 8},
  40. {.offset = 72, .length = 8},
  41. {.offset = 88, .length = 8},
  42. {.offset = 104, .length = 8},
  43. {.offset = 120, .length = 8}
  44. }
  45. };
  46. static void spear_nand_hwcontrol(struct mtd_info *mtd, int cmd, uint ctrl)
  47. {
  48. struct nand_chip *this = mtd->priv;
  49. ulong IO_ADDR_W;
  50. if (ctrl & NAND_CTRL_CHANGE) {
  51. IO_ADDR_W = (ulong)this->IO_ADDR_W;
  52. IO_ADDR_W &= ~(CONFIG_SYS_NAND_CLE | CONFIG_SYS_NAND_ALE);
  53. if (ctrl & NAND_CLE)
  54. IO_ADDR_W |= CONFIG_SYS_NAND_CLE;
  55. if (ctrl & NAND_ALE)
  56. IO_ADDR_W |= CONFIG_SYS_NAND_ALE;
  57. if (ctrl & NAND_NCE) {
  58. writel(readl(&fsmc_regs_p->genmemctrl_pc) |
  59. FSMC_ENABLE, &fsmc_regs_p->genmemctrl_pc);
  60. } else {
  61. writel(readl(&fsmc_regs_p->genmemctrl_pc) &
  62. ~FSMC_ENABLE, &fsmc_regs_p->genmemctrl_pc);
  63. }
  64. this->IO_ADDR_W = (void *)IO_ADDR_W;
  65. }
  66. if (cmd != NAND_CMD_NONE)
  67. writeb(cmd, this->IO_ADDR_W);
  68. }
  69. static int spear_read_hwecc(struct mtd_info *mtd,
  70. const u_char *data, u_char ecc[3])
  71. {
  72. u_int ecc_tmp;
  73. /* read the h/w ECC */
  74. ecc_tmp = readl(&fsmc_regs_p->genmemctrl_ecc);
  75. ecc[0] = (u_char) (ecc_tmp & 0xFF);
  76. ecc[1] = (u_char) ((ecc_tmp & 0xFF00) >> 8);
  77. ecc[2] = (u_char) ((ecc_tmp & 0xFF0000) >> 16);
  78. return 0;
  79. }
  80. void spear_enable_hwecc(struct mtd_info *mtd, int mode)
  81. {
  82. writel(readl(&fsmc_regs_p->genmemctrl_pc) & ~0x80,
  83. &fsmc_regs_p->genmemctrl_pc);
  84. writel(readl(&fsmc_regs_p->genmemctrl_pc) & ~FSMC_ECCEN,
  85. &fsmc_regs_p->genmemctrl_pc);
  86. writel(readl(&fsmc_regs_p->genmemctrl_pc) | FSMC_ECCEN,
  87. &fsmc_regs_p->genmemctrl_pc);
  88. }
  89. int spear_nand_init(struct nand_chip *nand)
  90. {
  91. writel(FSMC_DEVWID_8 | FSMC_DEVTYPE_NAND | FSMC_ENABLE | FSMC_WAITON,
  92. &fsmc_regs_p->genmemctrl_pc);
  93. writel(readl(&fsmc_regs_p->genmemctrl_pc) | FSMC_TCLR_1 | FSMC_TAR_1,
  94. &fsmc_regs_p->genmemctrl_pc);
  95. writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0,
  96. &fsmc_regs_p->genmemctrl_comm);
  97. writel(FSMC_THIZ_1 | FSMC_THOLD_4 | FSMC_TWAIT_6 | FSMC_TSET_0,
  98. &fsmc_regs_p->genmemctrl_attrib);
  99. nand->options = 0;
  100. nand->ecc.mode = NAND_ECC_HW;
  101. nand->ecc.layout = &spear_nand_ecclayout;
  102. nand->ecc.size = 512;
  103. nand->ecc.bytes = 3;
  104. nand->ecc.calculate = spear_read_hwecc;
  105. nand->ecc.hwctl = spear_enable_hwecc;
  106. nand->ecc.correct = nand_correct_data;
  107. nand->cmd_ctrl = spear_nand_hwcontrol;
  108. return 0;
  109. }