spr_misc.c 7.1 KB

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  1. /*
  2. * (C) Copyright 2009
  3. * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. #include <common.h>
  24. #include <command.h>
  25. #include <i2c.h>
  26. #include <net.h>
  27. #include <asm/io.h>
  28. #include <asm/arch/hardware.h>
  29. #include <asm/arch/spr_emi.h>
  30. #include <asm/arch/spr_xloader_table.h>
  31. #include <asm/arch/spr_defs.h>
  32. #define CPU 0
  33. #define DDR 1
  34. #define SRAM_REL 0xD2801000
  35. DECLARE_GLOBAL_DATA_PTR;
  36. static struct chip_data chip_data;
  37. int dram_init(void)
  38. {
  39. struct xloader_table *xloader_tb =
  40. (struct xloader_table *)XLOADER_TABLE_ADDRESS;
  41. struct xloader_table_1_1 *table_1_1;
  42. struct xloader_table_1_2 *table_1_2;
  43. struct chip_data *chip = &chip_data;
  44. gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  45. gd->bd->bi_dram[0].size = get_ram_size(PHYS_SDRAM_1,
  46. PHYS_SDRAM_1_MAXSIZE);
  47. if (XLOADER_TABLE_VERSION_1_1 == xloader_tb->table_version) {
  48. table_1_1 = &xloader_tb->table.table_1_1;
  49. chip->dramfreq = table_1_1->ddrfreq;
  50. chip->dramtype = table_1_1->ddrtype;
  51. } else if (XLOADER_TABLE_VERSION_1_2 == xloader_tb->table_version) {
  52. table_1_2 = &xloader_tb->table.table_1_2;
  53. chip->dramfreq = table_1_2->ddrfreq;
  54. chip->dramtype = table_1_2->ddrtype;
  55. } else {
  56. chip->dramfreq = -1;
  57. }
  58. return 0;
  59. }
  60. int misc_init_r(void)
  61. {
  62. #if defined(CONFIG_CMD_NET)
  63. uchar mac_id[6];
  64. if (!eth_getenv_enetaddr("ethaddr", mac_id) && !i2c_read_mac(mac_id))
  65. eth_setenv_enetaddr("ethaddr", mac_id);
  66. #endif
  67. setenv("verify", "n");
  68. #if defined(CONFIG_SPEAR_USBTTY)
  69. setenv("stdin", "usbtty");
  70. setenv("stdout", "usbtty");
  71. setenv("stderr", "usbtty");
  72. #endif
  73. return 0;
  74. }
  75. #ifdef CONFIG_SPEAR_EMI
  76. struct cust_emi_para {
  77. unsigned int tap;
  78. unsigned int tsdp;
  79. unsigned int tdpw;
  80. unsigned int tdpr;
  81. unsigned int tdcs;
  82. };
  83. /* EMI timing setting of m28w640hc of linux kernel */
  84. const struct cust_emi_para emi_timing_m28w640hc = {
  85. .tap = 0x10,
  86. .tsdp = 0x05,
  87. .tdpw = 0x0a,
  88. .tdpr = 0x0a,
  89. .tdcs = 0x05,
  90. };
  91. /* EMI timing setting of bootrom */
  92. const struct cust_emi_para emi_timing_bootrom = {
  93. .tap = 0xf,
  94. .tsdp = 0x0,
  95. .tdpw = 0xff,
  96. .tdpr = 0x111,
  97. .tdcs = 0x02,
  98. };
  99. void spear_emi_init(void)
  100. {
  101. const struct cust_emi_para *p = &emi_timing_m28w640hc;
  102. struct emi_regs *emi_regs_p = (struct emi_regs *)CONFIG_SPEAR_EMIBASE;
  103. unsigned int cs;
  104. unsigned int val, tmp;
  105. val = readl(CONFIG_SPEAR_RASBASE);
  106. if (val & EMI_ACKMSK)
  107. tmp = 0x3f;
  108. else
  109. tmp = 0x0;
  110. writel(tmp, &emi_regs_p->ack);
  111. for (cs = 0; cs < CONFIG_SYS_MAX_FLASH_BANKS; cs++) {
  112. writel(p->tap, &emi_regs_p->bank_regs[cs].tap);
  113. writel(p->tsdp, &emi_regs_p->bank_regs[cs].tsdp);
  114. writel(p->tdpw, &emi_regs_p->bank_regs[cs].tdpw);
  115. writel(p->tdpr, &emi_regs_p->bank_regs[cs].tdpr);
  116. writel(p->tdcs, &emi_regs_p->bank_regs[cs].tdcs);
  117. writel(EMI_CNTL_ENBBYTERW | ((val & 0x18) >> 3),
  118. &emi_regs_p->bank_regs[cs].control);
  119. }
  120. }
  121. #endif
  122. int spear_board_init(ulong mach_type)
  123. {
  124. struct xloader_table *xloader_tb =
  125. (struct xloader_table *)XLOADER_TABLE_ADDRESS;
  126. struct xloader_table_1_2 *table_1_2;
  127. struct chip_data *chip = &chip_data;
  128. gd->bd->bi_arch_number = mach_type;
  129. /* adress of boot parameters */
  130. gd->bd->bi_boot_params = CONFIG_BOOT_PARAMS_ADDR;
  131. /* CPU is initialized to work at 333MHz in Xloader */
  132. chip->cpufreq = 333;
  133. if (XLOADER_TABLE_VERSION_1_2 == xloader_tb->table_version) {
  134. table_1_2 = &xloader_tb->table.table_1_2;
  135. memcpy(chip->version, table_1_2->version,
  136. sizeof(chip->version));
  137. }
  138. #ifdef CONFIG_SPEAR_EMI
  139. spear_emi_init();
  140. #endif
  141. return 0;
  142. }
  143. static int i2c_read_mac(uchar *buffer)
  144. {
  145. u8 buf[2];
  146. i2c_read(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
  147. /* Check if mac in i2c memory is valid */
  148. if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) {
  149. /* Valid mac address is saved in i2c eeprom */
  150. i2c_read(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, buffer, MAC_LEN);
  151. return 0;
  152. }
  153. return -1;
  154. }
  155. static int write_mac(uchar *mac)
  156. {
  157. u8 buf[2];
  158. buf[0] = (u8)MAGIC_BYTE0;
  159. buf[1] = (u8)MAGIC_BYTE1;
  160. i2c_write(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
  161. buf[0] = (u8)~MAGIC_BYTE0;
  162. buf[1] = (u8)~MAGIC_BYTE1;
  163. i2c_read(CONFIG_I2C_CHIPADDRESS, MAGIC_OFF, 1, buf, MAGIC_LEN);
  164. /* check if valid MAC address is saved in I2C EEPROM or not? */
  165. if ((buf[0] == MAGIC_BYTE0) && (buf[1] == MAGIC_BYTE1)) {
  166. i2c_write(CONFIG_I2C_CHIPADDRESS, MAC_OFF, 1, mac, MAC_LEN);
  167. puts("I2C EEPROM written with mac address \n");
  168. return 0;
  169. }
  170. puts("I2C EEPROM writing failed \n");
  171. return -1;
  172. }
  173. int do_chip_config(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  174. {
  175. void (*sram_setfreq) (unsigned int, unsigned int);
  176. struct chip_data *chip = &chip_data;
  177. unsigned char mac[6];
  178. unsigned int reg, frequency;
  179. char *s, *e;
  180. char i2c_mac[20];
  181. if ((argc > 3) || (argc < 2)) {
  182. cmd_usage(cmdtp);
  183. return 1;
  184. }
  185. if ((!strcmp(argv[1], "cpufreq")) || (!strcmp(argv[1], "ddrfreq"))) {
  186. frequency = simple_strtoul(argv[2], NULL, 0);
  187. if (frequency > 333) {
  188. printf("Frequency is limited to 333MHz\n");
  189. return 1;
  190. }
  191. sram_setfreq = memcpy((void *)SRAM_REL, setfreq, setfreq_sz);
  192. if (!strcmp(argv[1], "cpufreq")) {
  193. sram_setfreq(CPU, frequency);
  194. printf("CPU frequency changed to %u\n", frequency);
  195. chip->cpufreq = frequency;
  196. } else {
  197. sram_setfreq(DDR, frequency);
  198. printf("DDR frequency changed to %u\n", frequency);
  199. chip->dramfreq = frequency;
  200. }
  201. return 0;
  202. } else if (!strcmp(argv[1], "ethaddr")) {
  203. s = argv[2];
  204. for (reg = 0; reg < 6; ++reg) {
  205. mac[reg] = s ? simple_strtoul(s, &e, 16) : 0;
  206. if (s)
  207. s = (*e) ? e + 1 : e;
  208. }
  209. write_mac(mac);
  210. return 0;
  211. } else if (!strcmp(argv[1], "print")) {
  212. if (chip->cpufreq == -1)
  213. printf("CPU Freq = Not Known\n");
  214. else
  215. printf("CPU Freq = %d MHz\n", chip->cpufreq);
  216. if (chip->dramfreq == -1)
  217. printf("DDR Freq = Not Known\n");
  218. else
  219. printf("DDR Freq = %d MHz\n", chip->dramfreq);
  220. if (chip->dramtype == DDRMOBILE)
  221. printf("DDR Type = MOBILE\n");
  222. else if (chip->dramtype == DDR2)
  223. printf("DDR Type = DDR2\n");
  224. else
  225. printf("DDR Type = Not Known\n");
  226. if (!i2c_read_mac(mac)) {
  227. sprintf(i2c_mac, "%pM", mac);
  228. printf("Ethaddr (from i2c mem) = %s\n", i2c_mac);
  229. } else {
  230. printf("Ethaddr (from i2c mem) = Not set\n");
  231. }
  232. printf("Xloader Rev = %s\n", chip->version);
  233. return 0;
  234. }
  235. cmd_usage(cmdtp);
  236. return 1;
  237. }
  238. U_BOOT_CMD(chip_config, 3, 1, do_chip_config,
  239. "configure chip",
  240. "chip_config cpufreq/ddrfreq frequency\n"
  241. "chip_config print");