cpu_init.c 3.5 KB

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  1. /*
  2. * (C) Copyright 2003 Martin Winistoerfer, martinwinistoerfer@gmx.ch.
  3. *
  4. * See file CREDITS for list of people who contributed to this
  5. * project.
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation,
  20. */
  21. /*
  22. * File: cpu_init.c
  23. *
  24. * Discription: Contains initialisation functions to setup
  25. * the cpu properly
  26. *
  27. */
  28. #include <common.h>
  29. #include <mpc5xx.h>
  30. #include <watchdog.h>
  31. /*
  32. * Setup essential cpu registers to run
  33. */
  34. void cpu_init_f (volatile immap_t * immr)
  35. {
  36. volatile memctl5xx_t *memctl = &immr->im_memctl;
  37. ulong reg;
  38. /* SYPCR - contains watchdog control. This will enable watchdog */
  39. /* if CONFIG_WATCHDOG is set */
  40. immr->im_siu_conf.sc_sypcr = CONFIG_SYS_SYPCR;
  41. #if defined(CONFIG_WATCHDOG)
  42. reset_5xx_watchdog (immr);
  43. #endif
  44. /* SIUMCR - contains debug pin configuration */
  45. immr->im_siu_conf.sc_siumcr |= CONFIG_SYS_SIUMCR;
  46. /* Initialize timebase. Unlock TBSCRK */
  47. immr->im_sitk.sitk_tbscrk = KAPWR_KEY;
  48. immr->im_sit.sit_tbscr = CONFIG_SYS_TBSCR;
  49. /* Full IMB bus speed */
  50. immr->im_uimb.uimb_umcr = CONFIG_SYS_UMCR;
  51. /* Time base and decrementer will be enables (TBE) */
  52. /* in init_timebase() in time.c called from board_init_f(). */
  53. /* Initialize the PIT. Unlock PISCRK */
  54. immr->im_sitk.sitk_piscrk = KAPWR_KEY;
  55. immr->im_sit.sit_piscr = CONFIG_SYS_PISCR;
  56. #if !defined(CONFIG_PATI)
  57. /* PATI sest PLL in start.S */
  58. /* PLL (CPU clock) settings */
  59. immr->im_clkrstk.cark_plprcrk = KAPWR_KEY;
  60. /* If CONFIG_SYS_PLPRCR (set in the various *_config.h files) tries to
  61. * set the MF field, then just copy CONFIG_SYS_PLPRCR over car_plprcr,
  62. * otherwise OR in CONFIG_SYS_PLPRCR so we do not change the currentMF
  63. * field value.
  64. */
  65. #if ((CONFIG_SYS_PLPRCR & PLPRCR_MF_MSK) != 0)
  66. reg = CONFIG_SYS_PLPRCR; /* reset control bits */
  67. #else
  68. reg = immr->im_clkrst.car_plprcr;
  69. reg &= PLPRCR_MF_MSK; /* isolate MF field */
  70. reg |= CONFIG_SYS_PLPRCR; /* reset control bits */
  71. #endif
  72. immr->im_clkrst.car_plprcr = reg;
  73. #endif /* !defined(CONFIG_PATI) */
  74. /* System integration timers. CONFIG_SYS_MASK has EBDF configuration */
  75. immr->im_clkrstk.cark_sccrk = KAPWR_KEY;
  76. reg = immr->im_clkrst.car_sccr;
  77. reg &= SCCR_MASK;
  78. reg |= CONFIG_SYS_SCCR;
  79. immr->im_clkrst.car_sccr = reg;
  80. /* Memory Controller */
  81. memctl->memc_br0 = CONFIG_SYS_BR0_PRELIM;
  82. memctl->memc_or0 = CONFIG_SYS_OR0_PRELIM;
  83. #if (defined(CONFIG_SYS_OR1_PRELIM) && defined(CONFIG_SYS_BR1_PRELIM))
  84. memctl->memc_or1 = CONFIG_SYS_OR1_PRELIM;
  85. memctl->memc_br1 = CONFIG_SYS_BR1_PRELIM;
  86. #endif
  87. #if defined(CONFIG_SYS_OR2_PRELIM) && defined(CONFIG_SYS_BR2_PRELIM)
  88. memctl->memc_or2 = CONFIG_SYS_OR2_PRELIM;
  89. memctl->memc_br2 = CONFIG_SYS_BR2_PRELIM;
  90. #endif
  91. #if defined(CONFIG_SYS_OR3_PRELIM) && defined(CONFIG_SYS_BR3_PRELIM)
  92. memctl->memc_or3 = CONFIG_SYS_OR3_PRELIM;
  93. memctl->memc_br3 = CONFIG_SYS_BR3_PRELIM;
  94. #endif
  95. }
  96. /*
  97. * Initialize higher level parts of cpu
  98. */
  99. int cpu_init_r (void)
  100. {
  101. /* Nothing to do at the moment */
  102. return (0);
  103. }