cpu.c 6.9 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Josh Huber <huber@mclx.com>, Mission Critical Linux, Inc.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /*
  24. * cpu.c
  25. *
  26. * CPU specific code
  27. *
  28. * written or collected and sometimes rewritten by
  29. * Magnus Damm <damm@bitsmart.com>
  30. *
  31. * minor modifications by
  32. * Wolfgang Denk <wd@denx.de>
  33. *
  34. * more modifications by
  35. * Josh Huber <huber@mclx.com>
  36. * added support for the 74xx series of cpus
  37. * added support for the 7xx series of cpus
  38. * made the code a little less hard-coded, and more auto-detectish
  39. */
  40. #include <common.h>
  41. #include <command.h>
  42. #include <74xx_7xx.h>
  43. #include <asm/cache.h>
  44. #if defined(CONFIG_OF_LIBFDT)
  45. #include <libfdt.h>
  46. #include <fdt_support.h>
  47. #endif
  48. #ifdef CONFIG_AMIGAONEG3SE
  49. #include "../board/MAI/AmigaOneG3SE/via686.h"
  50. #include "../board/MAI/AmigaOneG3SE/memio.h"
  51. #endif
  52. DECLARE_GLOBAL_DATA_PTR;
  53. cpu_t
  54. get_cpu_type(void)
  55. {
  56. uint pvr = get_pvr();
  57. cpu_t type;
  58. type = CPU_UNKNOWN;
  59. switch (PVR_VER(pvr)) {
  60. case 0x000c:
  61. type = CPU_7400;
  62. break;
  63. case 0x0008:
  64. type = CPU_750;
  65. if (((pvr >> 8) & 0xff) == 0x01) {
  66. type = CPU_750CX; /* old CX (80100 and 8010x?)*/
  67. } else if (((pvr >> 8) & 0xff) == 0x22) {
  68. type = CPU_750CX; /* CX (82201,82202) and CXe (82214) */
  69. } else if (((pvr >> 8) & 0xff) == 0x33) {
  70. type = CPU_750CX; /* CXe (83311) */
  71. } else if (((pvr >> 12) & 0xF) == 0x3) {
  72. type = CPU_755;
  73. }
  74. break;
  75. case 0x7000:
  76. type = CPU_750FX;
  77. break;
  78. case 0x7002:
  79. type = CPU_750GX;
  80. break;
  81. case 0x800C:
  82. type = CPU_7410;
  83. break;
  84. case 0x8000:
  85. type = CPU_7450;
  86. break;
  87. case 0x8001:
  88. type = CPU_7455;
  89. break;
  90. case 0x8002:
  91. type = CPU_7457;
  92. break;
  93. case 0x8003:
  94. type = CPU_7447A;
  95. break;
  96. case 0x8004:
  97. type = CPU_7448;
  98. break;
  99. default:
  100. break;
  101. }
  102. return type;
  103. }
  104. /* ------------------------------------------------------------------------- */
  105. #if !defined(CONFIG_BAB7xx)
  106. int checkcpu (void)
  107. {
  108. uint type = get_cpu_type();
  109. uint pvr = get_pvr();
  110. ulong clock = gd->cpu_clk;
  111. char buf[32];
  112. char *str;
  113. puts ("CPU: ");
  114. switch (type) {
  115. case CPU_750CX:
  116. printf ("750CX%s v%d.%d", (pvr&0xf0)?"e":"",
  117. (pvr>>8) & 0xf,
  118. pvr & 0xf);
  119. goto PR_CLK;
  120. case CPU_750:
  121. str = "750";
  122. break;
  123. case CPU_750FX:
  124. str = "750FX";
  125. break;
  126. case CPU_750GX:
  127. str = "750GX";
  128. break;
  129. case CPU_755:
  130. str = "755";
  131. break;
  132. case CPU_7400:
  133. str = "MPC7400";
  134. break;
  135. case CPU_7410:
  136. str = "MPC7410";
  137. break;
  138. case CPU_7447A:
  139. str = "MPC7447A";
  140. break;
  141. case CPU_7448:
  142. str = "MPC7448";
  143. break;
  144. case CPU_7450:
  145. str = "MPC7450";
  146. break;
  147. case CPU_7455:
  148. str = "MPC7455";
  149. break;
  150. case CPU_7457:
  151. str = "MPC7457";
  152. break;
  153. default:
  154. printf("Unknown CPU -- PVR: 0x%08x\n", pvr);
  155. return -1;
  156. }
  157. printf ("%s v%d.%d", str, (pvr >> 8) & 0xFF, pvr & 0xFF);
  158. PR_CLK:
  159. printf (" @ %s MHz\n", strmhz(buf, clock));
  160. return (0);
  161. }
  162. #endif
  163. /* these two functions are unimplemented currently [josh] */
  164. /* -------------------------------------------------------------------- */
  165. /* L1 i-cache */
  166. int
  167. checkicache(void)
  168. {
  169. return 0; /* XXX */
  170. }
  171. /* -------------------------------------------------------------------- */
  172. /* L1 d-cache */
  173. int
  174. checkdcache(void)
  175. {
  176. return 0; /* XXX */
  177. }
  178. /* -------------------------------------------------------------------- */
  179. static inline void
  180. soft_restart(unsigned long addr)
  181. {
  182. /* SRR0 has system reset vector, SRR1 has default MSR value */
  183. /* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */
  184. __asm__ __volatile__ ("mtspr 26, %0" :: "r" (addr));
  185. __asm__ __volatile__ ("li 4, (1 << 6)" ::: "r4");
  186. __asm__ __volatile__ ("mtspr 27, 4");
  187. __asm__ __volatile__ ("rfi");
  188. while(1); /* not reached */
  189. }
  190. #if !defined(CONFIG_PCIPPC2) && \
  191. !defined(CONFIG_BAB7xx) && \
  192. !defined(CONFIG_ELPPC) && \
  193. !defined(CONFIG_PPMC7XX)
  194. /* no generic way to do board reset. simply call soft_reset. */
  195. void
  196. do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
  197. {
  198. ulong addr;
  199. /* flush and disable I/D cache */
  200. __asm__ __volatile__ ("mfspr 3, 1008" ::: "r3");
  201. __asm__ __volatile__ ("ori 5, 5, 0xcc00" ::: "r5");
  202. __asm__ __volatile__ ("ori 4, 3, 0xc00" ::: "r4");
  203. __asm__ __volatile__ ("andc 5, 3, 5" ::: "r5");
  204. __asm__ __volatile__ ("sync");
  205. __asm__ __volatile__ ("mtspr 1008, 4");
  206. __asm__ __volatile__ ("isync");
  207. __asm__ __volatile__ ("sync");
  208. __asm__ __volatile__ ("mtspr 1008, 5");
  209. __asm__ __volatile__ ("isync");
  210. __asm__ __volatile__ ("sync");
  211. #ifdef CONFIG_SYS_RESET_ADDRESS
  212. addr = CONFIG_SYS_RESET_ADDRESS;
  213. #else
  214. /*
  215. * note: when CONFIG_SYS_MONITOR_BASE points to a RAM address,
  216. * CONFIG_SYS_MONITOR_BASE - sizeof (ulong) is usually a valid
  217. * address. Better pick an address known to be invalid on your
  218. * system and assign it to CONFIG_SYS_RESET_ADDRESS.
  219. */
  220. addr = CONFIG_SYS_MONITOR_BASE - sizeof (ulong);
  221. #endif
  222. soft_restart(addr);
  223. while(1); /* not reached */
  224. }
  225. #endif
  226. /* ------------------------------------------------------------------------- */
  227. /*
  228. * For the 7400 the TB clock runs at 1/4 the cpu bus speed.
  229. */
  230. #if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SYS_CONFIG_BUS_CLK)
  231. unsigned long get_tbclk(void)
  232. {
  233. return (gd->bus_clk / 4);
  234. }
  235. #else /* ! CONFIG_AMIGAONEG3SE and !CONFIG_SYS_CONFIG_BUS_CLK*/
  236. unsigned long get_tbclk (void)
  237. {
  238. return CONFIG_SYS_BUS_HZ / 4;
  239. }
  240. #endif /* CONFIG_AMIGAONEG3SE or CONFIG_SYS_CONFIG_BUS_CLK*/
  241. /* ------------------------------------------------------------------------- */
  242. #if defined(CONFIG_WATCHDOG)
  243. #if !defined(CONFIG_PCIPPC2) && !defined(CONFIG_BAB7xx)
  244. void
  245. watchdog_reset(void)
  246. {
  247. }
  248. #endif /* !CONFIG_PCIPPC2 && !CONFIG_BAB7xx */
  249. #endif /* CONFIG_WATCHDOG */
  250. /* ------------------------------------------------------------------------- */
  251. #ifdef CONFIG_OF_LIBFDT
  252. void ft_cpu_setup(void *blob, bd_t *bd)
  253. {
  254. do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
  255. "timebase-frequency", bd->bi_busfreq / 4, 1);
  256. do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
  257. "bus-frequency", bd->bi_busfreq, 1);
  258. do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
  259. "clock-frequency", bd->bi_intfreq, 1);
  260. fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
  261. fdt_fixup_ethernet(blob);
  262. }
  263. #endif
  264. /* ------------------------------------------------------------------------- */