mxs_nand_spl.c 6.7 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2014 Gateworks Corporation
  4. * Author: Tim Harvey <tharvey@gateworks.com>
  5. */
  6. #include <common.h>
  7. #include <nand.h>
  8. #include <malloc.h>
  9. #include "mxs_nand.h"
  10. static struct mtd_info *mtd;
  11. static struct nand_chip nand_chip;
  12. static void mxs_nand_command(struct mtd_info *mtd, unsigned int command,
  13. int column, int page_addr)
  14. {
  15. register struct nand_chip *chip = mtd_to_nand(mtd);
  16. u32 timeo, time_start;
  17. /* write out the command to the device */
  18. chip->cmd_ctrl(mtd, command, NAND_CLE);
  19. /* Serially input address */
  20. if (column != -1) {
  21. chip->cmd_ctrl(mtd, column, NAND_ALE);
  22. chip->cmd_ctrl(mtd, column >> 8, NAND_ALE);
  23. }
  24. if (page_addr != -1) {
  25. chip->cmd_ctrl(mtd, page_addr, NAND_ALE);
  26. chip->cmd_ctrl(mtd, page_addr >> 8, NAND_ALE);
  27. /* One more address cycle for devices > 128MiB */
  28. if (chip->chipsize > (128 << 20))
  29. chip->cmd_ctrl(mtd, page_addr >> 16, NAND_ALE);
  30. }
  31. chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0);
  32. if (command == NAND_CMD_READ0) {
  33. chip->cmd_ctrl(mtd, NAND_CMD_READSTART, NAND_CLE);
  34. chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0);
  35. }
  36. /* wait for nand ready */
  37. ndelay(100);
  38. timeo = (CONFIG_SYS_HZ * 20) / 1000;
  39. time_start = get_timer(0);
  40. while (get_timer(time_start) < timeo) {
  41. if (chip->dev_ready(mtd))
  42. break;
  43. }
  44. }
  45. #if defined (CONFIG_SPL_NAND_IDENT)
  46. /* Trying to detect the NAND flash using ONFi, JEDEC, and (extended) IDs */
  47. static int mxs_flash_full_ident(struct mtd_info *mtd)
  48. {
  49. int nand_maf_id, nand_dev_id;
  50. struct nand_chip *chip = mtd_to_nand(mtd);
  51. struct nand_flash_dev *type;
  52. type = nand_get_flash_type(mtd, chip, &nand_maf_id, &nand_dev_id, NULL);
  53. if (IS_ERR(type)) {
  54. chip->select_chip(mtd, -1);
  55. return PTR_ERR(type);
  56. }
  57. return 0;
  58. }
  59. #else
  60. /* Trying to detect the NAND flash using ONFi only */
  61. static int mxs_flash_onfi_ident(struct mtd_info *mtd)
  62. {
  63. register struct nand_chip *chip = mtd_to_nand(mtd);
  64. int i;
  65. u8 mfg_id, dev_id;
  66. u8 id_data[8];
  67. struct nand_onfi_params *p = &chip->onfi_params;
  68. /* Reset the chip */
  69. chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
  70. /* Send the command for reading device ID */
  71. chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
  72. /* Read manufacturer and device IDs */
  73. mfg_id = chip->read_byte(mtd);
  74. dev_id = chip->read_byte(mtd);
  75. /* Try again to make sure */
  76. chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1);
  77. for (i = 0; i < 8; i++)
  78. id_data[i] = chip->read_byte(mtd);
  79. if (id_data[0] != mfg_id || id_data[1] != dev_id) {
  80. printf("second ID read did not match");
  81. return -1;
  82. }
  83. debug("0x%02x:0x%02x ", mfg_id, dev_id);
  84. /* read ONFI */
  85. chip->onfi_version = 0;
  86. chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1);
  87. if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' ||
  88. chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I') {
  89. return -2;
  90. }
  91. /* we have ONFI, probe it */
  92. chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1);
  93. chip->read_buf(mtd, (uint8_t *)p, sizeof(*p));
  94. mtd->name = p->model;
  95. mtd->writesize = le32_to_cpu(p->byte_per_page);
  96. mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
  97. mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
  98. chip->chipsize = le32_to_cpu(p->blocks_per_lun);
  99. chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
  100. /* Calculate the address shift from the page size */
  101. chip->page_shift = ffs(mtd->writesize) - 1;
  102. chip->phys_erase_shift = ffs(mtd->erasesize) - 1;
  103. /* Convert chipsize to number of pages per chip -1 */
  104. chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
  105. chip->badblockbits = 8;
  106. debug("erasesize=%d (>>%d)\n", mtd->erasesize, chip->phys_erase_shift);
  107. debug("writesize=%d (>>%d)\n", mtd->writesize, chip->page_shift);
  108. debug("oobsize=%d\n", mtd->oobsize);
  109. debug("chipsize=%lld\n", chip->chipsize);
  110. return 0;
  111. }
  112. #endif /* CONFIG_SPL_NAND_IDENT */
  113. static int mxs_flash_ident(struct mtd_info *mtd)
  114. {
  115. int ret;
  116. #if defined (CONFIG_SPL_NAND_IDENT)
  117. ret = mxs_flash_full_ident(mtd);
  118. #else
  119. ret = mxs_flash_onfi_ident(mtd);
  120. #endif
  121. return ret;
  122. }
  123. static int mxs_read_page_ecc(struct mtd_info *mtd, void *buf, unsigned int page)
  124. {
  125. register struct nand_chip *chip = mtd_to_nand(mtd);
  126. int ret;
  127. chip->cmdfunc(mtd, NAND_CMD_READ0, 0x0, page);
  128. ret = nand_chip.ecc.read_page(mtd, chip, buf, 1, page);
  129. if (ret < 0) {
  130. printf("read_page failed %d\n", ret);
  131. return -1;
  132. }
  133. return 0;
  134. }
  135. static int is_badblock(struct mtd_info *mtd, loff_t offs, int allowbbt)
  136. {
  137. register struct nand_chip *chip = mtd_to_nand(mtd);
  138. unsigned int block = offs >> chip->phys_erase_shift;
  139. unsigned int page = offs >> chip->page_shift;
  140. debug("%s offs=0x%08x block:%d page:%d\n", __func__, (int)offs, block,
  141. page);
  142. chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
  143. memset(chip->oob_poi, 0, mtd->oobsize);
  144. chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
  145. return chip->oob_poi[0] != 0xff;
  146. }
  147. /* setup mtd and nand structs and init mxs_nand driver */
  148. static int mxs_nand_init(void)
  149. {
  150. /* return if already initalized */
  151. if (nand_chip.numchips)
  152. return 0;
  153. /* init mxs nand driver */
  154. mxs_nand_init_spl(&nand_chip);
  155. mtd = nand_to_mtd(&nand_chip);
  156. /* set mtd functions */
  157. nand_chip.cmdfunc = mxs_nand_command;
  158. nand_chip.numchips = 1;
  159. /* identify flash device */
  160. if (mxs_flash_ident(mtd)) {
  161. printf("Failed to identify\n");
  162. return -1;
  163. }
  164. /* allocate and initialize buffers */
  165. nand_chip.buffers = memalign(ARCH_DMA_MINALIGN,
  166. sizeof(*nand_chip.buffers));
  167. nand_chip.oob_poi = nand_chip.buffers->databuf + mtd->writesize;
  168. /* setup flash layout (does not scan as we override that) */
  169. mtd->size = nand_chip.chipsize;
  170. nand_chip.scan_bbt(mtd);
  171. return 0;
  172. }
  173. int nand_spl_load_image(uint32_t offs, unsigned int size, void *buf)
  174. {
  175. struct nand_chip *chip;
  176. unsigned int page;
  177. unsigned int nand_page_per_block;
  178. unsigned int sz = 0;
  179. if (mxs_nand_init())
  180. return -ENODEV;
  181. chip = mtd_to_nand(mtd);
  182. page = offs >> chip->page_shift;
  183. nand_page_per_block = mtd->erasesize / mtd->writesize;
  184. debug("%s offset:0x%08x len:%d page:%d\n", __func__, offs, size, page);
  185. size = roundup(size, mtd->writesize);
  186. while (sz < size) {
  187. if (mxs_read_page_ecc(mtd, buf, page) < 0)
  188. return -1;
  189. sz += mtd->writesize;
  190. offs += mtd->writesize;
  191. page++;
  192. buf += mtd->writesize;
  193. /*
  194. * Check if we have crossed a block boundary, and if so
  195. * check for bad block.
  196. */
  197. if (!(page % nand_page_per_block)) {
  198. /*
  199. * Yes, new block. See if this block is good. If not,
  200. * loop until we find a good block.
  201. */
  202. while (is_badblock(mtd, offs, 1)) {
  203. page = page + nand_page_per_block;
  204. /* Check i we've reached the end of flash. */
  205. if (page >= mtd->size >> chip->page_shift)
  206. return -ENOMEM;
  207. }
  208. }
  209. }
  210. return 0;
  211. }
  212. int nand_default_bbt(struct mtd_info *mtd)
  213. {
  214. return 0;
  215. }
  216. void nand_init(void)
  217. {
  218. }
  219. void nand_deselect(void)
  220. {
  221. }