kirkwood_nand.c 1.9 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2009
  4. * Marvell Semiconductor <www.marvell.com>
  5. * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
  6. */
  7. #include <common.h>
  8. #include <asm/io.h>
  9. #include <asm/arch/soc.h>
  10. #include <asm/arch/mpp.h>
  11. #include <nand.h>
  12. /* NAND Flash Soc registers */
  13. struct kwnandf_registers {
  14. u32 rd_params; /* 0x10418 */
  15. u32 wr_param; /* 0x1041c */
  16. u8 pad[0x10470 - 0x1041c - 4];
  17. u32 ctrl; /* 0x10470 */
  18. };
  19. static struct kwnandf_registers *nf_reg =
  20. (struct kwnandf_registers *)KW_NANDF_BASE;
  21. static u32 nand_mpp_backup[9] = { 0 };
  22. /*
  23. * hardware specific access to control-lines/bits
  24. */
  25. #define NAND_ACTCEBOOT_BIT 0x02
  26. static void kw_nand_hwcontrol(struct mtd_info *mtd, int cmd,
  27. unsigned int ctrl)
  28. {
  29. struct nand_chip *nc = mtd_to_nand(mtd);
  30. u32 offs;
  31. if (cmd == NAND_CMD_NONE)
  32. return;
  33. if (ctrl & NAND_CLE)
  34. offs = (1 << 0); /* Commands with A[1:0] == 01 */
  35. else if (ctrl & NAND_ALE)
  36. offs = (1 << 1); /* Addresses with A[1:0] == 10 */
  37. else
  38. return;
  39. writeb(cmd, nc->IO_ADDR_W + offs);
  40. }
  41. void kw_nand_select_chip(struct mtd_info *mtd, int chip)
  42. {
  43. u32 data;
  44. static const u32 nand_config[] = {
  45. MPP0_NF_IO2,
  46. MPP1_NF_IO3,
  47. MPP2_NF_IO4,
  48. MPP3_NF_IO5,
  49. MPP4_NF_IO6,
  50. MPP5_NF_IO7,
  51. MPP18_NF_IO0,
  52. MPP19_NF_IO1,
  53. 0
  54. };
  55. if (chip >= 0)
  56. kirkwood_mpp_conf(nand_config, nand_mpp_backup);
  57. else
  58. kirkwood_mpp_conf(nand_mpp_backup, NULL);
  59. data = readl(&nf_reg->ctrl);
  60. data |= NAND_ACTCEBOOT_BIT;
  61. writel(data, &nf_reg->ctrl);
  62. }
  63. int board_nand_init(struct nand_chip *nand)
  64. {
  65. nand->options = NAND_COPYBACK | NAND_CACHEPRG | NAND_NO_PADDING;
  66. #if defined(CONFIG_SYS_NAND_NO_SUBPAGE_WRITE)
  67. nand->options |= NAND_NO_SUBPAGE_WRITE;
  68. #endif
  69. #if defined(CONFIG_NAND_ECC_BCH)
  70. nand->ecc.mode = NAND_ECC_SOFT_BCH;
  71. #else
  72. nand->ecc.mode = NAND_ECC_SOFT;
  73. #endif
  74. nand->cmd_ctrl = kw_nand_hwcontrol;
  75. nand->chip_delay = 40;
  76. nand->select_chip = kw_nand_select_chip;
  77. return 0;
  78. }