denali_dt.c 2.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2017 Socionext Inc.
  4. * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
  5. */
  6. #include <clk.h>
  7. #include <dm.h>
  8. #include <linux/io.h>
  9. #include <linux/ioport.h>
  10. #include <linux/printk.h>
  11. #include "denali.h"
  12. struct denali_dt_data {
  13. unsigned int revision;
  14. unsigned int caps;
  15. const struct nand_ecc_caps *ecc_caps;
  16. };
  17. NAND_ECC_CAPS_SINGLE(denali_socfpga_ecc_caps, denali_calc_ecc_bytes,
  18. 512, 8, 15);
  19. static const struct denali_dt_data denali_socfpga_data = {
  20. .caps = DENALI_CAP_HW_ECC_FIXUP,
  21. .ecc_caps = &denali_socfpga_ecc_caps,
  22. };
  23. NAND_ECC_CAPS_SINGLE(denali_uniphier_v5a_ecc_caps, denali_calc_ecc_bytes,
  24. 1024, 8, 16, 24);
  25. static const struct denali_dt_data denali_uniphier_v5a_data = {
  26. .caps = DENALI_CAP_HW_ECC_FIXUP |
  27. DENALI_CAP_DMA_64BIT,
  28. .ecc_caps = &denali_uniphier_v5a_ecc_caps,
  29. };
  30. NAND_ECC_CAPS_SINGLE(denali_uniphier_v5b_ecc_caps, denali_calc_ecc_bytes,
  31. 1024, 8, 16);
  32. static const struct denali_dt_data denali_uniphier_v5b_data = {
  33. .revision = 0x0501,
  34. .caps = DENALI_CAP_HW_ECC_FIXUP |
  35. DENALI_CAP_DMA_64BIT,
  36. .ecc_caps = &denali_uniphier_v5b_ecc_caps,
  37. };
  38. static const struct udevice_id denali_nand_dt_ids[] = {
  39. {
  40. .compatible = "altr,socfpga-denali-nand",
  41. .data = (unsigned long)&denali_socfpga_data,
  42. },
  43. {
  44. .compatible = "socionext,uniphier-denali-nand-v5a",
  45. .data = (unsigned long)&denali_uniphier_v5a_data,
  46. },
  47. {
  48. .compatible = "socionext,uniphier-denali-nand-v5b",
  49. .data = (unsigned long)&denali_uniphier_v5b_data,
  50. },
  51. { /* sentinel */ }
  52. };
  53. static int denali_dt_probe(struct udevice *dev)
  54. {
  55. struct denali_nand_info *denali = dev_get_priv(dev);
  56. const struct denali_dt_data *data;
  57. struct clk clk;
  58. struct resource res;
  59. int ret;
  60. data = (void *)dev_get_driver_data(dev);
  61. if (data) {
  62. denali->revision = data->revision;
  63. denali->caps = data->caps;
  64. denali->ecc_caps = data->ecc_caps;
  65. }
  66. denali->dev = dev;
  67. ret = dev_read_resource_byname(dev, "denali_reg", &res);
  68. if (ret)
  69. return ret;
  70. denali->reg = devm_ioremap(dev, res.start, resource_size(&res));
  71. ret = dev_read_resource_byname(dev, "nand_data", &res);
  72. if (ret)
  73. return ret;
  74. denali->host = devm_ioremap(dev, res.start, resource_size(&res));
  75. ret = clk_get_by_index(dev, 0, &clk);
  76. if (ret)
  77. return ret;
  78. ret = clk_enable(&clk);
  79. if (ret)
  80. return ret;
  81. denali->clk_x_rate = clk_get_rate(&clk);
  82. return denali_init(denali);
  83. }
  84. U_BOOT_DRIVER(denali_nand_dt) = {
  85. .name = "denali-nand-dt",
  86. .id = UCLASS_MISC,
  87. .of_match = denali_nand_dt_ids,
  88. .probe = denali_dt_probe,
  89. .priv_auto_alloc_size = sizeof(struct denali_nand_info),
  90. };
  91. void board_nand_init(void)
  92. {
  93. struct udevice *dev;
  94. int ret;
  95. ret = uclass_get_device_by_driver(UCLASS_MISC,
  96. DM_GET_DRIVER(denali_nand_dt),
  97. &dev);
  98. if (ret && ret != -ENODEV)
  99. pr_err("Failed to initialize Denali NAND controller. (error %d)\n",
  100. ret);
  101. }