am335x_spl_bch.c 5.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2012
  4. * Konstantin Kozhevnikov, Cogent Embedded
  5. *
  6. * based on nand_spl_simple code
  7. *
  8. * (C) Copyright 2006-2008
  9. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  10. */
  11. #include <common.h>
  12. #include <nand.h>
  13. #include <asm/io.h>
  14. #include <linux/mtd/nand_ecc.h>
  15. static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
  16. static struct mtd_info *mtd;
  17. static struct nand_chip nand_chip;
  18. #define ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
  19. CONFIG_SYS_NAND_ECCSIZE)
  20. #define ECCTOTAL (ECCSTEPS * CONFIG_SYS_NAND_ECCBYTES)
  21. /*
  22. * NAND command for large page NAND devices (2k)
  23. */
  24. static int nand_command(int block, int page, uint32_t offs,
  25. u8 cmd)
  26. {
  27. struct nand_chip *this = mtd_to_nand(mtd);
  28. int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
  29. void (*hwctrl)(struct mtd_info *mtd, int cmd,
  30. unsigned int ctrl) = this->cmd_ctrl;
  31. while (!this->dev_ready(mtd))
  32. ;
  33. /* Emulate NAND_CMD_READOOB */
  34. if (cmd == NAND_CMD_READOOB) {
  35. offs += CONFIG_SYS_NAND_PAGE_SIZE;
  36. cmd = NAND_CMD_READ0;
  37. }
  38. /* Begin command latch cycle */
  39. hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
  40. if (cmd == NAND_CMD_RESET) {
  41. hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
  42. /*
  43. * Apply this short delay always to ensure that we do wait
  44. * tWB in any case on any machine.
  45. */
  46. ndelay(150);
  47. while (!this->dev_ready(mtd))
  48. ;
  49. return 0;
  50. }
  51. /* Shift the offset from byte addressing to word addressing. */
  52. if ((this->options & NAND_BUSWIDTH_16) && !nand_opcode_8bits(cmd))
  53. offs >>= 1;
  54. /* Set ALE and clear CLE to start address cycle */
  55. /* Column address */
  56. hwctrl(mtd, offs & 0xff,
  57. NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
  58. hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
  59. /* Row address */
  60. if (cmd != NAND_CMD_RNDOUT) {
  61. hwctrl(mtd, (page_addr & 0xff),
  62. NAND_CTRL_ALE); /* A[19:12] */
  63. hwctrl(mtd, ((page_addr >> 8) & 0xff),
  64. NAND_CTRL_ALE); /* A[27:20] */
  65. #ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
  66. /* One more address cycle for devices > 128MiB */
  67. hwctrl(mtd, (page_addr >> 16) & 0x0f,
  68. NAND_CTRL_ALE); /* A[31:28] */
  69. #endif
  70. }
  71. hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
  72. /*
  73. * Program and erase have their own busy handlers status, sequential
  74. * in and status need no delay.
  75. */
  76. switch (cmd) {
  77. case NAND_CMD_CACHEDPROG:
  78. case NAND_CMD_PAGEPROG:
  79. case NAND_CMD_ERASE1:
  80. case NAND_CMD_ERASE2:
  81. case NAND_CMD_SEQIN:
  82. case NAND_CMD_RNDIN:
  83. case NAND_CMD_STATUS:
  84. return 0;
  85. case NAND_CMD_RNDOUT:
  86. /* No ready / busy check necessary */
  87. hwctrl(mtd, NAND_CMD_RNDOUTSTART, NAND_CTRL_CLE |
  88. NAND_CTRL_CHANGE);
  89. hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
  90. return 0;
  91. case NAND_CMD_READ0:
  92. /* Latch in address */
  93. hwctrl(mtd, NAND_CMD_READSTART,
  94. NAND_CTRL_CLE | NAND_CTRL_CHANGE);
  95. hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
  96. }
  97. /*
  98. * Apply this short delay always to ensure that we do wait tWB in
  99. * any case on any machine.
  100. */
  101. ndelay(150);
  102. while (!this->dev_ready(mtd))
  103. ;
  104. return 0;
  105. }
  106. static int nand_is_bad_block(int block)
  107. {
  108. struct nand_chip *this = mtd_to_nand(mtd);
  109. nand_command(block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS,
  110. NAND_CMD_READOOB);
  111. /*
  112. * Read one byte (or two if it's a 16 bit chip).
  113. */
  114. if (this->options & NAND_BUSWIDTH_16) {
  115. if (readw(this->IO_ADDR_R) != 0xffff)
  116. return 1;
  117. } else {
  118. if (readb(this->IO_ADDR_R) != 0xff)
  119. return 1;
  120. }
  121. return 0;
  122. }
  123. static int nand_read_page(int block, int page, void *dst)
  124. {
  125. struct nand_chip *this = mtd_to_nand(mtd);
  126. u_char ecc_calc[ECCTOTAL];
  127. u_char ecc_code[ECCTOTAL];
  128. u_char oob_data[CONFIG_SYS_NAND_OOBSIZE];
  129. int i;
  130. int eccsize = CONFIG_SYS_NAND_ECCSIZE;
  131. int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
  132. int eccsteps = ECCSTEPS;
  133. uint8_t *p = dst;
  134. uint32_t data_pos = 0;
  135. uint8_t *oob = &oob_data[0] + nand_ecc_pos[0];
  136. uint32_t oob_pos = eccsize * eccsteps + nand_ecc_pos[0];
  137. nand_command(block, page, 0, NAND_CMD_READ0);
  138. for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
  139. this->ecc.hwctl(mtd, NAND_ECC_READ);
  140. nand_command(block, page, data_pos, NAND_CMD_RNDOUT);
  141. this->read_buf(mtd, p, eccsize);
  142. nand_command(block, page, oob_pos, NAND_CMD_RNDOUT);
  143. this->read_buf(mtd, oob, eccbytes);
  144. this->ecc.calculate(mtd, p, &ecc_calc[i]);
  145. data_pos += eccsize;
  146. oob_pos += eccbytes;
  147. oob += eccbytes;
  148. }
  149. /* Pick the ECC bytes out of the oob data */
  150. for (i = 0; i < ECCTOTAL; i++)
  151. ecc_code[i] = oob_data[nand_ecc_pos[i]];
  152. eccsteps = ECCSTEPS;
  153. p = dst;
  154. for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
  155. /* No chance to do something with the possible error message
  156. * from correct_data(). We just hope that all possible errors
  157. * are corrected by this routine.
  158. */
  159. this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
  160. }
  161. return 0;
  162. }
  163. /* nand_init() - initialize data to make nand usable by SPL */
  164. void nand_init(void)
  165. {
  166. /*
  167. * Init board specific nand support
  168. */
  169. mtd = nand_to_mtd(&nand_chip);
  170. nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W =
  171. (void __iomem *)CONFIG_SYS_NAND_BASE;
  172. board_nand_init(&nand_chip);
  173. if (nand_chip.select_chip)
  174. nand_chip.select_chip(mtd, 0);
  175. /* NAND chip may require reset after power-on */
  176. nand_command(0, 0, 0, NAND_CMD_RESET);
  177. }
  178. /* Unselect after operation */
  179. void nand_deselect(void)
  180. {
  181. if (nand_chip.select_chip)
  182. nand_chip.select_chip(mtd, -1);
  183. }
  184. #include "nand_spl_loaders.c"