miiphyutil.c 5.1 KB

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  1. /*
  2. * (C) Copyright 2001
  3. * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
  4. *
  5. * See file CREDITS for list of people who contributed to this
  6. * project.
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License as
  10. * published by the Free Software Foundation; either version 2 of
  11. * the License, or (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21. * MA 02111-1307 USA
  22. */
  23. /*
  24. * This provides a bit-banged interface to the ethernet MII management
  25. * channel.
  26. */
  27. #include <common.h>
  28. #include <miiphy.h>
  29. #if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
  30. /*****************************************************************************
  31. *
  32. * Read the OUI, manufacture's model number, and revision number.
  33. *
  34. * OUI: 22 bits (unsigned int)
  35. * Model: 6 bits (unsigned char)
  36. * Revision: 4 bits (unsigned char)
  37. *
  38. * Returns:
  39. * 0 on success
  40. */
  41. int miiphy_info (unsigned char addr,
  42. unsigned int *oui,
  43. unsigned char *model, unsigned char *rev)
  44. {
  45. unsigned int reg = 0;
  46. unsigned short tmp;
  47. if (miiphy_read (addr, PHY_PHYIDR2, &tmp) != 0) {
  48. #ifdef DEBUG
  49. puts ("PHY ID register 2 read failed\n");
  50. #endif
  51. return (-1);
  52. }
  53. reg = tmp;
  54. #ifdef DEBUG
  55. printf ("PHY_PHYIDR2 @ 0x%x = 0x%04x\n", addr, reg);
  56. #endif
  57. if (reg == 0xFFFF) {
  58. /* No physical device present at this address */
  59. return (-1);
  60. }
  61. if (miiphy_read (addr, PHY_PHYIDR1, &tmp) != 0) {
  62. #ifdef DEBUG
  63. puts ("PHY ID register 1 read failed\n");
  64. #endif
  65. return (-1);
  66. }
  67. reg |= tmp << 16;
  68. #ifdef DEBUG
  69. printf ("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
  70. #endif
  71. *oui = ( reg >> 10);
  72. *model = (unsigned char) ((reg >> 4) & 0x0000003F);
  73. *rev = (unsigned char) ( reg & 0x0000000F);
  74. return (0);
  75. }
  76. /*****************************************************************************
  77. *
  78. * Reset the PHY.
  79. * Returns:
  80. * 0 on success
  81. */
  82. int miiphy_reset (unsigned char addr)
  83. {
  84. unsigned short reg;
  85. int loop_cnt;
  86. if (miiphy_write (addr, PHY_BMCR, 0x8000) != 0) {
  87. #ifdef DEBUG
  88. puts ("PHY reset failed\n");
  89. #endif
  90. return (-1);
  91. }
  92. #ifdef CONFIG_PHY_RESET_DELAY
  93. udelay (CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
  94. #endif
  95. /*
  96. * Poll the control register for the reset bit to go to 0 (it is
  97. * auto-clearing). This should happen within 0.5 seconds per the
  98. * IEEE spec.
  99. */
  100. loop_cnt = 0;
  101. reg = 0x8000;
  102. while (((reg & 0x8000) != 0) && (loop_cnt++ < 1000000)) {
  103. if (miiphy_read (addr, PHY_BMCR, &reg) != 0) {
  104. # ifdef DEBUG
  105. puts ("PHY status read failed\n");
  106. # endif
  107. return (-1);
  108. }
  109. }
  110. if ((reg & 0x8000) == 0) {
  111. return (0);
  112. } else {
  113. puts ("PHY reset timed out\n");
  114. return (-1);
  115. }
  116. return (0);
  117. }
  118. /*****************************************************************************
  119. *
  120. * Determine the ethernet speed (10/100).
  121. */
  122. int miiphy_speed (unsigned char addr)
  123. {
  124. unsigned short reg;
  125. #if defined(CONFIG_PHY_GIGE)
  126. if (miiphy_read (addr, PHY_1000BTSR, &reg)) {
  127. printf ("PHY 1000BT Status read failed\n");
  128. } else {
  129. if (reg != 0xFFFF) {
  130. if ((reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) !=0) {
  131. return (_1000BASET);
  132. }
  133. }
  134. }
  135. #endif /* CONFIG_PHY_GIGE */
  136. if (miiphy_read (addr, PHY_ANLPAR, &reg)) {
  137. puts ("PHY speed1 read failed, assuming 10bT\n");
  138. return (_10BASET);
  139. }
  140. if ((reg & PHY_ANLPAR_100) != 0) {
  141. return (_100BASET);
  142. } else {
  143. return (_10BASET);
  144. }
  145. }
  146. /*****************************************************************************
  147. *
  148. * Determine full/half duplex.
  149. */
  150. int miiphy_duplex (unsigned char addr)
  151. {
  152. unsigned short reg;
  153. #if defined(CONFIG_PHY_GIGE)
  154. if (miiphy_read (addr, PHY_1000BTSR, &reg)) {
  155. printf ("PHY 1000BT Status read failed\n");
  156. } else {
  157. if ( (reg != 0xFFFF) &&
  158. (reg & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) ) {
  159. if ((reg & PHY_1000BTSR_1000FD) !=0) {
  160. return (FULL);
  161. } else {
  162. return (HALF);
  163. }
  164. }
  165. }
  166. #endif /* CONFIG_PHY_GIGE */
  167. if (miiphy_read (addr, PHY_ANLPAR, &reg)) {
  168. puts ("PHY duplex read failed, assuming half duplex\n");
  169. return (HALF);
  170. }
  171. if ((reg & (PHY_ANLPAR_10FD | PHY_ANLPAR_TXFD)) != 0) {
  172. return (FULL);
  173. } else {
  174. return (HALF);
  175. }
  176. }
  177. #ifdef CFG_FAULT_ECHO_LINK_DOWN
  178. /*****************************************************************************
  179. *
  180. * Determine link status
  181. */
  182. int miiphy_link (unsigned char addr)
  183. {
  184. unsigned short reg;
  185. /* dummy read; needed to latch some phys */
  186. (void)miiphy_read(addr, PHY_BMSR, &reg);
  187. if (miiphy_read (addr, PHY_BMSR, &reg)) {
  188. puts ("PHY_BMSR read failed, assuming no link\n");
  189. return (0);
  190. }
  191. /* Determine if a link is active */
  192. if ((reg & PHY_BMSR_LS) != 0) {
  193. return (1);
  194. } else {
  195. return (0);
  196. }
  197. }
  198. #endif
  199. #endif /* CONFIG_MII || (CONFIG_COMMANDS & CFG_CMD_MII) */