README 15 KB

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  1. Introduction:
  2. -------------
  3. The J721e family of SoCs are part of K3 Multicore SoC architecture platform
  4. targeting automotive applications. They are designed as a low power, high
  5. performance and highly integrated device architecture, adding significant
  6. enhancement on processing power, graphics capability, video and imaging
  7. processing, virtualization and coherent memory support.
  8. The device is partitioned into three functional domains, each containing
  9. specific processing cores and peripherals:
  10. 1. Wake-up (WKUP) domain:
  11. - Device Management and Security Controller (DMSC)
  12. 2. Microcontroller (MCU) domain:
  13. - Dual Core ARM Cortex-R5F processor
  14. 3. MAIN domain:
  15. - Dual core 64-bit ARM Cortex-A72
  16. - 2 x Dual cortex ARM Cortex-R5 subsystem
  17. - 2 x C66x Digital signal processor sub system
  18. - C71x Digital signal processor sub-system with MMA.
  19. More info can be found in TRM: http://www.ti.com/lit/pdf/spruil1
  20. Boot Flow:
  21. ----------
  22. Boot flow is similar to that of AM65x SoC and extending it with remoteproc
  23. support. Below is the pictorial representation of boot flow:
  24. +------------------------------------------------------------------------+-----------------------+
  25. | DMSC | MCU R5 | A72 | MAIN R5/C66x/C7x |
  26. +------------------------------------------------------------------------+-----------------------+
  27. | +--------+ | | | |
  28. | | Reset | | | | |
  29. | +--------+ | | | |
  30. | : | | | |
  31. | +--------+ | +-----------+ | | |
  32. | | *ROM* |----------|-->| Reset rls | | | |
  33. | +--------+ | +-----------+ | | |
  34. | | | | : | | |
  35. | | ROM | | : | | |
  36. | |services| | : | | |
  37. | | | | +-------------+ | | |
  38. | | | | | *R5 ROM* | | | |
  39. | | | | +-------------+ | | |
  40. | | |<---------|---|Load and auth| | | |
  41. | | | | | tiboot3.bin | | | |
  42. | | | | +-------------+ | | |
  43. | | | | : | | |
  44. | | | | : | | |
  45. | | | | : | | |
  46. | | | | +-------------+ | | |
  47. | | | | | *R5 SPL* | | | |
  48. | | | | +-------------+ | | |
  49. | | | | | Load | | | |
  50. | | | | | sysfw.itb | | | |
  51. | | Start | | +-------------+ | | |
  52. | | System |<---------|---| Start | | | |
  53. | |Firmware| | | SYSFW | | | |
  54. | +--------+ | +-------------+ | | |
  55. | : | | | | | |
  56. | +---------+ | | Load | | | |
  57. | | *SYSFW* | | | system | | | |
  58. | +---------+ | | Config data | | | |
  59. | | |<--------|---| | | | |
  60. | | | | +-------------+ | | |
  61. | | | | | DDR | | | |
  62. | | | | | config | | | |
  63. | | | | +-------------+ | | |
  64. | | | | | Load | | | |
  65. | | | | | tispl.bin | | | |
  66. | | | | +-------------+ | | |
  67. | | | | | Load R5 | | | |
  68. | | | | | firmware | | | |
  69. | | | | +-------------+ | | |
  70. | | |<--------|---| Start A72 | | | |
  71. | | | | | and jump to | | | |
  72. | | | | | next image | | | |
  73. | | | | +-------------+ | | |
  74. | | | | | +-----------+ | |
  75. | | |---------|-----------------------|---->| Reset rls | | |
  76. | | | | | +-----------+ | |
  77. | | DMSC | | | : | |
  78. | |Services | | | +-----------+ | |
  79. | | |<--------|-----------------------|---->|*ATF/OPTEE*| | |
  80. | | | | | +-----------+ | |
  81. | | | | | : | |
  82. | | | | | +-----------+ | |
  83. | | |<--------|-----------------------|---->| *A72 SPL* | | |
  84. | | | | | +-----------+ | |
  85. | | | | | | Load | | |
  86. | | | | | | u-boot.img| | |
  87. | | | | | +-----------+ | |
  88. | | | | | : | |
  89. | | | | | +-----------+ | |
  90. | | |<--------|-----------------------|---->| *U-Boot* | | |
  91. | | | | | +-----------+ | |
  92. | | | | | | prompt | | |
  93. | | | | | +-----------+ | |
  94. | | | | | | Load R5 | | |
  95. | | | | | | Firmware | | |
  96. | | | | | +-----------+ | |
  97. | | |<--------|-----------------------|-----| Start R5 | | +-----------+ |
  98. | | |---------|-----------------------|-----+-----------+-----|----->| R5 starts | |
  99. | | | | | | Load C6 | | +-----------+ |
  100. | | | | | | Firmware | | |
  101. | | | | | +-----------+ | |
  102. | | |<--------|-----------------------|-----| Start C6 | | +-----------+ |
  103. | | |---------|-----------------------|-----+-----------+-----|----->| C6 starts | |
  104. | | | | | | Load C7 | | +-----------+ |
  105. | | | | | | Firmware | | |
  106. | | | | | +-----------+ | |
  107. | | |<--------|-----------------------|-----| Start C7 | | +-----------+ |
  108. | | |---------|-----------------------|-----+-----------+-----|----->| C7 starts | |
  109. | +---------+ | | | +-----------+ |
  110. | | | | |
  111. +------------------------------------------------------------------------+-----------------------+
  112. - Here DMSC acts as master and provides all the critical services. R5/A72
  113. requests DMSC to get these services done as shown in the above diagram.
  114. Sources:
  115. --------
  116. 1. SYSFW:
  117. Tree: git://git.ti.com/k3-image-gen/k3-image-gen.git
  118. Branch: master
  119. 2. ATF:
  120. Tree: https://github.com/ARM-software/arm-trusted-firmware.git
  121. Branch: master
  122. 3. OPTEE:
  123. Tree: https://github.com/OP-TEE/optee_os.git
  124. Branch: master
  125. 4. U-Boot:
  126. Tree: https://source.denx.de/u-boot/u-boot
  127. Branch: master
  128. Build procedure:
  129. ----------------
  130. 1. SYSFW:
  131. $ make CROSS_COMPILE=arm-linux-gnueabihf-
  132. 2. ATF:
  133. $ make CROSS_COMPILE=aarch64-linux-gnu- ARCH=aarch64 PLAT=k3 TARGET_BOARD=generic SPD=opteed
  134. 3. OPTEE:
  135. $ make PLATFORM=k3-j721e CFG_ARM64_core=y
  136. 4. U-Boot:
  137. 4.1. R5:
  138. $ make CROSS_COMPILE=arm-linux-gnueabihf- j721e_evm_r5_defconfig O=/tmp/r5
  139. $ make CROSS_COMPILE=arm-linux-gnueabihf- O=/tmp/r5
  140. 4.2. A72:
  141. $ make CROSS_COMPILE=aarch64-linux-gnu- j721e_evm_a72_defconfig O=/tmp/a72
  142. $ make CROSS_COMPILE=aarch64-linux-gnu- ATF=<path to ATF dir>/build/k3/generic/release/bl31.bin TEE=<path to OPTEE OS dir>/out/arm-plat-k3/core/tee-pager_v2.bin O=/tmp/a72
  143. Target Images
  144. --------------
  145. Copy the below images to an SD card and boot:
  146. - sysfw.itb from step 1
  147. - tiboot3.bin from step 4.1
  148. - tispl.bin, u-boot.img from 4.2
  149. Image formats:
  150. --------------
  151. - tiboot3.bin:
  152. +-----------------------+
  153. | X.509 |
  154. | Certificate |
  155. | +-------------------+ |
  156. | | | |
  157. | | R5 | |
  158. | | u-boot-spl.bin | |
  159. | | | |
  160. | +-------------------+ |
  161. | | | |
  162. | | FIT header | |
  163. | | +---------------+ | |
  164. | | | | | |
  165. | | | DTB 1...N | | |
  166. | | +---------------+ | |
  167. | +-------------------+ |
  168. +-----------------------+
  169. - tispl.bin
  170. +-----------------------+
  171. | |
  172. | FIT HEADER |
  173. | +-------------------+ |
  174. | | | |
  175. | | A72 ATF | |
  176. | +-------------------+ |
  177. | | | |
  178. | | A72 OPTEE | |
  179. | +-------------------+ |
  180. | | | |
  181. | | A72 SPL | |
  182. | +-------------------+ |
  183. | | | |
  184. | | SPL DTB 1...N | |
  185. | +-------------------+ |
  186. +-----------------------+
  187. - sysfw.itb
  188. +-----------------------+
  189. | |
  190. | FIT HEADER |
  191. | +-------------------+ |
  192. | | | |
  193. | | sysfw.bin | |
  194. | +-------------------+ |
  195. | | | |
  196. | | board config | |
  197. | +-------------------+ |
  198. | | | |
  199. | | PM config | |
  200. | +-------------------+ |
  201. | | | |
  202. | | RM config | |
  203. | +-------------------+ |
  204. | | | |
  205. | | Secure config | |
  206. | +-------------------+ |
  207. +-----------------------+
  208. OSPI:
  209. -----
  210. ROM supports booting from OSPI from offset 0x0.
  211. Flashing images to OSPI:
  212. Below commands can be used to download tiboot3.bin, tispl.bin, u-boot.img,
  213. and sysfw.itb over tftp and then flash those to OSPI at their respective
  214. addresses.
  215. => sf probe
  216. => tftp ${loadaddr} tiboot3.bin
  217. => sf update $loadaddr 0x0 $filesize
  218. => tftp ${loadaddr} tispl.bin
  219. => sf update $loadaddr 0x80000 $filesize
  220. => tftp ${loadaddr} u-boot.img
  221. => sf update $loadaddr 0x280000 $filesize
  222. => tftp ${loadaddr} sysfw.itb
  223. => sf update $loadaddr 0x6C0000 $filesize
  224. Flash layout for OSPI:
  225. 0x0 +----------------------------+
  226. | ospi.tiboot3(512K) |
  227. | |
  228. 0x80000 +----------------------------+
  229. | ospi.tispl(2M) |
  230. | |
  231. 0x280000 +----------------------------+
  232. | ospi.u-boot(4M) |
  233. | |
  234. 0x680000 +----------------------------+
  235. | ospi.env(128K) |
  236. | |
  237. 0x6A0000 +----------------------------+
  238. | ospi.env.backup (128K) |
  239. | |
  240. 0x6C0000 +----------------------------+
  241. | ospi.sysfw(1M) |
  242. | |
  243. 0x7C0000 +----------------------------+
  244. | padding (256k) |
  245. 0x800000 +----------------------------+
  246. | ospi.rootfs(UBIFS) |
  247. | |
  248. +----------------------------+