spl.c 3.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2019 NXP
  4. */
  5. #include <common.h>
  6. #include <command.h>
  7. #include <cpu_func.h>
  8. #include <hang.h>
  9. #include <image.h>
  10. #include <init.h>
  11. #include <log.h>
  12. #include <spl.h>
  13. #include <asm/global_data.h>
  14. #include <asm/io.h>
  15. #include <asm/mach-imx/iomux-v3.h>
  16. #include <asm/arch/clock.h>
  17. #include <asm/arch/imx8mm_pins.h>
  18. #include <asm/arch/sys_proto.h>
  19. #include <asm/mach-imx/boot_mode.h>
  20. #include <asm/arch/ddr.h>
  21. #include <dm/uclass.h>
  22. #include <dm/device.h>
  23. #include <dm/uclass-internal.h>
  24. #include <dm/device-internal.h>
  25. #include <power/pmic.h>
  26. #include <power/pca9450.h>
  27. DECLARE_GLOBAL_DATA_PTR;
  28. int spl_board_boot_device(enum boot_device boot_dev_spl)
  29. {
  30. switch (boot_dev_spl) {
  31. case SD2_BOOT:
  32. case MMC2_BOOT:
  33. return BOOT_DEVICE_MMC1;
  34. case SD3_BOOT:
  35. case MMC3_BOOT:
  36. return BOOT_DEVICE_MMC2;
  37. default:
  38. return BOOT_DEVICE_NONE;
  39. }
  40. }
  41. static void spl_dram_init(void)
  42. {
  43. ddr_init(&dram_timing);
  44. }
  45. void spl_board_init(void)
  46. {
  47. puts("Normal Boot\n");
  48. }
  49. #ifdef CONFIG_SPL_LOAD_FIT
  50. int board_fit_config_name_match(const char *name)
  51. {
  52. /* Just empty function now - can't decide what to choose */
  53. debug("%s: %s\n", __func__, name);
  54. return 0;
  55. }
  56. #endif
  57. #define UART_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_FSEL1)
  58. #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE)
  59. static iomux_v3_cfg_t const uart_pads[] = {
  60. IMX8MM_PAD_UART2_RXD_UART2_RX | MUX_PAD_CTRL(UART_PAD_CTRL),
  61. IMX8MM_PAD_UART2_TXD_UART2_TX | MUX_PAD_CTRL(UART_PAD_CTRL),
  62. };
  63. static iomux_v3_cfg_t const wdog_pads[] = {
  64. IMX8MM_PAD_GPIO1_IO02_WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL),
  65. };
  66. int board_early_init_f(void)
  67. {
  68. struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR;
  69. imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads));
  70. set_wdog_reset(wdog);
  71. imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
  72. return 0;
  73. }
  74. static int power_init_board(void)
  75. {
  76. struct udevice *dev;
  77. int ret;
  78. ret = pmic_get("pca9450@25", &dev);
  79. if (ret == -ENODEV) {
  80. puts("No pmic\n");
  81. return 0;
  82. }
  83. if (ret != 0)
  84. return ret;
  85. /* BUCKxOUT_DVS0/1 control BUCK123 output */
  86. pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29);
  87. /* Buck 1 DVS control through PMIC_STBY_REQ */
  88. pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59);
  89. /* Set DVS1 to 0.8v for suspend */
  90. pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x10);
  91. /* increase VDD_DRAM to 0.95v for 3Ghz DDR */
  92. pmic_reg_write(dev, PCA9450_BUCK3OUT_DVS0, 0x1C);
  93. /* VDD_DRAM needs off in suspend, set B1_ENMODE=10 (ON by PMIC_ON_REQ = H && PMIC_STBY_REQ = L) */
  94. pmic_reg_write(dev, PCA9450_BUCK3CTRL, 0x4a);
  95. /* set VDD_SNVS_0V8 from default 0.85V */
  96. pmic_reg_write(dev, PCA9450_LDO2CTRL, 0xC0);
  97. /* set WDOG_B_CFG to cold reset */
  98. pmic_reg_write(dev, PCA9450_RESET_CTRL, 0xA1);
  99. return 0;
  100. }
  101. void board_init_f(ulong dummy)
  102. {
  103. struct udevice *dev;
  104. int ret;
  105. arch_cpu_init();
  106. init_uart_clk(1);
  107. board_early_init_f();
  108. timer_init();
  109. preloader_console_init();
  110. /* Clear the BSS. */
  111. memset(__bss_start, 0, __bss_end - __bss_start);
  112. ret = spl_early_init();
  113. if (ret) {
  114. debug("spl_early_init() failed: %d\n", ret);
  115. hang();
  116. }
  117. ret = uclass_get_device_by_name(UCLASS_CLK,
  118. "clock-controller@30380000",
  119. &dev);
  120. if (ret < 0) {
  121. printf("Failed to find clock node. Check device tree\n");
  122. hang();
  123. }
  124. enable_tzc380();
  125. power_init_board();
  126. /* DDR initialization */
  127. spl_dram_init();
  128. board_init_r(NULL, 0);
  129. }