imx8mn-beacon-baseboard.dtsi 6.8 KB

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  1. // SPDX-License-Identifier: (GPL-2.0 OR MIT)
  2. /*
  3. * Copyright 2020 Compass Electronics Group, LLC
  4. */
  5. / {
  6. leds {
  7. compatible = "gpio-leds";
  8. led-0 {
  9. label = "gen_led0";
  10. gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
  11. default-state = "off";
  12. };
  13. led-1 {
  14. label = "gen_led1";
  15. gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
  16. default-state = "off";
  17. };
  18. led-2 {
  19. label = "gen_led2";
  20. gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
  21. default-state = "off";
  22. };
  23. led-3 {
  24. pinctrl-names = "default";
  25. pinctrl-0 = <&pinctrl_led3>;
  26. label = "heartbeat";
  27. gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
  28. linux,default-trigger = "heartbeat";
  29. };
  30. };
  31. reg_audio: regulator-audio {
  32. compatible = "regulator-fixed";
  33. regulator-name = "3v3_aud";
  34. regulator-min-microvolt = <3300000>;
  35. regulator-max-microvolt = <3300000>;
  36. gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
  37. enable-active-high;
  38. };
  39. reg_usdhc2_vmmc: regulator-usdhc2 {
  40. compatible = "regulator-fixed";
  41. regulator-name = "vsd_3v3";
  42. regulator-min-microvolt = <3300000>;
  43. regulator-max-microvolt = <3300000>;
  44. gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
  45. enable-active-high;
  46. };
  47. reg_usb_otg_vbus: regulator-usb {
  48. compatible = "regulator-fixed";
  49. pinctrl-names = "default";
  50. pinctrl-0 = <&pinctrl_reg_usb_otg>;
  51. regulator-name = "usb_otg_vbus";
  52. regulator-min-microvolt = <5000000>;
  53. regulator-max-microvolt = <5000000>;
  54. gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>;
  55. enable-active-high;
  56. };
  57. sound {
  58. compatible = "fsl,imx-audio-wm8962";
  59. model = "wm8962-audio";
  60. audio-cpu = <&sai3>;
  61. audio-codec = <&wm8962>;
  62. audio-routing =
  63. "Headphone Jack", "HPOUTL",
  64. "Headphone Jack", "HPOUTR",
  65. "Ext Spk", "SPKOUTL",
  66. "Ext Spk", "SPKOUTR",
  67. "AMIC", "MICBIAS",
  68. "IN3R", "AMIC";
  69. };
  70. };
  71. &ecspi2 {
  72. pinctrl-names = "default";
  73. pinctrl-0 = <&pinctrl_espi2>;
  74. cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
  75. status = "okay";
  76. eeprom@0 {
  77. compatible = "microchip,at25160bn", "atmel,at25";
  78. reg = <0>;
  79. spi-max-frequency = <5000000>;
  80. spi-cpha;
  81. spi-cpol;
  82. pagesize = <32>;
  83. size = <2048>;
  84. address-width = <16>;
  85. };
  86. };
  87. &i2c4 {
  88. clock-frequency = <400000>;
  89. pinctrl-names = "default";
  90. pinctrl-0 = <&pinctrl_i2c4>;
  91. status = "okay";
  92. pca6416_0: gpio@20 {
  93. compatible = "nxp,pcal6416";
  94. reg = <0x20>;
  95. pinctrl-names = "default";
  96. pinctrl-0 = <&pinctrl_pcal6414>;
  97. gpio-controller;
  98. #gpio-cells = <2>;
  99. interrupt-parent = <&gpio4>;
  100. interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
  101. };
  102. pca6416_1: gpio@21 {
  103. compatible = "nxp,pcal6416";
  104. reg = <0x21>;
  105. gpio-controller;
  106. #gpio-cells = <2>;
  107. interrupt-parent = <&gpio4>;
  108. interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
  109. };
  110. wm8962: audio-codec@1a {
  111. compatible = "wlf,wm8962";
  112. reg = <0x1a>;
  113. clocks = <&clk IMX8MN_CLK_SAI3_ROOT>;
  114. clock-names = "xclk";
  115. DCVDD-supply = <&reg_audio>;
  116. DBVDD-supply = <&reg_audio>;
  117. AVDD-supply = <&reg_audio>;
  118. CPVDD-supply = <&reg_audio>;
  119. MICVDD-supply = <&reg_audio>;
  120. PLLVDD-supply = <&reg_audio>;
  121. SPKVDD1-supply = <&reg_audio>;
  122. SPKVDD2-supply = <&reg_audio>;
  123. gpio-cfg = <
  124. 0x0000 /* 0:Default */
  125. 0x0000 /* 1:Default */
  126. 0x0000 /* 2:FN_DMICCLK */
  127. 0x0000 /* 3:Default */
  128. 0x0000 /* 4:FN_DMICCDAT */
  129. 0x0000 /* 5:Default */
  130. >;
  131. };
  132. };
  133. &easrc {
  134. fsl,asrc-rate = <48000>;
  135. status = "okay";
  136. };
  137. &sai3 {
  138. pinctrl-names = "default";
  139. pinctrl-0 = <&pinctrl_sai3>;
  140. assigned-clocks = <&clk IMX8MN_CLK_SAI3>;
  141. assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>;
  142. assigned-clock-rates = <24576000>;
  143. fsl,sai-mclk-direction-output;
  144. status = "okay";
  145. };
  146. &snvs_pwrkey {
  147. status = "okay";
  148. };
  149. &uart2 { /* console */
  150. pinctrl-names = "default";
  151. pinctrl-0 = <&pinctrl_uart2>;
  152. status = "okay";
  153. };
  154. &uart3 {
  155. pinctrl-names = "default";
  156. pinctrl-0 = <&pinctrl_uart3>;
  157. assigned-clocks = <&clk IMX8MN_CLK_UART3>;
  158. assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>;
  159. status = "okay";
  160. };
  161. &usbotg1 {
  162. vbus-supply = <&reg_usb_otg_vbus>;
  163. disable-over-current;
  164. dr_mode="otg";
  165. status = "okay";
  166. };
  167. &usdhc2 {
  168. pinctrl-names = "default", "state_100mhz", "state_200mhz";
  169. pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
  170. pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
  171. pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
  172. bus-width = <4>;
  173. vmmc-supply = <&reg_usdhc2_vmmc>;
  174. status = "okay";
  175. };
  176. &iomuxc {
  177. pinctrl_espi2: espi2grp {
  178. fsl,pins = <
  179. MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
  180. MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
  181. MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
  182. MX8MN_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x41
  183. >;
  184. };
  185. pinctrl_i2c2: i2c2grp {
  186. fsl,pins = <
  187. MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3
  188. MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3
  189. >;
  190. };
  191. pinctrl_i2c4: i2c4grp {
  192. fsl,pins = <
  193. MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3
  194. MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3
  195. >;
  196. };
  197. pinctrl_led3: led3grp {
  198. fsl,pins = <
  199. MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x41
  200. >;
  201. };
  202. pinctrl_pcal6414: pcal6414-gpiogrp {
  203. fsl,pins = <
  204. MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19
  205. >;
  206. };
  207. pinctrl_reg_usb_otg: reg-otggrp {
  208. fsl,pins = <
  209. MX8MN_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19
  210. >;
  211. };
  212. pinctrl_sai3: sai3grp {
  213. fsl,pins = <
  214. MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
  215. MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6
  216. MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6
  217. MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6
  218. MX8MN_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6
  219. >;
  220. };
  221. pinctrl_uart2: uart2grp {
  222. fsl,pins = <
  223. MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140
  224. MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140
  225. >;
  226. };
  227. pinctrl_uart3: uart3grp {
  228. fsl,pins = <
  229. MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x40
  230. MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x40
  231. >;
  232. };
  233. pinctrl_usdhc2_gpio: usdhc2gpiogrp {
  234. fsl,pins = <
  235. MX8MN_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x41
  236. MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41
  237. >;
  238. };
  239. pinctrl_usdhc2: usdhc2grp {
  240. fsl,pins = <
  241. MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x190
  242. MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
  243. MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
  244. MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
  245. MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
  246. MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
  247. MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
  248. >;
  249. };
  250. pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
  251. fsl,pins = <
  252. MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x194
  253. MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
  254. MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
  255. MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
  256. MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
  257. MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
  258. MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
  259. >;
  260. };
  261. pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
  262. fsl,pins = <
  263. MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x196
  264. MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
  265. MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
  266. MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
  267. MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
  268. MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
  269. MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0
  270. >;
  271. };
  272. };