imx6q-marsboard.dts 9.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417
  1. /*
  2. * Copyright (C) 2016 Sergio Prado (sergio.prado@e-labworks.com)
  3. *
  4. * This file is dual-licensed: you can use it either under the terms
  5. * of the GPL or the X11 license, at your option. Note that this dual
  6. * licensing only applies to this file, and not this project as a
  7. * whole.
  8. *
  9. * a) This file is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * version 2 as published by the Free Software Foundation.
  12. *
  13. * This file is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * Or, alternatively,
  19. *
  20. * b) Permission is hereby granted, free of charge, to any person
  21. * obtaining a copy of this software and associated documentation
  22. * files (the "Software"), to deal in the Software without
  23. * restriction, including without limitation the rights to use,
  24. * copy, modify, merge, publish, distribute, sublicense, and/or
  25. * sell copies of the Software, and to permit persons to whom the
  26. * Software is furnished to do so, subject to the following
  27. * conditions:
  28. *
  29. * The above copyright notice and this permission notice shall be
  30. * included in all copies or substantial portions of the Software.
  31. *
  32. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  33. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  34. * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  35. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  36. * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  37. * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  38. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  39. * OTHER DEALINGS IN THE SOFTWARE.
  40. */
  41. /dts-v1/;
  42. #include "imx6q.dtsi"
  43. #include <dt-bindings/gpio/gpio.h>
  44. / {
  45. model = "Embest MarS Board i.MX6Dual";
  46. compatible = "embest,imx6q-marsboard", "fsl,imx6q";
  47. memory@10000000 {
  48. device_type = "memory";
  49. reg = <0x10000000 0x40000000>;
  50. };
  51. reg_3p3v: regulator-3p3v {
  52. compatible = "regulator-fixed";
  53. regulator-name = "3P3V";
  54. regulator-min-microvolt = <3300000>;
  55. regulator-max-microvolt = <3300000>;
  56. };
  57. reg_usb_otg_vbus: regulator-usb-otg-vbus {
  58. compatible = "regulator-fixed";
  59. regulator-name = "usb_otg_vbus";
  60. regulator-min-microvolt = <5000000>;
  61. regulator-max-microvolt = <5000000>;
  62. gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
  63. enable-active-high;
  64. };
  65. leds {
  66. compatible = "gpio-leds";
  67. pinctrl-names = "default";
  68. pinctrl-0 = <&pinctrl_led>;
  69. user1 {
  70. label = "imx6:green:user1";
  71. gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
  72. default-state = "off";
  73. linux,default-trigger = "heartbeat";
  74. };
  75. user2 {
  76. label = "imx6:green:user2";
  77. gpios = <&gpio3 28 GPIO_ACTIVE_LOW>;
  78. default-state = "off";
  79. };
  80. };
  81. };
  82. &audmux {
  83. pinctrl-names = "default";
  84. pinctrl-0 = <&pinctrl_audmux>;
  85. status = "okay";
  86. };
  87. &ecspi1 {
  88. pinctrl-names = "default";
  89. pinctrl-0 = <&pinctrl_ecspi1>;
  90. cs-gpios = <&gpio2 30 GPIO_ACTIVE_LOW>;
  91. status = "okay";
  92. m25p80@0 {
  93. compatible = "microchip,sst25vf016b";
  94. spi-max-frequency = <20000000>;
  95. reg = <0>;
  96. };
  97. };
  98. &fec {
  99. pinctrl-names = "default";
  100. pinctrl-0 = <&pinctrl_enet>;
  101. phy-mode = "rgmii-id";
  102. phy-handle = <&rgmii_phy>;
  103. status = "okay";
  104. mdio {
  105. #address-cells = <1>;
  106. #size-cells = <0>;
  107. /* Atheros AR8035 PHY */
  108. rgmii_phy: ethernet-phy@4 {
  109. reg = <4>;
  110. interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>;
  111. reset-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
  112. reset-assert-us = <10000>;
  113. reset-deassert-us = <1000>;
  114. };
  115. };
  116. };
  117. &hdmi {
  118. ddc-i2c-bus = <&i2c2>;
  119. status = "okay";
  120. };
  121. &i2c1 {
  122. clock-frequency = <100000>;
  123. pinctrl-names = "default";
  124. pinctrl-0 = <&pinctrl_i2c1>;
  125. status = "okay";
  126. };
  127. &i2c2 {
  128. clock-frequency = <100000>;
  129. pinctrl-names = "default";
  130. pinctrl-0 = <&pinctrl_i2c2>;
  131. status = "okay";
  132. };
  133. &i2c3 {
  134. clock-frequency = <100000>;
  135. pinctrl-names = "default";
  136. pinctrl-0 = <&pinctrl_i2c3>;
  137. status = "okay";
  138. };
  139. &pwm1 {
  140. pinctrl-names = "default";
  141. pinctrl-0 = <&pinctrl_pwm1>;
  142. status = "okay";
  143. };
  144. &pwm2 {
  145. pinctrl-names = "default";
  146. pinctrl-0 = <&pinctrl_pwm2>;
  147. status = "okay";
  148. };
  149. &pwm3 {
  150. pinctrl-names = "default";
  151. pinctrl-0 = <&pinctrl_pwm3>;
  152. status = "okay";
  153. };
  154. &pwm4 {
  155. pinctrl-names = "default";
  156. pinctrl-0 = <&pinctrl_pwm4>;
  157. status = "okay";
  158. };
  159. &uart1 {
  160. pinctrl-names = "default";
  161. pinctrl-0 = <&pinctrl_uart1>;
  162. status = "okay";
  163. };
  164. &uart2 {
  165. pinctrl-names = "default";
  166. pinctrl-0 = <&pinctrl_uart2>;
  167. status = "okay";
  168. };
  169. &uart3 {
  170. pinctrl-names = "default";
  171. pinctrl-0 = <&pinctrl_uart3>;
  172. status = "okay";
  173. };
  174. &uart4 {
  175. pinctrl-names = "default";
  176. pinctrl-0 = <&pinctrl_uart4>;
  177. status = "okay";
  178. };
  179. &uart5 {
  180. pinctrl-names = "default";
  181. pinctrl-0 = <&pinctrl_uart5>;
  182. status = "okay";
  183. };
  184. &usbh1 {
  185. dr_mode = "host";
  186. disable-over-current;
  187. status = "okay";
  188. };
  189. &usbotg {
  190. vbus-supply = <&reg_usb_otg_vbus>;
  191. pinctrl-names = "default";
  192. pinctrl-0 = <&pinctrl_usbotg>;
  193. dr_mode = "otg";
  194. disable-over-current;
  195. status = "okay";
  196. };
  197. &usdhc2 {
  198. pinctrl-names = "default";
  199. pinctrl-0 = <&pinctrl_usdhc2>;
  200. vmmc-supply = <&reg_3p3v>;
  201. cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
  202. wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
  203. status = "okay";
  204. };
  205. &usdhc3 {
  206. pinctrl-names = "default";
  207. pinctrl-0 = <&pinctrl_usdhc3>;
  208. vmmc-supply = <&reg_3p3v>;
  209. non-removable;
  210. status = "okay";
  211. };
  212. &iomuxc {
  213. pinctrl_audmux: audmuxgrp {
  214. fsl,pins = <
  215. MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
  216. MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
  217. MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
  218. MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
  219. MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* CAM_MCLK */
  220. >;
  221. };
  222. pinctrl_ecspi1: ecspi1grp {
  223. fsl,pins = <
  224. MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
  225. MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
  226. MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
  227. MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x000b1 /* CS0 */
  228. >;
  229. };
  230. pinctrl_enet: enetgrp {
  231. fsl,pins = <
  232. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
  233. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
  234. MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
  235. MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
  236. MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
  237. MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
  238. MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
  239. MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
  240. /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
  241. MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1
  242. /* AR8035 pin strapping: IO voltage: pull up */
  243. MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
  244. /* AR8035 pin strapping: PHYADDR#0: pull down */
  245. MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x13030
  246. /* AR8035 pin strapping: PHYADDR#1: pull down */
  247. MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x13030
  248. /* AR8035 pin strapping: MODE#1: pull up */
  249. MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
  250. /* AR8035 pin strapping: MODE#3: pull up */
  251. MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
  252. /* AR8035 pin strapping: MODE#0: pull down */
  253. MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x13030
  254. /* GPIO16 -> AR8035 25MHz */
  255. MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
  256. /* RGMII_nRST */
  257. MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0
  258. /* AR8035 interrupt */
  259. MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x180b0
  260. >;
  261. };
  262. pinctrl_i2c1: i2c1grp {
  263. fsl,pins = <
  264. MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
  265. MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
  266. >;
  267. };
  268. pinctrl_i2c2: i2c2grp {
  269. fsl,pins = <
  270. MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
  271. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  272. >;
  273. };
  274. pinctrl_i2c3: i2c3grp {
  275. fsl,pins = <
  276. MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
  277. MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
  278. >;
  279. };
  280. pinctrl_led: ledgrp {
  281. fsl,pins = <
  282. MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b1 /* LED1 */
  283. MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x1b0b1 /* LED2 */
  284. >;
  285. };
  286. pinctrl_pwm1: pwm1grp {
  287. fsl,pins = <
  288. MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b1
  289. >;
  290. };
  291. pinctrl_pwm2: pwm2grp {
  292. fsl,pins = <
  293. MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b1
  294. >;
  295. };
  296. pinctrl_pwm3: pwm3grp {
  297. fsl,pins = <
  298. MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
  299. >;
  300. };
  301. pinctrl_pwm4: pwm4grp {
  302. fsl,pins = <
  303. MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
  304. >;
  305. };
  306. pinctrl_uart1: uart1grp {
  307. fsl,pins = <
  308. MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
  309. MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
  310. >;
  311. };
  312. pinctrl_uart2: uart2grp {
  313. fsl,pins = <
  314. MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
  315. MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
  316. >;
  317. };
  318. pinctrl_uart3: uart3grp {
  319. fsl,pins = <
  320. MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
  321. MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
  322. >;
  323. };
  324. pinctrl_uart4: uart4grp {
  325. fsl,pins = <
  326. MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
  327. MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
  328. >;
  329. };
  330. pinctrl_uart5: uart5grp {
  331. fsl,pins = <
  332. MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
  333. MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
  334. >;
  335. };
  336. pinctrl_usbotg: usbotggrp {
  337. fsl,pins = <
  338. MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
  339. MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
  340. MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x000b0 /* USB OTG POWER ENABLE */
  341. >;
  342. };
  343. pinctrl_usdhc2: usdhc2grp {
  344. fsl,pins = <
  345. MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
  346. MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
  347. MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
  348. MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
  349. MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
  350. MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
  351. MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0 /* CD */
  352. MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1f0b0 /* WP */
  353. >;
  354. };
  355. pinctrl_usdhc3: usdhc3grp {
  356. fsl,pins = <
  357. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17009
  358. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10009
  359. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17009
  360. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17009
  361. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17009
  362. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17009
  363. MX6QDL_PAD_SD3_RST__SD3_RESET 0x17009
  364. >;
  365. };
  366. };