bf518f-ezbrd.c 3.6 KB

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  1. /*
  2. * U-Boot - main board file
  3. *
  4. * Copyright (c) 2008-2009 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <common.h>
  9. #include <config.h>
  10. #include <command.h>
  11. #include <net.h>
  12. #include <netdev.h>
  13. #include <spi.h>
  14. #include <asm/blackfin.h>
  15. #include <asm/portmux.h>
  16. #include <asm/mach-common/bits/otp.h>
  17. #include <asm/sdh.h>
  18. DECLARE_GLOBAL_DATA_PTR;
  19. int checkboard(void)
  20. {
  21. printf("Board: ADI BF518F EZ-Board board\n");
  22. printf(" Support: http://blackfin.uclinux.org/\n");
  23. return 0;
  24. }
  25. #if defined(CONFIG_BFIN_MAC)
  26. static void board_init_enetaddr(uchar *mac_addr)
  27. {
  28. #ifndef CONFIG_SYS_NO_FLASH
  29. /* we cram the MAC in the last flash sector */
  30. uchar *board_mac_addr = (uchar *)0x203F0096;
  31. if (is_valid_ethaddr(board_mac_addr)) {
  32. memcpy(mac_addr, board_mac_addr, 6);
  33. eth_setenv_enetaddr("ethaddr", mac_addr);
  34. }
  35. #endif
  36. }
  37. /* Only the first run of boards had a KSZ switch */
  38. #if defined(CONFIG_BFIN_SPI) && __SILICON_REVISION__ == 0
  39. # define KSZ_POSSIBLE 1
  40. #else
  41. # define KSZ_POSSIBLE 0
  42. #endif
  43. #define KSZ_MAX_HZ 5000000
  44. #define KSZ_WRITE 0x02
  45. #define KSZ_READ 0x03
  46. #define KSZ_REG_CHID 0x00 /* Register 0: Chip ID0 */
  47. #define KSZ_REG_STPID 0x01 /* Register 1: Chip ID1 / Start Switch */
  48. #define KSZ_REG_GC9 0x0b /* Register 11: Global Control 9 */
  49. #define KSZ_REG_P3C0 0x30 /* Register 48: Port 3 Control 0 */
  50. static int ksz8893m_transfer(struct spi_slave *slave, uchar dir, uchar reg,
  51. uchar data, uchar result[3])
  52. {
  53. unsigned char dout[3] = { dir, reg, data, };
  54. return spi_xfer(slave, sizeof(dout) * 8, dout, result, SPI_XFER_BEGIN | SPI_XFER_END);
  55. }
  56. static int ksz8893m_reg_set(struct spi_slave *slave, uchar reg, uchar data)
  57. {
  58. unsigned char din[3];
  59. return ksz8893m_transfer(slave, KSZ_WRITE, reg, data, din);
  60. }
  61. static int ksz8893m_reg_read(struct spi_slave *slave, uchar reg)
  62. {
  63. int ret;
  64. unsigned char din[3];
  65. ret = ksz8893m_transfer(slave, KSZ_READ, reg, 0, din);
  66. return ret ? ret : din[2];
  67. }
  68. static int ksz8893m_reg_clear(struct spi_slave *slave, uchar reg, uchar mask)
  69. {
  70. return ksz8893m_reg_set(slave, reg, ksz8893m_reg_read(slave, reg) & mask);
  71. }
  72. static int ksz8893m_reset(struct spi_slave *slave)
  73. {
  74. int ret = 0;
  75. /* Disable STPID mode */
  76. ret |= ksz8893m_reg_clear(slave, KSZ_REG_GC9, 0x01);
  77. /* Disable VLAN tag insert on Port3 */
  78. ret |= ksz8893m_reg_clear(slave, KSZ_REG_P3C0, 0x04);
  79. /* Start switch */
  80. ret |= ksz8893m_reg_set(slave, KSZ_REG_STPID, 0x01);
  81. return ret;
  82. }
  83. static bool board_ksz_init(void)
  84. {
  85. static bool switch_is_alive = false;
  86. if (!switch_is_alive) {
  87. struct spi_slave *slave = spi_setup_slave(0, 1, KSZ_MAX_HZ, SPI_MODE_3);
  88. if (slave) {
  89. if (!spi_claim_bus(slave)) {
  90. bool phy_is_ksz = (ksz8893m_reg_read(slave, KSZ_REG_CHID) == 0x88);
  91. int ret = phy_is_ksz ? ksz8893m_reset(slave) : 0;
  92. switch_is_alive = (ret == 0);
  93. spi_release_bus(slave);
  94. }
  95. spi_free_slave(slave);
  96. }
  97. }
  98. return switch_is_alive;
  99. }
  100. int board_eth_init(bd_t *bis)
  101. {
  102. if (KSZ_POSSIBLE) {
  103. if (!board_ksz_init())
  104. return 0;
  105. }
  106. return bfin_EMAC_initialize(bis);
  107. }
  108. #endif
  109. int misc_init_r(void)
  110. {
  111. #ifdef CONFIG_BFIN_MAC
  112. uchar enetaddr[6];
  113. if (!eth_getenv_enetaddr("ethaddr", enetaddr))
  114. board_init_enetaddr(enetaddr);
  115. #endif
  116. #ifndef CONFIG_SYS_NO_FLASH
  117. /* we use the last sector for the MAC address / POST LDR */
  118. extern flash_info_t flash_info[];
  119. flash_protect(FLAG_PROTECT_SET, 0x203F0000, 0x203FFFFF, &flash_info[0]);
  120. #endif
  121. return 0;
  122. }
  123. int board_early_init_f(void)
  124. {
  125. /* connect async banks by default */
  126. const unsigned short pins[] = {
  127. P_AMS2, P_AMS3, 0,
  128. };
  129. return peripheral_request_list(pins, "async");
  130. }
  131. #ifdef CONFIG_BFIN_SDH
  132. int board_mmc_init(bd_t *bis)
  133. {
  134. return bfin_mmc_init(bis);
  135. }
  136. #endif