cpu.c 1.8 KB

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  1. /*
  2. * Copyright (C) 2011-2015 by Vladimir Zapolskiy <vz@mleia.com>
  3. *
  4. * SPDX-License-Identifier: GPL-2.0+
  5. */
  6. #include <common.h>
  7. #include <netdev.h>
  8. #include <asm/arch/cpu.h>
  9. #include <asm/arch/clk.h>
  10. #include <asm/arch/wdt.h>
  11. #include <asm/arch/sys_proto.h>
  12. #include <asm/io.h>
  13. static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;
  14. static struct wdt_regs *wdt = (struct wdt_regs *)WDT_BASE;
  15. void reset_cpu(ulong addr)
  16. {
  17. /* Enable watchdog clock */
  18. setbits_le32(&clk->timclk_ctrl, CLK_TIMCLK_WATCHDOG);
  19. /* To be compatible with the original U-Boot code:
  20. * addr: - 0: perform hard reset.
  21. * - !=0: perform a soft reset; i.e. "RESOUT_N" not asserted). */
  22. if (addr == 0) {
  23. /* Reset pulse length is 13005 peripheral clock frames */
  24. writel(13000, &wdt->pulse);
  25. /* Force WDOG_RESET2 and RESOUT_N signal active */
  26. writel(WDTIM_MCTRL_RESFRC2 | WDTIM_MCTRL_RESFRC1
  27. | WDTIM_MCTRL_M_RES2, &wdt->mctrl);
  28. } else {
  29. /* Force match output active */
  30. writel(0x01, &wdt->emr);
  31. /* Internal reset on match output (no pulse on "RESOUT_N") */
  32. writel(WDTIM_MCTRL_M_RES1, &wdt->mctrl);
  33. }
  34. while (1)
  35. /* NOP */;
  36. }
  37. #if defined(CONFIG_ARCH_CPU_INIT)
  38. int arch_cpu_init(void)
  39. {
  40. /*
  41. * It might be necessary to flush data cache, if U-Boot is loaded
  42. * from kickstart bootloader, e.g. from S1L loader
  43. */
  44. flush_dcache_all();
  45. return 0;
  46. }
  47. #else
  48. #error "You have to select CONFIG_ARCH_CPU_INIT"
  49. #endif
  50. #if defined(CONFIG_DISPLAY_CPUINFO)
  51. int print_cpuinfo(void)
  52. {
  53. printf("CPU: NXP LPC32XX\n");
  54. printf("CPU clock: %uMHz\n", get_hclk_pll_rate() / 1000000);
  55. printf("AHB bus clock: %uMHz\n", get_hclk_clk_rate() / 1000000);
  56. printf("Peripheral clock: %uMHz\n", get_periph_clk_rate() / 1000000);
  57. return 0;
  58. }
  59. #endif
  60. #ifdef CONFIG_LPC32XX_ETH
  61. int cpu_eth_init(bd_t *bis)
  62. {
  63. lpc32xx_eth_initialize(bis);
  64. return 0;
  65. }
  66. #endif