spl.c 2.4 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /* Copyright 2013 Freescale Semiconductor, Inc.
  3. */
  4. #include <common.h>
  5. #include <console.h>
  6. #include <env_internal.h>
  7. #include <malloc.h>
  8. #include <ns16550.h>
  9. #include <nand.h>
  10. #include <i2c.h>
  11. #include <mmc.h>
  12. #include <fsl_esdhc.h>
  13. #include <spi_flash.h>
  14. #include "../common/spl.h"
  15. DECLARE_GLOBAL_DATA_PTR;
  16. phys_size_t get_effective_memsize(void)
  17. {
  18. return CONFIG_SYS_L3_SIZE;
  19. }
  20. unsigned long get_board_sys_clk(void)
  21. {
  22. return CONFIG_SYS_CLK_FREQ;
  23. }
  24. unsigned long get_board_ddr_clk(void)
  25. {
  26. return CONFIG_DDR_CLK_FREQ;
  27. }
  28. void board_init_f(ulong bootflag)
  29. {
  30. u32 plat_ratio, sys_clk, ccb_clk;
  31. ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
  32. /* Memcpy existing GD at CONFIG_SPL_GD_ADDR */
  33. memcpy((void *)CONFIG_SPL_GD_ADDR, (void *)gd, sizeof(gd_t));
  34. /* Update GD pointer */
  35. gd = (gd_t *)(CONFIG_SPL_GD_ADDR);
  36. console_init_f();
  37. /* initialize selected port with appropriate baud rate */
  38. sys_clk = get_board_sys_clk();
  39. plat_ratio = (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
  40. ccb_clk = sys_clk * plat_ratio / 2;
  41. NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
  42. ccb_clk / 16 / CONFIG_BAUDRATE);
  43. #if defined(CONFIG_SPL_MMC_BOOT)
  44. puts("\nSD boot...\n");
  45. #elif defined(CONFIG_SPL_SPI_BOOT)
  46. puts("\nSPI boot...\n");
  47. #elif defined(CONFIG_SPL_NAND_BOOT)
  48. puts("\nNAND boot...\n");
  49. #endif
  50. relocate_code(CONFIG_SPL_RELOC_STACK, (gd_t *)CONFIG_SPL_GD_ADDR, 0x0);
  51. }
  52. void board_init_r(gd_t *gd, ulong dest_addr)
  53. {
  54. bd_t *bd;
  55. bd = (bd_t *)(gd + sizeof(gd_t));
  56. memset(bd, 0, sizeof(bd_t));
  57. gd->bd = bd;
  58. bd->bi_memstart = CONFIG_SYS_INIT_L3_ADDR;
  59. bd->bi_memsize = CONFIG_SYS_L3_SIZE;
  60. arch_cpu_init();
  61. get_clocks();
  62. mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
  63. CONFIG_SPL_RELOC_MALLOC_SIZE);
  64. gd->flags |= GD_FLG_FULL_MALLOC_INIT;
  65. #ifdef CONFIG_SPL_NAND_BOOT
  66. nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
  67. (uchar *)SPL_ENV_ADDR);
  68. #endif
  69. #ifdef CONFIG_SPL_MMC_BOOT
  70. mmc_initialize(bd);
  71. mmc_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
  72. (uchar *)SPL_ENV_ADDR);
  73. #endif
  74. #ifdef CONFIG_SPL_SPI_BOOT
  75. fsl_spi_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
  76. (uchar *)SPL_ENV_ADDR);
  77. #endif
  78. gd->env_addr = (ulong)(SPL_ENV_ADDR);
  79. gd->env_valid = ENV_VALID;
  80. i2c_init_all();
  81. dram_init();
  82. #ifdef CONFIG_SPL_MMC_BOOT
  83. mmc_boot();
  84. #elif defined(CONFIG_SPL_SPI_BOOT)
  85. fsl_spi_boot();
  86. #elif defined(CONFIG_SPL_NAND_BOOT)
  87. nand_boot();
  88. #endif
  89. }