zynqimage.c 8.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright (C) 2015 Nathan Rossi <nathan@nathanrossi.com>
  4. *
  5. * The following Boot Header format/structures and values are defined in the
  6. * following documents:
  7. * * Xilinx Zynq-7000 Technical Reference Manual (Section 6.3)
  8. * * Xilinx Zynq-7000 Software Developers Guide (Appendix A.7 and A.8)
  9. *
  10. * Expected Header Size = 0x8C0
  11. * Forced as 'little' endian, 32-bit words
  12. *
  13. * 0x 0 - Interrupt Table (8 words)
  14. * ... (Default value = 0xeafffffe)
  15. * 0x 1f
  16. * 0x 20 - Width Detection
  17. * * DEFAULT_WIDTHDETECTION 0xaa995566
  18. * 0x 24 - Image Identifier
  19. * * DEFAULT_IMAGEIDENTIFIER 0x584c4e58
  20. * 0x 28 - Encryption
  21. * * 0x00000000 - None
  22. * * 0xa5c3c5a3 - eFuse
  23. * * 0x3a5c3c5a - bbRam
  24. * 0x 2C - User Field
  25. * 0x 30 - Image Offset
  26. * 0x 34 - Image Size
  27. * 0x 38 - Reserved (0x00000000) (according to spec)
  28. * * FSBL defines this field for Image Destination Address.
  29. * 0x 3C - Image Load
  30. * 0x 40 - Image Stored Size
  31. * 0x 44 - Reserved (0x00000000) (according to spec)
  32. * * FSBL defines this field for QSPI configuration Data.
  33. * 0x 48 - Checksum
  34. * 0x 4c - Unused (21 words)
  35. * ...
  36. * 0x 9c
  37. * 0x a0 - Register Initialization, 256 Address and Data word pairs
  38. * * List is terminated with an address of 0xffffffff or
  39. * ... * at the max number of entries
  40. * 0x89c
  41. * 0x8a0 - Unused (8 words)
  42. * ...
  43. * 0x8bf
  44. * 0x8c0 - Data/Image starts here or above
  45. */
  46. #include "imagetool.h"
  47. #include "mkimage.h"
  48. #include <image.h>
  49. #define HEADER_INTERRUPT_DEFAULT (cpu_to_le32(0xeafffffe))
  50. #define HEADER_REGINIT_NULL (cpu_to_le32(0xffffffff))
  51. #define HEADER_WIDTHDETECTION (cpu_to_le32(0xaa995566))
  52. #define HEADER_IMAGEIDENTIFIER (cpu_to_le32(0x584c4e58))
  53. enum {
  54. ENCRYPTION_EFUSE = 0xa5c3c5a3,
  55. ENCRYPTION_BBRAM = 0x3a5c3c5a,
  56. ENCRYPTION_NONE = 0x0,
  57. };
  58. struct zynq_reginit {
  59. uint32_t address;
  60. uint32_t data;
  61. };
  62. #define HEADER_INTERRUPT_VECTORS 8
  63. #define HEADER_REGINITS 256
  64. struct zynq_header {
  65. uint32_t interrupt_vectors[HEADER_INTERRUPT_VECTORS]; /* 0x0 */
  66. uint32_t width_detection; /* 0x20 */
  67. uint32_t image_identifier; /* 0x24 */
  68. uint32_t encryption; /* 0x28 */
  69. uint32_t user_field; /* 0x2c */
  70. uint32_t image_offset; /* 0x30 */
  71. uint32_t image_size; /* 0x34 */
  72. uint32_t __reserved1; /* 0x38 */
  73. uint32_t image_load; /* 0x3c */
  74. uint32_t image_stored_size; /* 0x40 */
  75. uint32_t __reserved2; /* 0x44 */
  76. uint32_t checksum; /* 0x48 */
  77. uint32_t __reserved3[21]; /* 0x4c */
  78. struct zynq_reginit register_init[HEADER_REGINITS]; /* 0xa0 */
  79. uint32_t __reserved4[8]; /* 0x8a0 */
  80. };
  81. static struct zynq_header zynqimage_header;
  82. static uint32_t zynqimage_checksum(struct zynq_header *ptr)
  83. {
  84. uint32_t checksum = 0;
  85. if (ptr == NULL)
  86. return 0;
  87. checksum += le32_to_cpu(ptr->width_detection);
  88. checksum += le32_to_cpu(ptr->image_identifier);
  89. checksum += le32_to_cpu(ptr->encryption);
  90. checksum += le32_to_cpu(ptr->user_field);
  91. checksum += le32_to_cpu(ptr->image_offset);
  92. checksum += le32_to_cpu(ptr->image_size);
  93. checksum += le32_to_cpu(ptr->__reserved1);
  94. checksum += le32_to_cpu(ptr->image_load);
  95. checksum += le32_to_cpu(ptr->image_stored_size);
  96. checksum += le32_to_cpu(ptr->__reserved2);
  97. checksum = ~checksum;
  98. return cpu_to_le32(checksum);
  99. }
  100. static void zynqimage_default_header(struct zynq_header *ptr)
  101. {
  102. int i;
  103. if (ptr == NULL)
  104. return;
  105. ptr->width_detection = HEADER_WIDTHDETECTION;
  106. ptr->image_identifier = HEADER_IMAGEIDENTIFIER;
  107. ptr->encryption = cpu_to_le32(ENCRYPTION_NONE);
  108. /* Setup not-supported/constant/reserved fields */
  109. for (i = 0; i < HEADER_INTERRUPT_VECTORS; i++)
  110. ptr->interrupt_vectors[i] = HEADER_INTERRUPT_DEFAULT;
  111. for (i = 0; i < HEADER_REGINITS; i++) {
  112. ptr->register_init[i].address = HEADER_REGINIT_NULL;
  113. ptr->register_init[i].data = HEADER_REGINIT_NULL;
  114. }
  115. /*
  116. * Certain reserved fields are required to be set to 0, ensure they are
  117. * set as such.
  118. */
  119. ptr->__reserved1 = 0x0;
  120. ptr->__reserved2 = 0x0;
  121. }
  122. /* mkimage glue functions */
  123. static int zynqimage_verify_header(unsigned char *ptr, int image_size,
  124. struct image_tool_params *params)
  125. {
  126. struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
  127. if (image_size < sizeof(struct zynq_header))
  128. return -1;
  129. if (zynqhdr->__reserved1 != 0)
  130. return -1;
  131. if (zynqhdr->__reserved2 != 0)
  132. return -1;
  133. if (zynqhdr->width_detection != HEADER_WIDTHDETECTION)
  134. return -1;
  135. if (zynqhdr->image_identifier != HEADER_IMAGEIDENTIFIER)
  136. return -1;
  137. if (zynqimage_checksum(zynqhdr) != zynqhdr->checksum)
  138. return -1;
  139. return 0;
  140. }
  141. static void zynqimage_print_header(const void *ptr)
  142. {
  143. struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
  144. int i;
  145. printf("Image Type : Xilinx Zynq Boot Image support\n");
  146. printf("Image Offset : 0x%08x\n", le32_to_cpu(zynqhdr->image_offset));
  147. printf("Image Size : %lu bytes (%lu bytes packed)\n",
  148. (unsigned long)le32_to_cpu(zynqhdr->image_size),
  149. (unsigned long)le32_to_cpu(zynqhdr->image_stored_size));
  150. printf("Image Load : 0x%08x\n", le32_to_cpu(zynqhdr->image_load));
  151. printf("User Field : 0x%08x\n", le32_to_cpu(zynqhdr->user_field));
  152. printf("Checksum : 0x%08x\n", le32_to_cpu(zynqhdr->checksum));
  153. for (i = 0; i < HEADER_INTERRUPT_VECTORS; i++) {
  154. if (zynqhdr->interrupt_vectors[i] == HEADER_INTERRUPT_DEFAULT)
  155. continue;
  156. printf("Modified Interrupt Vector Address [%d]: 0x%08x\n", i,
  157. le32_to_cpu(zynqhdr->interrupt_vectors[i]));
  158. }
  159. for (i = 0; i < HEADER_REGINITS; i++) {
  160. if (zynqhdr->register_init[i].address == HEADER_REGINIT_NULL)
  161. break;
  162. if (i == 0)
  163. printf("Custom Register Initialization:\n");
  164. printf(" @ 0x%08x -> 0x%08x\n",
  165. le32_to_cpu(zynqhdr->register_init[i].address),
  166. le32_to_cpu(zynqhdr->register_init[i].data));
  167. }
  168. }
  169. static int zynqimage_check_params(struct image_tool_params *params)
  170. {
  171. if (!params)
  172. return 0;
  173. if (params->addr != 0x0) {
  174. fprintf(stderr, "Error: Load Address cannot be specified.\n");
  175. return -1;
  176. }
  177. /*
  178. * If the entry point is specified ensure it is 64 byte aligned.
  179. */
  180. if (params->eflag && (params->ep % 64 != 0)) {
  181. fprintf(stderr,
  182. "Error: Entry Point must be aligned to a 64-byte boundary.\n");
  183. return -1;
  184. }
  185. return !(params->lflag || params->dflag);
  186. }
  187. static int zynqimage_check_image_types(uint8_t type)
  188. {
  189. if (type == IH_TYPE_ZYNQIMAGE)
  190. return EXIT_SUCCESS;
  191. return EXIT_FAILURE;
  192. }
  193. static void zynqimage_parse_initparams(struct zynq_header *zynqhdr,
  194. const char *filename)
  195. {
  196. FILE *fp;
  197. struct zynq_reginit reginit;
  198. unsigned int reg_count = 0;
  199. int r, err;
  200. struct stat path_stat;
  201. /* Expect a table of register-value pairs, e.g. "0x12345678 0x4321" */
  202. fp = fopen(filename, "r");
  203. if (!fp) {
  204. fprintf(stderr, "Cannot open initparams file: %s\n", filename);
  205. exit(1);
  206. }
  207. err = fstat(fileno(fp), &path_stat);
  208. if (err) {
  209. fclose(fp);
  210. return;
  211. }
  212. if (!S_ISREG(path_stat.st_mode)) {
  213. fclose(fp);
  214. return;
  215. }
  216. do {
  217. r = fscanf(fp, "%x %x", &reginit.address, &reginit.data);
  218. if (r == 2) {
  219. zynqhdr->register_init[reg_count] = reginit;
  220. ++reg_count;
  221. }
  222. r = fscanf(fp, "%*[^\n]\n"); /* Skip to next line */
  223. } while ((r != EOF) && (reg_count < HEADER_REGINITS));
  224. fclose(fp);
  225. }
  226. static void zynqimage_set_header(void *ptr, struct stat *sbuf, int ifd,
  227. struct image_tool_params *params)
  228. {
  229. struct zynq_header *zynqhdr = (struct zynq_header *)ptr;
  230. zynqimage_default_header(zynqhdr);
  231. /* place image directly after header */
  232. zynqhdr->image_offset =
  233. cpu_to_le32((uint32_t)sizeof(struct zynq_header));
  234. zynqhdr->image_size = cpu_to_le32((uint32_t)sbuf->st_size);
  235. zynqhdr->image_stored_size = zynqhdr->image_size;
  236. zynqhdr->image_load = 0x0;
  237. if (params->eflag)
  238. zynqhdr->image_load = cpu_to_le32((uint32_t)params->ep);
  239. /* User can pass in text file with init list */
  240. if (strlen(params->imagename2))
  241. zynqimage_parse_initparams(zynqhdr, params->imagename2);
  242. zynqhdr->checksum = zynqimage_checksum(zynqhdr);
  243. }
  244. U_BOOT_IMAGE_TYPE(
  245. zynqimage,
  246. "Xilinx Zynq Boot Image support",
  247. sizeof(struct zynq_header),
  248. (void *)&zynqimage_header,
  249. zynqimage_check_params,
  250. zynqimage_verify_header,
  251. zynqimage_print_header,
  252. zynqimage_set_header,
  253. NULL,
  254. zynqimage_check_image_types,
  255. NULL,
  256. NULL
  257. );