Makefile.build 13 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. # ==========================================================================
  3. # Building
  4. # ==========================================================================
  5. # Modified for U-Boot
  6. prefix := tpl
  7. src := $(patsubst $(prefix)/%,%,$(obj))
  8. ifeq ($(obj),$(src))
  9. prefix := spl
  10. src := $(patsubst $(prefix)/%,%,$(obj))
  11. ifeq ($(obj),$(src))
  12. prefix := .
  13. endif
  14. endif
  15. PHONY := __build
  16. __build:
  17. # Init all relevant variables used in kbuild files so
  18. # 1) they have correct type
  19. # 2) they do not inherit any value from the environment
  20. obj-y :=
  21. obj-m :=
  22. lib-y :=
  23. lib-m :=
  24. always :=
  25. targets :=
  26. subdir-y :=
  27. subdir-m :=
  28. EXTRA_AFLAGS :=
  29. EXTRA_CFLAGS :=
  30. EXTRA_CPPFLAGS :=
  31. EXTRA_LDFLAGS :=
  32. asflags-y :=
  33. ccflags-y :=
  34. cppflags-y :=
  35. ldflags-y :=
  36. subdir-asflags-y :=
  37. subdir-ccflags-y :=
  38. # Read auto.conf if it exists, otherwise ignore
  39. # Modified for U-Boot
  40. -include include/config/auto.conf
  41. -include $(prefix)/include/autoconf.mk
  42. include scripts/Makefile.uncmd_spl
  43. include scripts/Kbuild.include
  44. # The filename Kbuild has precedence over Makefile
  45. kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
  46. kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
  47. include $(kbuild-file)
  48. # Added for U-Boot
  49. asflags-y += $(PLATFORM_CPPFLAGS)
  50. ccflags-y += $(PLATFORM_CPPFLAGS)
  51. cppflags-y += $(PLATFORM_CPPFLAGS)
  52. include scripts/Makefile.lib
  53. # Do not include host rules unless needed
  54. ifneq ($(hostprogs-y)$(hostprogs-m)$(hostlibs-y)$(hostlibs-m)$(hostcxxlibs-y)$(hostcxxlibs-m),)
  55. include scripts/Makefile.host
  56. endif
  57. ifndef obj
  58. $(warning kbuild: Makefile.build is included improperly)
  59. endif
  60. # ===========================================================================
  61. ifneq ($(strip $(lib-y) $(lib-m) $(lib-)),)
  62. lib-target := $(obj)/lib.a
  63. endif
  64. ifneq ($(strip $(obj-y) $(obj-m) $(obj-) $(subdir-m) $(lib-target)),)
  65. builtin-target := $(obj)/built-in.o
  66. endif
  67. modorder-target := $(obj)/modules.order
  68. # We keep a list of all modules in $(MODVERDIR)
  69. __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
  70. $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
  71. $(subdir-ym) $(always)
  72. @:
  73. # Linus' kernel sanity checking tool
  74. ifeq ($(KBUILD_CHECKSRC),1)
  75. quiet_cmd_checksrc = CHECK $<
  76. cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  77. else ifeq ($(KBUILD_CHECKSRC),2)
  78. quiet_cmd_force_checksrc = CHECK $<
  79. cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
  80. endif
  81. # Do section mismatch analysis for each module/built-in.o
  82. ifdef CONFIG_DEBUG_SECTION_MISMATCH
  83. cmd_secanalysis = ; scripts/mod/modpost $@
  84. endif
  85. # Compile C sources (.c)
  86. # ---------------------------------------------------------------------------
  87. # Default is built-in, unless we know otherwise
  88. modkern_cflags = \
  89. $(if $(part-of-module), \
  90. $(KBUILD_CFLAGS_MODULE) $(CFLAGS_MODULE), \
  91. $(KBUILD_CFLAGS_KERNEL) $(CFLAGS_KERNEL))
  92. quiet_modtag := $(empty) $(empty)
  93. $(real-objs-m) : part-of-module := y
  94. $(real-objs-m:.o=.i) : part-of-module := y
  95. $(real-objs-m:.o=.s) : part-of-module := y
  96. $(real-objs-m:.o=.lst): part-of-module := y
  97. $(real-objs-m) : quiet_modtag := [M]
  98. $(real-objs-m:.o=.i) : quiet_modtag := [M]
  99. $(real-objs-m:.o=.s) : quiet_modtag := [M]
  100. $(real-objs-m:.o=.lst): quiet_modtag := [M]
  101. $(obj-m) : quiet_modtag := [M]
  102. # Default for not multi-part modules
  103. modname = $(basetarget)
  104. $(multi-objs-m) : modname = $(modname-multi)
  105. $(multi-objs-m:.o=.i) : modname = $(modname-multi)
  106. $(multi-objs-m:.o=.s) : modname = $(modname-multi)
  107. $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
  108. $(multi-objs-y) : modname = $(modname-multi)
  109. $(multi-objs-y:.o=.i) : modname = $(modname-multi)
  110. $(multi-objs-y:.o=.s) : modname = $(modname-multi)
  111. $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
  112. quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
  113. cmd_cc_s_c = $(CC) $(c_flags) $(DISABLE_LTO) -fverbose-asm -S -o $@ $<
  114. $(obj)/%.s: $(src)/%.c FORCE
  115. $(call if_changed_dep,cc_s_c)
  116. quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
  117. cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
  118. $(obj)/%.i: $(src)/%.c FORCE
  119. $(call if_changed_dep,cc_i_c)
  120. cmd_gensymtypes = \
  121. $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
  122. $(GENKSYMS) $(if $(1), -T $(2)) \
  123. $(if $(KBUILD_PRESERVE),-p) \
  124. -r $(firstword $(wildcard $(2:.symtypes=.symref) /dev/null))
  125. quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
  126. cmd_cc_symtypes_c = \
  127. set -e; \
  128. $(call cmd_gensymtypes,true,$@) >/dev/null; \
  129. test -s $@ || rm -f $@
  130. $(obj)/%.symtypes : $(src)/%.c FORCE
  131. $(call cmd,cc_symtypes_c)
  132. # C (.c) files
  133. # The C file is compiled and updated dependency information is generated.
  134. # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
  135. quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
  136. ifndef CONFIG_MODVERSIONS
  137. cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
  138. else
  139. # When module versioning is enabled the following steps are executed:
  140. # o compile a .tmp_<file>.o from <file>.c
  141. # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
  142. # not export symbols, we just rename .tmp_<file>.o to <file>.o and
  143. # are done.
  144. # o otherwise, we calculate symbol versions using the good old
  145. # genksyms on the preprocessed source and postprocess them in a way
  146. # that they are usable as a linker script
  147. # o generate <file>.o from .tmp_<file>.o using the linker to
  148. # replace the unresolved symbols __crc_exported_symbol with
  149. # the actual value of the checksum generated by genksyms
  150. cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
  151. cmd_modversions = \
  152. if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
  153. $(call cmd_gensymtypes,$(KBUILD_SYMTYPES),$(@:.o=.symtypes)) \
  154. > $(@D)/.tmp_$(@F:.o=.ver); \
  155. \
  156. $(LD) $(KBUILD_LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
  157. -T $(@D)/.tmp_$(@F:.o=.ver); \
  158. rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
  159. else \
  160. mv -f $(@D)/.tmp_$(@F) $@; \
  161. fi;
  162. endif
  163. ifdef CONFIG_FTRACE_MCOUNT_RECORD
  164. # gcc 5 supports generating the mcount tables directly
  165. ifneq ($(call cc-option,-mrecord-mcount,y),y)
  166. KBUILD_CFLAGS += -mrecord-mcount
  167. else
  168. # else do it all manually
  169. ifdef BUILD_C_RECORDMCOUNT
  170. ifeq ("$(origin RECORDMCOUNT_WARN)", "command line")
  171. RECORDMCOUNT_FLAGS = -w
  172. endif
  173. # Due to recursion, we must skip empty.o.
  174. # The empty.o file is created in the make process in order to determine
  175. # the target endianness and word size. It is made before all other C
  176. # files, including recordmcount.
  177. sub_cmd_record_mcount = \
  178. if [ $(@) != "scripts/mod/empty.o" ]; then \
  179. $(objtree)/scripts/recordmcount $(RECORDMCOUNT_FLAGS) "$(@)"; \
  180. fi;
  181. recordmcount_source := $(srctree)/scripts/recordmcount.c \
  182. $(srctree)/scripts/recordmcount.h
  183. else
  184. sub_cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
  185. "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \
  186. "$(if $(CONFIG_64BIT),64,32)" \
  187. "$(OBJDUMP)" "$(OBJCOPY)" "$(CC) $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS)" \
  188. "$(LD) $(KBUILD_LDFLAGS)" "$(NM)" "$(RM)" "$(MV)" \
  189. "$(if $(part-of-module),1,0)" "$(@)";
  190. recordmcount_source := $(srctree)/scripts/recordmcount.pl
  191. endif
  192. cmd_record_mcount = \
  193. if [ "$(findstring $(CC_FLAGS_FTRACE),$(_c_flags))" = \
  194. "$(CC_FLAGS_FTRACE)" ]; then \
  195. $(sub_cmd_record_mcount) \
  196. fi;
  197. endif # -record-mcount
  198. endif
  199. define rule_cc_o_c
  200. $(call echo-cmd,checksrc) $(cmd_checksrc) \
  201. $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
  202. $(cmd_modversions) \
  203. $(call echo-cmd,record_mcount) \
  204. $(cmd_record_mcount) \
  205. scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
  206. $(dot-target).tmp; \
  207. rm -f $(depfile); \
  208. mv -f $(dot-target).tmp $(dot-target).cmd
  209. endef
  210. # Built-in and composite module parts
  211. $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  212. $(call cmd,force_checksrc)
  213. $(call if_changed_rule,cc_o_c)
  214. # Single-part modules are special since we need to mark them in $(MODVERDIR)
  215. $(single-used-m): $(obj)/%.o: $(src)/%.c $(recordmcount_source) FORCE
  216. $(call cmd,force_checksrc)
  217. $(call if_changed_rule,cc_o_c)
  218. @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
  219. quiet_cmd_cc_lst_c = MKLST $@
  220. cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
  221. $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
  222. System.map $(OBJDUMP) > $@
  223. $(obj)/%.lst: $(src)/%.c FORCE
  224. $(call if_changed_dep,cc_lst_c)
  225. # Compile assembler sources (.S)
  226. # ---------------------------------------------------------------------------
  227. modkern_aflags := $(KBUILD_AFLAGS_KERNEL) $(AFLAGS_KERNEL)
  228. $(real-objs-m) : modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  229. $(real-objs-m:.o=.s): modkern_aflags := $(KBUILD_AFLAGS_MODULE) $(AFLAGS_MODULE)
  230. quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
  231. cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
  232. $(obj)/%.s: $(src)/%.S FORCE
  233. $(call if_changed_dep,as_s_S)
  234. quiet_cmd_as_o_S = AS $(quiet_modtag) $@
  235. cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
  236. $(obj)/%.o: $(src)/%.S FORCE
  237. $(call if_changed_dep,as_o_S)
  238. targets += $(real-objs-y) $(real-objs-m) $(lib-y)
  239. targets += $(extra-y) $(MAKECMDGOALS) $(always)
  240. # Linker scripts preprocessor (.lds.S -> .lds)
  241. # ---------------------------------------------------------------------------
  242. quiet_cmd_cpp_lds_S = LDS $@
  243. cmd_cpp_lds_S = $(CPP) $(cpp_flags) -P -C -U$(ARCH) \
  244. -D__ASSEMBLY__ -DLINKER_SCRIPT -o $@ $<
  245. $(obj)/%.lds: $(src)/%.lds.S FORCE
  246. $(call if_changed_dep,cpp_lds_S)
  247. # ASN.1 grammar
  248. # ---------------------------------------------------------------------------
  249. quiet_cmd_asn1_compiler = ASN.1 $@
  250. cmd_asn1_compiler = $(objtree)/tools/asn1_compiler $< \
  251. $(subst .h,.c,$@) $(subst .c,.h,$@)
  252. $(obj)/%.asn1.c $(obj)/%.asn1.h: $(src)/%.asn1 $(objtree)/tools/asn1_compiler
  253. $(call cmd,asn1_compiler)
  254. # Build the compiled-in targets
  255. # ---------------------------------------------------------------------------
  256. # To build objects in subdirs, we need to descend into the directories
  257. $(sort $(subdir-obj-y)): $(subdir-ym) ;
  258. #
  259. # Rule to compile a set of .o files into one .o file
  260. #
  261. ifdef builtin-target
  262. quiet_cmd_link_o_target = AR $@
  263. # If the list of objects to link is empty, just create an empty built-in.o
  264. cmd_link_o_target = $(if $(strip $(obj-y)),\
  265. rm -f $@; $(AR) cDPrsT $@ $(filter $(obj-y), $^), \
  266. rm -f $@; $(AR) cDPrsT$(KBUILD_ARFLAGS) $@)
  267. $(builtin-target): $(obj-y) FORCE
  268. $(call if_changed,link_o_target)
  269. targets += $(builtin-target)
  270. endif # builtin-target
  271. #
  272. # Rule to create modules.order file
  273. #
  274. # Create commands to either record .ko file or cat modules.order from
  275. # a subdirectory
  276. modorder-cmds = \
  277. $(foreach m, $(modorder), \
  278. $(if $(filter %/modules.order, $m), \
  279. cat $m;, echo kernel/$m;))
  280. $(modorder-target): $(subdir-ym) FORCE
  281. $(Q)(cat /dev/null; $(modorder-cmds)) > $@
  282. #
  283. # Rule to compile a set of .o files into one .a file
  284. #
  285. ifdef lib-target
  286. quiet_cmd_link_l_target = AR $@
  287. cmd_link_l_target = rm -f $@; $(AR) cDPrsT$(KBUILD_ARFLAGS) $@ $(lib-y)
  288. $(lib-target): $(lib-y) FORCE
  289. $(call if_changed,link_l_target)
  290. targets += $(lib-target)
  291. endif
  292. quiet_cmd_link_multi-y = AR $@
  293. cmd_link_multi-y = rm -f $@; $(AR) cDPrsT$(KBUILD_ARFLAGS) $@ $(filter %.o,$^)
  294. quiet_cmd_link_multi-m = AR [M] $@
  295. cmd_link_multi-m = $(cmd_link_multi-y)
  296. $(multi-used-y): FORCE
  297. $(call if_changed,link_multi-y)
  298. $(call multi_depend, $(multi-used-y), .o, -objs -y)
  299. $(multi-used-m): FORCE
  300. $(call if_changed,link_multi-m)
  301. @{ echo $(@:.o=.ko); echo $(filter %.o,$^); } > $(MODVERDIR)/$(@F:.o=.mod)
  302. $(call multi_depend, $(multi-used-m), .o, -objs -y)
  303. targets += $(multi-used-y) $(multi-used-m)
  304. # Add intermediate targets:
  305. # When building objects with specific suffix patterns, add intermediate
  306. # targets that the final targets are derived from.
  307. intermediate_targets = $(foreach sfx, $(2), \
  308. $(patsubst %$(strip $(1)),%$(sfx), \
  309. $(filter %$(strip $(1)), $(targets))))
  310. # %.lex.o <- %.lex.c <- %.l
  311. # %.tab.o <- %.tab.[ch] <- %.y
  312. targets += $(call intermediate_targets, .lex.o, .lex.c) \
  313. $(call intermediate_targets, .tab.o, .tab.c .tab.h)
  314. # Descending
  315. # ---------------------------------------------------------------------------
  316. PHONY += $(subdir-ym)
  317. $(subdir-ym):
  318. $(Q)$(MAKE) $(build)=$@
  319. # Add FORCE to the prequisites of a target to force it to be always rebuilt.
  320. # ---------------------------------------------------------------------------
  321. PHONY += FORCE
  322. FORCE:
  323. # Read all saved command lines and dependencies for the $(targets) we
  324. # may be building above, using $(if_changed{,_dep}). As an
  325. # optimization, we don't need to read them if the target does not
  326. # exist, we will rebuild anyway in that case.
  327. cmd_files := $(wildcard $(foreach f,$(sort $(targets)),$(dir $(f)).$(notdir $(f)).cmd))
  328. ifneq ($(cmd_files),)
  329. include $(cmd_files)
  330. endif
  331. # Create directories for object files if they do not exist
  332. obj-dirs := $(sort $(obj) $(patsubst %/,%, $(dir $(targets))))
  333. $(shell mkdir -p $(obj-dirs))
  334. .PHONY: $(PHONY)