cpu.c 2.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121
  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * (C) Copyright 2002
  4. * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  5. */
  6. #include <common.h>
  7. #include <cpu_func.h>
  8. /*
  9. * CPU test
  10. *
  11. * This test checks the arithmetic logic unit (ALU) of CPU.
  12. * It tests independently various groups of instructions using
  13. * run-time modification of the code to reduce the memory footprint.
  14. * For more details refer to post/cpu/ *.c files.
  15. */
  16. #include <watchdog.h>
  17. #include <post.h>
  18. #include <asm/mmu.h>
  19. #if CONFIG_POST & CONFIG_SYS_POST_CPU
  20. extern int cpu_post_test_cmp (void);
  21. extern int cpu_post_test_cmpi (void);
  22. extern int cpu_post_test_two (void);
  23. extern int cpu_post_test_twox (void);
  24. extern int cpu_post_test_three (void);
  25. extern int cpu_post_test_threex (void);
  26. extern int cpu_post_test_threei (void);
  27. extern int cpu_post_test_andi (void);
  28. extern int cpu_post_test_srawi (void);
  29. extern int cpu_post_test_rlwnm (void);
  30. extern int cpu_post_test_rlwinm (void);
  31. extern int cpu_post_test_rlwimi (void);
  32. extern int cpu_post_test_store (void);
  33. extern int cpu_post_test_load (void);
  34. extern int cpu_post_test_cr (void);
  35. extern int cpu_post_test_b (void);
  36. extern int cpu_post_test_multi (void);
  37. extern int cpu_post_test_string (void);
  38. extern int cpu_post_test_complex (void);
  39. ulong cpu_post_makecr (long v)
  40. {
  41. ulong cr = 0;
  42. if (v < 0)
  43. cr |= 0x80000000;
  44. if (v > 0)
  45. cr |= 0x40000000;
  46. if (v == 0)
  47. cr |= 0x20000000;
  48. return cr;
  49. }
  50. int cpu_post_test (int flags)
  51. {
  52. int ic = icache_status();
  53. int ret = 0;
  54. WATCHDOG_RESET();
  55. if (ic)
  56. icache_disable();
  57. if (ret == 0)
  58. ret = cpu_post_test_cmp ();
  59. if (ret == 0)
  60. ret = cpu_post_test_cmpi ();
  61. if (ret == 0)
  62. ret = cpu_post_test_two ();
  63. if (ret == 0)
  64. ret = cpu_post_test_twox ();
  65. WATCHDOG_RESET();
  66. if (ret == 0)
  67. ret = cpu_post_test_three ();
  68. if (ret == 0)
  69. ret = cpu_post_test_threex ();
  70. if (ret == 0)
  71. ret = cpu_post_test_threei ();
  72. if (ret == 0)
  73. ret = cpu_post_test_andi ();
  74. WATCHDOG_RESET();
  75. if (ret == 0)
  76. ret = cpu_post_test_srawi ();
  77. if (ret == 0)
  78. ret = cpu_post_test_rlwnm ();
  79. if (ret == 0)
  80. ret = cpu_post_test_rlwinm ();
  81. if (ret == 0)
  82. ret = cpu_post_test_rlwimi ();
  83. WATCHDOG_RESET();
  84. if (ret == 0)
  85. ret = cpu_post_test_store ();
  86. if (ret == 0)
  87. ret = cpu_post_test_load ();
  88. if (ret == 0)
  89. ret = cpu_post_test_cr ();
  90. if (ret == 0)
  91. ret = cpu_post_test_b ();
  92. WATCHDOG_RESET();
  93. if (ret == 0)
  94. ret = cpu_post_test_multi ();
  95. WATCHDOG_RESET();
  96. if (ret == 0)
  97. ret = cpu_post_test_string ();
  98. if (ret == 0)
  99. ret = cpu_post_test_complex ();
  100. WATCHDOG_RESET();
  101. if (ic)
  102. icache_enable();
  103. WATCHDOG_RESET();
  104. return ret;
  105. }
  106. #endif /* CONFIG_POST & CONFIG_SYS_POST_CPU */