mpc8xx_wdt.c 1.6 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Copyright 2017 CS Systemes d'Information
  4. */
  5. #include <common.h>
  6. #include <env.h>
  7. #include <dm.h>
  8. #include <wdt.h>
  9. #include <mpc8xx.h>
  10. #include <asm/cpm_8xx.h>
  11. #include <asm/io.h>
  12. void hw_watchdog_reset(void)
  13. {
  14. immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
  15. out_be16(&immap->im_siu_conf.sc_swsr, 0x556c); /* write magic1 */
  16. out_be16(&immap->im_siu_conf.sc_swsr, 0xaa39); /* write magic2 */
  17. }
  18. static int mpc8xx_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
  19. {
  20. immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
  21. u32 val = CONFIG_SYS_SYPCR;
  22. const char *mode = env_get("watchdog_mode");
  23. if (strcmp(mode, "off") == 0)
  24. val = val & ~(SYPCR_SWE | SYPCR_SWRI);
  25. else if (strcmp(mode, "nmi") == 0)
  26. val = (val & ~SYPCR_SWRI) | SYPCR_SWE;
  27. out_be32(&immap->im_siu_conf.sc_sypcr, val);
  28. if (!(in_be32(&immap->im_siu_conf.sc_sypcr) & SYPCR_SWE))
  29. return -EBUSY;
  30. return 0;
  31. }
  32. static int mpc8xx_wdt_stop(struct udevice *dev)
  33. {
  34. immap_t __iomem *immap = (immap_t __iomem *)CONFIG_SYS_IMMR;
  35. out_be32(&immap->im_siu_conf.sc_sypcr, CONFIG_SYS_SYPCR & ~SYPCR_SWE);
  36. if (in_be32(&immap->im_siu_conf.sc_sypcr) & SYPCR_SWE)
  37. return -EBUSY;
  38. return 0;
  39. }
  40. static int mpc8xx_wdt_reset(struct udevice *dev)
  41. {
  42. hw_watchdog_reset();
  43. return 0;
  44. }
  45. static const struct wdt_ops mpc8xx_wdt_ops = {
  46. .start = mpc8xx_wdt_start,
  47. .reset = mpc8xx_wdt_reset,
  48. .stop = mpc8xx_wdt_stop,
  49. };
  50. static const struct udevice_id mpc8xx_wdt_ids[] = {
  51. { .compatible = "fsl,pq1-wdt" },
  52. {}
  53. };
  54. U_BOOT_DRIVER(wdt_mpc8xx) = {
  55. .name = "wdt_mpc8xx",
  56. .id = UCLASS_WDT,
  57. .of_match = mpc8xx_wdt_ids,
  58. .ops = &mpc8xx_wdt_ops,
  59. };