cr50_i2c.c 17 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Cr50 / H1 TPM support
  4. *
  5. * Copyright 2018 Google LLC
  6. */
  7. #define LOG_CATEGORY UCLASS_TPM
  8. #include <common.h>
  9. #include <dm.h>
  10. #include <i2c.h>
  11. #include <irq.h>
  12. #include <log.h>
  13. #include <spl.h>
  14. #include <tpm-v2.h>
  15. #include <acpi/acpigen.h>
  16. #include <acpi/acpi_device.h>
  17. #include <asm/gpio.h>
  18. #include <asm/io.h>
  19. #include <linux/delay.h>
  20. #include <dm/acpi.h>
  21. enum {
  22. TIMEOUT_INIT_MS = 30000, /* Very long timeout for TPM init */
  23. TIMEOUT_LONG_US = 2 * 1000 * 1000,
  24. TIMEOUT_SHORT_US = 2 * 1000,
  25. TIMEOUT_NO_IRQ_US = 20 * 1000,
  26. TIMEOUT_IRQ_US = 100 * 1000,
  27. };
  28. enum {
  29. CR50_DID_VID = 0x00281ae0L
  30. };
  31. enum {
  32. CR50_MAX_BUF_SIZE = 63,
  33. };
  34. /**
  35. * struct cr50_priv - Private driver data
  36. *
  37. * @ready_gpio: GPIO to use to check if the TPM is ready
  38. * @irq: IRQ to use check if the TPM is ready (has priority over @ready_gpio)
  39. * @locality: Currenttly claimed locality (-1 if none)
  40. * @vendor: vendor: Vendor ID for TPM
  41. * @use_irq: true to use @irq, false to use @ready if available
  42. */
  43. struct cr50_priv {
  44. struct gpio_desc ready_gpio;
  45. struct irq irq;
  46. int locality;
  47. uint vendor;
  48. bool use_irq;
  49. };
  50. /* Wait for interrupt to indicate TPM is ready */
  51. static int cr50_i2c_wait_tpm_ready(struct udevice *dev)
  52. {
  53. struct cr50_priv *priv = dev_get_priv(dev);
  54. ulong timeout, base;
  55. int i;
  56. if (!priv->use_irq && !dm_gpio_is_valid(&priv->ready_gpio)) {
  57. /* Fixed delay if interrupt not supported */
  58. udelay(TIMEOUT_NO_IRQ_US);
  59. return 0;
  60. }
  61. base = timer_get_us();
  62. timeout = base + TIMEOUT_IRQ_US;
  63. i = 0;
  64. while (priv->use_irq ? !irq_read_and_clear(&priv->irq) :
  65. !dm_gpio_get_value(&priv->ready_gpio)) {
  66. i++;
  67. if ((int)(timer_get_us() - timeout) >= 0) {
  68. log_warning("Timeout\n");
  69. /* Use this instead of the -ETIMEDOUT used by i2c */
  70. return -ETIME;
  71. }
  72. }
  73. log_debug("i=%d\n", i);
  74. return 0;
  75. }
  76. /* Clear pending interrupts */
  77. static void cr50_i2c_clear_tpm_irq(struct udevice *dev)
  78. {
  79. struct cr50_priv *priv = dev_get_priv(dev);
  80. if (priv->use_irq)
  81. irq_read_and_clear(&priv->irq);
  82. }
  83. /*
  84. * cr50_i2c_read() - read from TPM register
  85. *
  86. * @dev: TPM chip information
  87. * @addr: register address to read from
  88. * @buffer: provided by caller
  89. * @len: number of bytes to read
  90. *
  91. * 1) send register address byte 'addr' to the TPM
  92. * 2) wait for TPM to indicate it is ready
  93. * 3) read 'len' bytes of TPM response into the provided 'buffer'
  94. *
  95. * Return 0 on success. -ve on error
  96. */
  97. static int cr50_i2c_read(struct udevice *dev, u8 addr, u8 *buffer,
  98. size_t len)
  99. {
  100. int ret;
  101. /* Clear interrupt before starting transaction */
  102. cr50_i2c_clear_tpm_irq(dev);
  103. /* Send the register address byte to the TPM */
  104. ret = dm_i2c_write(dev, 0, &addr, 1);
  105. if (ret) {
  106. log_err("Address write failed (err=%d)\n", ret);
  107. return ret;
  108. }
  109. /* Wait for TPM to be ready with response data */
  110. ret = cr50_i2c_wait_tpm_ready(dev);
  111. if (ret)
  112. return ret;
  113. /* Read response data frrom the TPM */
  114. ret = dm_i2c_read(dev, 0, buffer, len);
  115. if (ret) {
  116. log_err("Read response failed (err=%d)\n", ret);
  117. return ret;
  118. }
  119. return 0;
  120. }
  121. /*
  122. * cr50_i2c_write() - write to TPM register
  123. *
  124. * @dev: TPM chip information
  125. * @addr: register address to write to
  126. * @buffer: data to write
  127. * @len: number of bytes to write
  128. *
  129. * 1) prepend the provided address to the provided data
  130. * 2) send the address+data to the TPM
  131. * 3) wait for TPM to indicate it is done writing
  132. *
  133. * Returns -1 on error, 0 on success.
  134. */
  135. static int cr50_i2c_write(struct udevice *dev, u8 addr, const u8 *buffer,
  136. size_t len)
  137. {
  138. u8 buf[len + 1];
  139. int ret;
  140. if (len > CR50_MAX_BUF_SIZE) {
  141. log_err("Length %zd is too large\n", len);
  142. return -E2BIG;
  143. }
  144. /* Prepend the 'register address' to the buffer */
  145. buf[0] = addr;
  146. memcpy(buf + 1, buffer, len);
  147. /* Clear interrupt before starting transaction */
  148. cr50_i2c_clear_tpm_irq(dev);
  149. /* Send write request buffer with address */
  150. ret = dm_i2c_write(dev, 0, buf, len + 1);
  151. if (ret) {
  152. log_err("Error writing to TPM (err=%d)\n", ret);
  153. return ret;
  154. }
  155. /* Wait for TPM to be ready */
  156. return cr50_i2c_wait_tpm_ready(dev);
  157. }
  158. static inline u8 tpm_access(int locality)
  159. {
  160. if (locality == -1)
  161. locality = 0;
  162. return 0x0 | (locality << 4);
  163. }
  164. static inline u8 tpm_sts(int locality)
  165. {
  166. if (locality == -1)
  167. locality = 0;
  168. return 0x1 | (locality << 4);
  169. }
  170. static inline u8 tpm_data_fifo(int locality)
  171. {
  172. if (locality == -1)
  173. locality = 0;
  174. return 0x5 | (locality << 4);
  175. }
  176. static inline u8 tpm_did_vid(int locality)
  177. {
  178. if (locality == -1)
  179. locality = 0;
  180. return 0x6 | (locality << 4);
  181. }
  182. static int release_locality(struct udevice *dev, int force)
  183. {
  184. struct cr50_priv *priv = dev_get_priv(dev);
  185. u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_REQUEST_PENDING;
  186. u8 addr = tpm_access(priv->locality);
  187. int ret;
  188. u8 buf;
  189. ret = cr50_i2c_read(dev, addr, &buf, 1);
  190. if (ret)
  191. return ret;
  192. if (force || (buf & mask) == mask) {
  193. buf = TPM_ACCESS_ACTIVE_LOCALITY;
  194. cr50_i2c_write(dev, addr, &buf, 1);
  195. }
  196. priv->locality = -1;
  197. return 0;
  198. }
  199. /* cr50 requires all 4 bytes of status register to be read */
  200. static int cr50_i2c_status(struct udevice *dev)
  201. {
  202. struct cr50_priv *priv = dev_get_priv(dev);
  203. u8 buf[4];
  204. int ret;
  205. ret = cr50_i2c_read(dev, tpm_sts(priv->locality), buf, sizeof(buf));
  206. if (ret) {
  207. log_warning("%s: Failed to read status\n", __func__);
  208. return ret;
  209. }
  210. return buf[0];
  211. }
  212. /* cr50 requires all 4 bytes of status register to be written */
  213. static int cr50_i2c_ready(struct udevice *dev)
  214. {
  215. struct cr50_priv *priv = dev_get_priv(dev);
  216. u8 buf[4] = { TPM_STS_COMMAND_READY };
  217. int ret;
  218. ret = cr50_i2c_write(dev, tpm_sts(priv->locality), buf, sizeof(buf));
  219. if (ret)
  220. return ret;
  221. udelay(TIMEOUT_SHORT_US);
  222. return 0;
  223. }
  224. static int cr50_i2c_wait_burststs(struct udevice *dev, u8 mask,
  225. size_t *burst, int *status)
  226. {
  227. struct cr50_priv *priv = dev_get_priv(dev);
  228. ulong timeout;
  229. u32 buf;
  230. /*
  231. * cr50 uses bytes 3:2 of status register for burst count and all 4
  232. * bytes must be read
  233. */
  234. timeout = timer_get_us() + TIMEOUT_LONG_US;
  235. while (timer_get_us() < timeout) {
  236. if (cr50_i2c_read(dev, tpm_sts(priv->locality),
  237. (u8 *)&buf, sizeof(buf)) < 0) {
  238. udelay(TIMEOUT_SHORT_US);
  239. continue;
  240. }
  241. *status = buf & 0xff;
  242. *burst = le16_to_cpu((buf >> 8) & 0xffff);
  243. if ((*status & mask) == mask &&
  244. *burst > 0 && *burst <= CR50_MAX_BUF_SIZE)
  245. return 0;
  246. udelay(TIMEOUT_SHORT_US);
  247. }
  248. log_warning("Timeout reading burst and status\n");
  249. return -ETIMEDOUT;
  250. }
  251. static int cr50_i2c_recv(struct udevice *dev, u8 *buf, size_t buf_len)
  252. {
  253. struct cr50_priv *priv = dev_get_priv(dev);
  254. size_t burstcnt, expected, current, len;
  255. u8 addr = tpm_data_fifo(priv->locality);
  256. u8 mask = TPM_STS_VALID | TPM_STS_DATA_AVAIL;
  257. u32 expected_buf;
  258. int status;
  259. int ret;
  260. log_debug("%s: buf_len=%x\n", __func__, buf_len);
  261. if (buf_len < TPM_HEADER_SIZE)
  262. return -E2BIG;
  263. ret = cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status);
  264. if (ret < 0) {
  265. log_warning("First chunk not available\n");
  266. goto out_err;
  267. }
  268. /* Read first chunk of burstcnt bytes */
  269. if (cr50_i2c_read(dev, addr, buf, burstcnt) < 0) {
  270. log_warning("Read failed\n");
  271. goto out_err;
  272. }
  273. /* Determine expected data in the return buffer */
  274. memcpy(&expected_buf, buf + TPM_CMD_COUNT_OFFSET, sizeof(expected_buf));
  275. expected = be32_to_cpu(expected_buf);
  276. if (expected > buf_len) {
  277. log_warning("Too much data: %zu > %zu\n", expected, buf_len);
  278. goto out_err;
  279. }
  280. /* Now read the rest of the data */
  281. current = burstcnt;
  282. while (current < expected) {
  283. /* Read updated burst count and check status */
  284. if (cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status) < 0) {
  285. log_warning("- burst failure1\n");
  286. goto out_err;
  287. }
  288. len = min(burstcnt, expected - current);
  289. if (cr50_i2c_read(dev, addr, buf + current, len) != 0) {
  290. log_warning("Read failed\n");
  291. goto out_err;
  292. }
  293. current += len;
  294. }
  295. if (cr50_i2c_wait_burststs(dev, TPM_STS_VALID, &burstcnt,
  296. &status) < 0) {
  297. log_warning("- burst failure2\n");
  298. goto out_err;
  299. }
  300. if (status & TPM_STS_DATA_AVAIL) {
  301. log_warning("Data still available\n");
  302. goto out_err;
  303. }
  304. return current;
  305. out_err:
  306. /* Abort current transaction if still pending */
  307. ret = cr50_i2c_status(dev);
  308. if (ret < 0)
  309. return ret;
  310. if (ret & TPM_STS_COMMAND_READY) {
  311. ret = cr50_i2c_ready(dev);
  312. if (ret)
  313. return ret;
  314. }
  315. return -EIO;
  316. }
  317. static int cr50_i2c_send(struct udevice *dev, const u8 *buf, size_t len)
  318. {
  319. struct cr50_priv *priv = dev_get_priv(dev);
  320. int status;
  321. size_t burstcnt, limit, sent = 0;
  322. u8 tpm_go[4] = { TPM_STS_GO };
  323. ulong timeout;
  324. int ret;
  325. log_debug("len=%x\n", len);
  326. timeout = timer_get_us() + TIMEOUT_LONG_US;
  327. do {
  328. ret = cr50_i2c_status(dev);
  329. if (ret < 0)
  330. goto out_err;
  331. if (ret & TPM_STS_COMMAND_READY)
  332. break;
  333. if (timer_get_us() > timeout)
  334. goto out_err;
  335. ret = cr50_i2c_ready(dev);
  336. if (ret)
  337. goto out_err;
  338. } while (1);
  339. while (len > 0) {
  340. u8 mask = TPM_STS_VALID;
  341. /* Wait for data if this is not the first chunk */
  342. if (sent > 0)
  343. mask |= TPM_STS_DATA_EXPECT;
  344. if (cr50_i2c_wait_burststs(dev, mask, &burstcnt, &status) < 0)
  345. goto out_err;
  346. /*
  347. * Use burstcnt - 1 to account for the address byte
  348. * that is inserted by cr50_i2c_write()
  349. */
  350. limit = min(burstcnt - 1, len);
  351. if (cr50_i2c_write(dev, tpm_data_fifo(priv->locality),
  352. &buf[sent], limit) != 0) {
  353. log_warning("Write failed\n");
  354. goto out_err;
  355. }
  356. sent += limit;
  357. len -= limit;
  358. }
  359. /* Ensure TPM is not expecting more data */
  360. if (cr50_i2c_wait_burststs(dev, TPM_STS_VALID, &burstcnt, &status) < 0)
  361. goto out_err;
  362. if (status & TPM_STS_DATA_EXPECT) {
  363. log_warning("Data still expected\n");
  364. goto out_err;
  365. }
  366. /* Start the TPM command */
  367. ret = cr50_i2c_write(dev, tpm_sts(priv->locality), tpm_go,
  368. sizeof(tpm_go));
  369. if (ret) {
  370. log_warning("Start command failed\n");
  371. goto out_err;
  372. }
  373. return sent;
  374. out_err:
  375. /* Abort current transaction if still pending */
  376. ret = cr50_i2c_status(dev);
  377. if (ret < 0 || (ret & TPM_STS_COMMAND_READY)) {
  378. ret = cr50_i2c_ready(dev);
  379. if (ret)
  380. return ret;
  381. }
  382. return -EIO;
  383. }
  384. /**
  385. * process_reset() - Wait for the Cr50 to reset
  386. *
  387. * Cr50 processes reset requests asynchronously and conceivably could be busy
  388. * executing a long command and not reacting to the reset pulse for a while.
  389. *
  390. * This function will make sure that the AP does not proceed with boot until
  391. * TPM finished reset processing.
  392. *
  393. * @dev: Cr50 device
  394. * @return 0 if OK, -EPERM if locality could not be taken
  395. */
  396. static int process_reset(struct udevice *dev)
  397. {
  398. const int loc = 0;
  399. u8 access;
  400. ulong start;
  401. /*
  402. * Locality is released by TPM reset.
  403. *
  404. * If locality is taken at this point, this could be due to the fact
  405. * that the TPM is performing a long operation and has not processed
  406. * reset request yet. We'll wait up to CR50_TIMEOUT_INIT_MS and see if
  407. * it releases locality when reset is processed.
  408. */
  409. start = get_timer(0);
  410. do {
  411. const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;
  412. int ret;
  413. ret = cr50_i2c_read(dev, tpm_access(loc),
  414. &access, sizeof(access));
  415. if (ret || ((access & mask) == mask)) {
  416. /*
  417. * Don't bombard the chip with traffic; let it keep
  418. * processing the command.
  419. */
  420. mdelay(2);
  421. continue;
  422. }
  423. log_debug("TPM ready after %ld ms\n", get_timer(start));
  424. return 0;
  425. } while (get_timer(start) < TIMEOUT_INIT_MS);
  426. log_err("TPM failed to reset after %ld ms, status: %#x\n",
  427. get_timer(start), access);
  428. return -EPERM;
  429. }
  430. /*
  431. * Locality could be already claimed (if this is a later U-Boot phase and the
  432. * read-only U-Boot did not release it), or not yet claimed, if this is TPL or
  433. * the older read-only U-Boot did release it.
  434. */
  435. static int claim_locality(struct udevice *dev, int loc)
  436. {
  437. const u8 mask = TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY;
  438. struct cr50_priv *priv = dev_get_priv(dev);
  439. u8 access;
  440. int ret;
  441. ret = cr50_i2c_read(dev, tpm_access(loc), &access, sizeof(access));
  442. if (ret)
  443. return log_msg_ret("read1", ret);
  444. if ((access & mask) == mask) {
  445. log_warning("Locality already claimed\n");
  446. return 0;
  447. }
  448. access = TPM_ACCESS_REQUEST_USE;
  449. ret = cr50_i2c_write(dev, tpm_access(loc), &access, sizeof(access));
  450. if (ret)
  451. return log_msg_ret("write", ret);
  452. ret = cr50_i2c_read(dev, tpm_access(loc), &access, sizeof(access));
  453. if (ret)
  454. return log_msg_ret("read2", ret);
  455. if ((access & mask) != mask) {
  456. log_err("Failed to claim locality\n");
  457. return -EPERM;
  458. }
  459. log_debug("Claimed locality %d\n", loc);
  460. priv->locality = loc;
  461. return 0;
  462. }
  463. static int cr50_i2c_get_desc(struct udevice *dev, char *buf, int size)
  464. {
  465. struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
  466. struct cr50_priv *priv = dev_get_priv(dev);
  467. int len;
  468. len = snprintf(buf, size, "cr50 TPM 2.0 (i2c %02x id %x), ",
  469. chip->chip_addr, priv->vendor >> 16);
  470. if (priv->use_irq) {
  471. len += snprintf(buf + len, size - len, "irq=%s/%ld",
  472. priv->irq.dev->name, priv->irq.id);
  473. } else if (dm_gpio_is_valid(&priv->ready_gpio)) {
  474. len += snprintf(buf + len, size - len, "gpio=%s/%u",
  475. priv->ready_gpio.dev->name,
  476. priv->ready_gpio.offset);
  477. } else {
  478. len += snprintf(buf + len, size - len, "delay=%d",
  479. TIMEOUT_NO_IRQ_US);
  480. }
  481. return len;
  482. }
  483. static int cr50_i2c_open(struct udevice *dev)
  484. {
  485. char buf[80];
  486. int ret;
  487. ret = process_reset(dev);
  488. if (ret)
  489. return log_msg_ret("reset", ret);
  490. ret = claim_locality(dev, 0);
  491. if (ret)
  492. return log_msg_ret("claim", ret);
  493. cr50_i2c_get_desc(dev, buf, sizeof(buf));
  494. log_debug("%s\n", buf);
  495. return 0;
  496. }
  497. static int cr50_i2c_cleanup(struct udevice *dev)
  498. {
  499. struct cr50_priv *priv = dev_get_priv(dev);
  500. log_debug("cleanup %d\n", priv->locality);
  501. if (priv->locality != -1)
  502. release_locality(dev, 1);
  503. return 0;
  504. }
  505. static int cr50_acpi_fill_ssdt(const struct udevice *dev, struct acpi_ctx *ctx)
  506. {
  507. char scope[ACPI_PATH_MAX];
  508. char name[ACPI_NAME_MAX];
  509. const char *hid;
  510. int ret;
  511. ret = acpi_device_scope(dev, scope, sizeof(scope));
  512. if (ret)
  513. return log_msg_ret("scope", ret);
  514. ret = acpi_get_name(dev, name);
  515. if (ret)
  516. return log_msg_ret("name", ret);
  517. hid = dev_read_string(dev, "acpi,hid");
  518. if (!hid)
  519. return log_msg_ret("hid", ret);
  520. /* Device */
  521. acpigen_write_scope(ctx, scope);
  522. acpigen_write_device(ctx, name);
  523. acpigen_write_name_string(ctx, "_HID", hid);
  524. acpigen_write_name_integer(ctx, "_UID",
  525. dev_read_u32_default(dev, "acpi,uid", 0));
  526. acpigen_write_name_string(ctx, "_DDN",
  527. dev_read_string(dev, "acpi,ddn"));
  528. acpigen_write_sta(ctx, acpi_device_status(dev));
  529. /* Resources */
  530. acpigen_write_name(ctx, "_CRS");
  531. acpigen_write_resourcetemplate_header(ctx);
  532. ret = acpi_device_write_i2c_dev(ctx, dev);
  533. if (ret < 0)
  534. return log_msg_ret("i2c", ret);
  535. ret = acpi_device_write_interrupt_or_gpio(ctx, (struct udevice *)dev,
  536. "ready-gpios");
  537. if (ret < 0)
  538. return log_msg_ret("irq_gpio", ret);
  539. acpigen_write_resourcetemplate_footer(ctx);
  540. acpigen_pop_len(ctx); /* Device */
  541. acpigen_pop_len(ctx); /* Scope */
  542. return 0;
  543. }
  544. enum {
  545. TPM_TIMEOUT_MS = 5,
  546. SHORT_TIMEOUT_MS = 750,
  547. LONG_TIMEOUT_MS = 2000,
  548. };
  549. static int cr50_i2c_of_to_plat(struct udevice *dev)
  550. {
  551. struct tpm_chip_priv *upriv = dev_get_uclass_priv(dev);
  552. struct cr50_priv *priv = dev_get_priv(dev);
  553. struct irq irq;
  554. int ret;
  555. upriv->version = TPM_V2;
  556. upriv->duration_ms[TPM_SHORT] = SHORT_TIMEOUT_MS;
  557. upriv->duration_ms[TPM_MEDIUM] = LONG_TIMEOUT_MS;
  558. upriv->duration_ms[TPM_LONG] = LONG_TIMEOUT_MS;
  559. upriv->retry_time_ms = TPM_TIMEOUT_MS;
  560. upriv->pcr_count = 32;
  561. upriv->pcr_select_min = 2;
  562. /* Optional GPIO to track when cr50 is ready */
  563. ret = irq_get_by_index(dev, 0, &irq);
  564. if (!ret) {
  565. priv->irq = irq;
  566. priv->use_irq = true;
  567. } else {
  568. ret = gpio_request_by_name(dev, "ready-gpios", 0,
  569. &priv->ready_gpio, GPIOD_IS_IN);
  570. if (ret) {
  571. log_warning("Cr50 does not have an ready GPIO/interrupt (err=%d)\n",
  572. ret);
  573. }
  574. }
  575. return 0;
  576. }
  577. static int cr50_i2c_probe(struct udevice *dev)
  578. {
  579. struct cr50_priv *priv = dev_get_priv(dev);
  580. u32 vendor = 0;
  581. ulong start;
  582. /*
  583. * 150ms should be enough to synchronise with the TPM even under the
  584. * worst nested-reset-request conditions. In the vast majority of cases
  585. * there will be no wait at all.
  586. */
  587. start = get_timer(0);
  588. while (get_timer(start) < 150) {
  589. int ret;
  590. /* Exit once DID and VID verified */
  591. ret = cr50_i2c_read(dev, tpm_did_vid(0), (u8 *)&vendor, 4);
  592. if (!ret && vendor == CR50_DID_VID)
  593. break;
  594. /* TPM might be resetting; let's retry in a bit */
  595. mdelay(10);
  596. }
  597. if (vendor != CR50_DID_VID) {
  598. log_warning("DID_VID %08x not recognised\n", vendor);
  599. return log_msg_ret("vendor-id", -EXDEV);
  600. }
  601. priv->vendor = vendor;
  602. priv->locality = -1;
  603. log_debug("Cr50 ready\n");
  604. return 0;
  605. }
  606. struct acpi_ops cr50_acpi_ops = {
  607. .fill_ssdt = cr50_acpi_fill_ssdt,
  608. };
  609. static const struct tpm_ops cr50_i2c_ops = {
  610. .open = cr50_i2c_open,
  611. .get_desc = cr50_i2c_get_desc,
  612. .send = cr50_i2c_send,
  613. .recv = cr50_i2c_recv,
  614. .cleanup = cr50_i2c_cleanup,
  615. };
  616. static const struct udevice_id cr50_i2c_ids[] = {
  617. { .compatible = "google,cr50" },
  618. { }
  619. };
  620. U_BOOT_DRIVER(google_cr50) = {
  621. .name = "google_cr50",
  622. .id = UCLASS_TPM,
  623. .of_match = cr50_i2c_ids,
  624. .ops = &cr50_i2c_ops,
  625. .of_to_plat = cr50_i2c_of_to_plat,
  626. .probe = cr50_i2c_probe,
  627. .remove = cr50_i2c_cleanup,
  628. .priv_auto = sizeof(struct cr50_priv),
  629. ACPI_OPS_PTR(&cr50_acpi_ops)
  630. .flags = DM_FLAG_OS_PREPARE,
  631. };