dw-apb-timer.c 2.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Designware APB Timer driver
  4. *
  5. * Copyright (C) 2018 Marek Vasut <marex@denx.de>
  6. */
  7. #include <common.h>
  8. #include <dm.h>
  9. #include <clk.h>
  10. #include <malloc.h>
  11. #include <reset.h>
  12. #include <timer.h>
  13. #include <dm/device_compat.h>
  14. #include <asm/io.h>
  15. #include <asm/arch/timer.h>
  16. #define DW_APB_LOAD_VAL 0x0
  17. #define DW_APB_CURR_VAL 0x4
  18. #define DW_APB_CTRL 0x8
  19. struct dw_apb_timer_priv {
  20. fdt_addr_t regs;
  21. struct reset_ctl_bulk resets;
  22. };
  23. static u64 dw_apb_timer_get_count(struct udevice *dev)
  24. {
  25. struct dw_apb_timer_priv *priv = dev_get_priv(dev);
  26. /*
  27. * The DW APB counter counts down, but this function
  28. * requires the count to be incrementing. Invert the
  29. * result.
  30. */
  31. return timer_conv_64(~readl(priv->regs + DW_APB_CURR_VAL));
  32. }
  33. static int dw_apb_timer_probe(struct udevice *dev)
  34. {
  35. struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
  36. struct dw_apb_timer_priv *priv = dev_get_priv(dev);
  37. struct clk clk;
  38. int ret;
  39. ret = reset_get_bulk(dev, &priv->resets);
  40. if (ret)
  41. dev_warn(dev, "Can't get reset: %d\n", ret);
  42. else
  43. reset_deassert_bulk(&priv->resets);
  44. ret = clk_get_by_index(dev, 0, &clk);
  45. if (ret)
  46. return ret;
  47. uc_priv->clock_rate = clk_get_rate(&clk);
  48. clk_free(&clk);
  49. /* init timer */
  50. writel(0xffffffff, priv->regs + DW_APB_LOAD_VAL);
  51. writel(0xffffffff, priv->regs + DW_APB_CURR_VAL);
  52. setbits_le32(priv->regs + DW_APB_CTRL, 0x3);
  53. return 0;
  54. }
  55. static int dw_apb_timer_of_to_plat(struct udevice *dev)
  56. {
  57. struct dw_apb_timer_priv *priv = dev_get_priv(dev);
  58. priv->regs = dev_read_addr(dev);
  59. return 0;
  60. }
  61. static int dw_apb_timer_remove(struct udevice *dev)
  62. {
  63. struct dw_apb_timer_priv *priv = dev_get_priv(dev);
  64. return reset_release_bulk(&priv->resets);
  65. }
  66. static const struct timer_ops dw_apb_timer_ops = {
  67. .get_count = dw_apb_timer_get_count,
  68. };
  69. static const struct udevice_id dw_apb_timer_ids[] = {
  70. { .compatible = "snps,dw-apb-timer" },
  71. {}
  72. };
  73. U_BOOT_DRIVER(dw_apb_timer) = {
  74. .name = "dw_apb_timer",
  75. .id = UCLASS_TIMER,
  76. .ops = &dw_apb_timer_ops,
  77. .probe = dw_apb_timer_probe,
  78. .of_match = dw_apb_timer_ids,
  79. .of_to_plat = dw_apb_timer_of_to_plat,
  80. .remove = dw_apb_timer_remove,
  81. .priv_auto = sizeof(struct dw_apb_timer_priv),
  82. };